xref: /openbmc/linux/drivers/hwmon/asus-ec-sensors.c (revision c0c45238fcf44b05c86f2f7d1dda136df7a83ff9)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * HWMON driver for ASUS motherboards that publish some sensor values
4  * via the embedded controller registers.
5  *
6  * Copyright (C) 2021 Eugene Shalygin <eugene.shalygin@gmail.com>
7 
8  * EC provides:
9  * - Chipset temperature
10  * - CPU temperature
11  * - Motherboard temperature
12  * - T_Sensor temperature
13  * - VRM temperature
14  * - Water In temperature
15  * - Water Out temperature
16  * - CPU Optional fan RPM
17  * - Chipset fan RPM
18  * - VRM Heat Sink fan RPM
19  * - Water Flow fan RPM
20  * - CPU current
21  * - CPU core voltage
22  */
23 
24 #include <linux/acpi.h>
25 #include <linux/bitops.h>
26 #include <linux/dev_printk.h>
27 #include <linux/dmi.h>
28 #include <linux/hwmon.h>
29 #include <linux/init.h>
30 #include <linux/jiffies.h>
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/platform_device.h>
34 #include <linux/sort.h>
35 #include <linux/units.h>
36 
37 #include <asm/unaligned.h>
38 
39 static char *mutex_path_override;
40 
41 /* Writing to this EC register switches EC bank */
42 #define ASUS_EC_BANK_REGISTER	0xff
43 #define SENSOR_LABEL_LEN	16
44 
45 /*
46  * Arbitrary set max. allowed bank number. Required for sorting banks and
47  * currently is overkill with just 2 banks used at max, but for the sake
48  * of alignment let's set it to a higher value.
49  */
50 #define ASUS_EC_MAX_BANK	3
51 
52 #define ACPI_LOCK_DELAY_MS	500
53 
54 /* ACPI mutex for locking access to the EC for the firmware */
55 #define ASUS_HW_ACCESS_MUTEX_ASMX	"\\AMW0.ASMX"
56 
57 /* There are two variants of the vendor spelling */
58 #define VENDOR_ASUS_UPPER_CASE	"ASUSTeK COMPUTER INC."
59 
60 typedef union {
61 	u32 value;
62 	struct {
63 		u8 index;
64 		u8 bank;
65 		u8 size;
66 		u8 dummy;
67 	} components;
68 } sensor_address;
69 
70 #define MAKE_SENSOR_ADDRESS(size, bank, index) {                               \
71 		.value = (size << 16) + (bank << 8) + index                    \
72 	}
73 
74 static u32 hwmon_attributes[hwmon_max] = {
75 	[hwmon_chip] = HWMON_C_REGISTER_TZ,
76 	[hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL,
77 	[hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL,
78 	[hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL,
79 	[hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL,
80 };
81 
82 struct ec_sensor_info {
83 	char label[SENSOR_LABEL_LEN];
84 	enum hwmon_sensor_types type;
85 	sensor_address addr;
86 };
87 
88 #define EC_SENSOR(sensor_label, sensor_type, size, bank, index) {              \
89 		.label = sensor_label, .type = sensor_type,                    \
90 		.addr = MAKE_SENSOR_ADDRESS(size, bank, index),                \
91 	}
92 
93 enum ec_sensors {
94 	/* chipset temperature [℃] */
95 	ec_sensor_temp_chipset,
96 	/* CPU temperature [℃] */
97 	ec_sensor_temp_cpu,
98 	/* motherboard temperature [℃] */
99 	ec_sensor_temp_mb,
100 	/* "T_Sensor" temperature sensor reading [℃] */
101 	ec_sensor_temp_t_sensor,
102 	/* VRM temperature [℃] */
103 	ec_sensor_temp_vrm,
104 	/* CPU Core voltage [mV] */
105 	ec_sensor_in_cpu_core,
106 	/* CPU_Opt fan [RPM] */
107 	ec_sensor_fan_cpu_opt,
108 	/* VRM heat sink fan [RPM] */
109 	ec_sensor_fan_vrm_hs,
110 	/* Chipset fan [RPM] */
111 	ec_sensor_fan_chipset,
112 	/* Water flow sensor reading [RPM] */
113 	ec_sensor_fan_water_flow,
114 	/* CPU current [A] */
115 	ec_sensor_curr_cpu,
116 	/* "Water_In" temperature sensor reading [℃] */
117 	ec_sensor_temp_water_in,
118 	/* "Water_Out" temperature sensor reading [℃] */
119 	ec_sensor_temp_water_out,
120 };
121 
122 #define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset)
123 #define SENSOR_TEMP_CPU BIT(ec_sensor_temp_cpu)
124 #define SENSOR_TEMP_MB BIT(ec_sensor_temp_mb)
125 #define SENSOR_TEMP_T_SENSOR BIT(ec_sensor_temp_t_sensor)
126 #define SENSOR_TEMP_VRM BIT(ec_sensor_temp_vrm)
127 #define SENSOR_IN_CPU_CORE BIT(ec_sensor_in_cpu_core)
128 #define SENSOR_FAN_CPU_OPT BIT(ec_sensor_fan_cpu_opt)
129 #define SENSOR_FAN_VRM_HS BIT(ec_sensor_fan_vrm_hs)
130 #define SENSOR_FAN_CHIPSET BIT(ec_sensor_fan_chipset)
131 #define SENSOR_FAN_WATER_FLOW BIT(ec_sensor_fan_water_flow)
132 #define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu)
133 #define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in)
134 #define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out)
135 
136 /* All the known sensors for ASUS EC controllers */
137 static const struct ec_sensor_info known_ec_sensors[] = {
138 	[ec_sensor_temp_chipset] =
139 		EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
140 	[ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
141 	[ec_sensor_temp_mb] =
142 		EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
143 	[ec_sensor_temp_t_sensor] =
144 		EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
145 	[ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
146 	[ec_sensor_in_cpu_core] =
147 		EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2),
148 	[ec_sensor_fan_cpu_opt] =
149 		EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
150 	[ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
151 	[ec_sensor_fan_chipset] =
152 		EC_SENSOR("Chipset", hwmon_fan, 2, 0x00, 0xb4),
153 	[ec_sensor_fan_water_flow] =
154 		EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc),
155 	[ec_sensor_curr_cpu] = EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4),
156 	[ec_sensor_temp_water_in] =
157 		EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
158 	[ec_sensor_temp_water_out] =
159 		EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
160 };
161 
162 /* Shortcuts for common combinations */
163 #define SENSOR_SET_TEMP_CHIPSET_CPU_MB                                         \
164 	(SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB)
165 #define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT)
166 
167 #define DMI_EXACT_MATCH_BOARD(vendor, name, sensors) {                         \
168 	.matches = {                                                           \
169 		DMI_EXACT_MATCH(DMI_BOARD_VENDOR, vendor),                     \
170 		DMI_EXACT_MATCH(DMI_BOARD_NAME, name),                         \
171 	},                                                                     \
172 	.driver_data = (void *)(sensors), \
173 }
174 
175 static const struct dmi_system_id asus_ec_dmi_table[] __initconst = {
176 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "PRIME X570-PRO",
177 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
178 		SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET),
179 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "Pro WS X570-ACE",
180 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
181 		SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET |
182 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
183 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE,
184 			      "ROG CROSSHAIR VIII DARK HERO",
185 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
186 		SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
187 		SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW |
188 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
189 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE,
190 			      "ROG CROSSHAIR VIII FORMULA",
191 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
192 		SENSOR_TEMP_VRM | SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET |
193 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
194 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "ROG CROSSHAIR VIII HERO",
195 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
196 		SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
197 		SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET |
198 		SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
199 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE,
200 			      "ROG CROSSHAIR VIII HERO (WI-FI)",
201 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
202 		SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
203 		SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET |
204 		SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
205 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE,
206 			      "ROG CROSSHAIR VIII IMPACT",
207 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
208 		SENSOR_TEMP_VRM | SENSOR_FAN_CHIPSET |
209 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
210 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "ROG STRIX B550-E GAMING",
211 		SENSOR_SET_TEMP_CHIPSET_CPU_MB |
212 		SENSOR_TEMP_T_SENSOR |
213 		SENSOR_TEMP_VRM | SENSOR_FAN_CPU_OPT),
214 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "ROG STRIX B550-I GAMING",
215 		SENSOR_SET_TEMP_CHIPSET_CPU_MB |
216 		SENSOR_TEMP_T_SENSOR |
217 		SENSOR_TEMP_VRM | SENSOR_FAN_VRM_HS |
218 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
219 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "ROG STRIX X570-E GAMING",
220 		SENSOR_SET_TEMP_CHIPSET_CPU_MB |
221 		SENSOR_TEMP_T_SENSOR |
222 		SENSOR_TEMP_VRM | SENSOR_FAN_CHIPSET |
223 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
224 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "ROG STRIX X570-F GAMING",
225 		SENSOR_SET_TEMP_CHIPSET_CPU_MB |
226 		SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET),
227 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "ROG STRIX X570-I GAMING",
228 		SENSOR_TEMP_T_SENSOR | SENSOR_FAN_VRM_HS |
229 		SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
230 	{}
231 };
232 
233 struct ec_sensor {
234 	unsigned int info_index;
235 	s32 cached_value;
236 };
237 
238 struct ec_sensors_data {
239 	unsigned long board_sensors;
240 	struct ec_sensor *sensors;
241 	/* EC registers to read from */
242 	u16 *registers;
243 	u8 *read_buffer;
244 	/* sorted list of unique register banks */
245 	u8 banks[ASUS_EC_MAX_BANK + 1];
246 	/* in jiffies */
247 	unsigned long last_updated;
248 	acpi_handle aml_mutex;
249 	/* number of board EC sensors */
250 	u8 nr_sensors;
251 	/*
252 	 * number of EC registers to read
253 	 * (sensor might span more than 1 register)
254 	 */
255 	u8 nr_registers;
256 	/* number of unique register banks */
257 	u8 nr_banks;
258 };
259 
260 static u8 register_bank(u16 reg)
261 {
262 	return reg >> 8;
263 }
264 
265 static u8 register_index(u16 reg)
266 {
267 	return reg & 0x00ff;
268 }
269 
270 static bool is_sensor_data_signed(const struct ec_sensor_info *si)
271 {
272 	/*
273 	 * guessed from WMI functions in DSDT code for boards
274 	 * of the X470 generation
275 	 */
276 	return si->type == hwmon_temp;
277 }
278 
279 static const struct ec_sensor_info *
280 get_sensor_info(const struct ec_sensors_data *state, int index)
281 {
282 	return &known_ec_sensors[state->sensors[index].info_index];
283 }
284 
285 static int find_ec_sensor_index(const struct ec_sensors_data *ec,
286 				enum hwmon_sensor_types type, int channel)
287 {
288 	unsigned int i;
289 
290 	for (i = 0; i < ec->nr_sensors; i++) {
291 		if (get_sensor_info(ec, i)->type == type) {
292 			if (channel == 0)
293 				return i;
294 			channel--;
295 		}
296 	}
297 	return -ENOENT;
298 }
299 
300 static int __init bank_compare(const void *a, const void *b)
301 {
302 	return *((const s8 *)a) - *((const s8 *)b);
303 }
304 
305 static int __init board_sensors_count(unsigned long sensors)
306 {
307 	return hweight_long(sensors);
308 }
309 
310 static void __init setup_sensor_data(struct ec_sensors_data *ec)
311 {
312 	struct ec_sensor *s = ec->sensors;
313 	bool bank_found;
314 	int i, j;
315 	u8 bank;
316 
317 	ec->nr_banks = 0;
318 	ec->nr_registers = 0;
319 
320 	for_each_set_bit(i, &ec->board_sensors,
321 			  BITS_PER_TYPE(ec->board_sensors)) {
322 		s->info_index = i;
323 		s->cached_value = 0;
324 		ec->nr_registers +=
325 			known_ec_sensors[s->info_index].addr.components.size;
326 		bank_found = false;
327 		bank = known_ec_sensors[s->info_index].addr.components.bank;
328 		for (j = 0; j < ec->nr_banks; j++) {
329 			if (ec->banks[j] == bank) {
330 				bank_found = true;
331 				break;
332 			}
333 		}
334 		if (!bank_found) {
335 			ec->banks[ec->nr_banks++] = bank;
336 		}
337 		s++;
338 	}
339 	sort(ec->banks, ec->nr_banks, 1, bank_compare, NULL);
340 }
341 
342 static void __init fill_ec_registers(struct ec_sensors_data *ec)
343 {
344 	const struct ec_sensor_info *si;
345 	unsigned int i, j, register_idx = 0;
346 
347 	for (i = 0; i < ec->nr_sensors; ++i) {
348 		si = get_sensor_info(ec, i);
349 		for (j = 0; j < si->addr.components.size; ++j, ++register_idx) {
350 			ec->registers[register_idx] =
351 				(si->addr.components.bank << 8) +
352 				si->addr.components.index + j;
353 		}
354 	}
355 }
356 
357 static acpi_handle __init asus_hw_access_mutex(struct device *dev)
358 {
359 	const char *mutex_path;
360 	acpi_handle res;
361 	int status;
362 
363 	mutex_path = mutex_path_override ?
364 		mutex_path_override : ASUS_HW_ACCESS_MUTEX_ASMX;
365 
366 	status = acpi_get_handle(NULL, (acpi_string)mutex_path, &res);
367 	if (ACPI_FAILURE(status)) {
368 		dev_err(dev,
369 			"Could not get hardware access guard mutex '%s': error %d",
370 			mutex_path, status);
371 		return NULL;
372 	}
373 	return res;
374 }
375 
376 static int asus_ec_bank_switch(u8 bank, u8 *old)
377 {
378 	int status = 0;
379 
380 	if (old) {
381 		status = ec_read(ASUS_EC_BANK_REGISTER, old);
382 	}
383 	if (status || (old && (*old == bank)))
384 		return status;
385 	return ec_write(ASUS_EC_BANK_REGISTER, bank);
386 }
387 
388 static int asus_ec_block_read(const struct device *dev,
389 			      struct ec_sensors_data *ec)
390 {
391 	int ireg, ibank, status;
392 	u8 bank, reg_bank, prev_bank;
393 
394 	bank = 0;
395 	status = asus_ec_bank_switch(bank, &prev_bank);
396 	if (status) {
397 		dev_warn(dev, "EC bank switch failed");
398 		return status;
399 	}
400 
401 	if (prev_bank) {
402 		/* oops... somebody else is working with the EC too */
403 		dev_warn(dev,
404 			"Concurrent access to the ACPI EC detected.\nRace condition possible.");
405 	}
406 
407 	/* read registers minimizing bank switches. */
408 	for (ibank = 0; ibank < ec->nr_banks; ibank++) {
409 		if (bank != ec->banks[ibank]) {
410 			bank = ec->banks[ibank];
411 			if (asus_ec_bank_switch(bank, NULL)) {
412 				dev_warn(dev, "EC bank switch to %d failed",
413 					 bank);
414 				break;
415 			}
416 		}
417 		for (ireg = 0; ireg < ec->nr_registers; ireg++) {
418 			reg_bank = register_bank(ec->registers[ireg]);
419 			if (reg_bank < bank) {
420 				continue;
421 			}
422 			ec_read(register_index(ec->registers[ireg]),
423 				ec->read_buffer + ireg);
424 		}
425 	}
426 
427 	status = asus_ec_bank_switch(prev_bank, NULL);
428 	return status;
429 }
430 
431 static inline s32 get_sensor_value(const struct ec_sensor_info *si, u8 *data)
432 {
433 	if (is_sensor_data_signed(si)) {
434 		switch (si->addr.components.size) {
435 		case 1:
436 			return (s8)*data;
437 		case 2:
438 			return (s16)get_unaligned_be16(data);
439 		case 4:
440 			return (s32)get_unaligned_be32(data);
441 		default:
442 			return 0;
443 		}
444 	} else {
445 		switch (si->addr.components.size) {
446 		case 1:
447 			return *data;
448 		case 2:
449 			return get_unaligned_be16(data);
450 		case 4:
451 			return get_unaligned_be32(data);
452 		default:
453 			return 0;
454 		}
455 	}
456 }
457 
458 static void update_sensor_values(struct ec_sensors_data *ec, u8 *data)
459 {
460 	const struct ec_sensor_info *si;
461 	struct ec_sensor *s;
462 
463 	for (s = ec->sensors; s != ec->sensors + ec->nr_sensors; s++) {
464 		si = &known_ec_sensors[s->info_index];
465 		s->cached_value = get_sensor_value(si, data);
466 		data += si->addr.components.size;
467 	}
468 }
469 
470 static int update_ec_sensors(const struct device *dev,
471 			     struct ec_sensors_data *ec)
472 {
473 	int status;
474 
475 	/*
476 	 * ASUS DSDT does not specify that access to the EC has to be guarded,
477 	 * but firmware does access it via ACPI
478 	 */
479 	if (ACPI_FAILURE(acpi_acquire_mutex(ec->aml_mutex, NULL,
480 					    ACPI_LOCK_DELAY_MS))) {
481 		dev_err(dev, "Failed to acquire AML mutex");
482 		status = -EBUSY;
483 		goto cleanup;
484 	}
485 
486 	status = asus_ec_block_read(dev, ec);
487 
488 	if (!status) {
489 		update_sensor_values(ec, ec->read_buffer);
490 	}
491 	if (ACPI_FAILURE(acpi_release_mutex(ec->aml_mutex, NULL))) {
492 		dev_err(dev, "Failed to release AML mutex");
493 	}
494 cleanup:
495 	return status;
496 }
497 
498 static long scale_sensor_value(s32 value, int data_type)
499 {
500 	switch (data_type) {
501 	case hwmon_curr:
502 	case hwmon_temp:
503 		return value * MILLI;
504 	default:
505 		return value;
506 	}
507 }
508 
509 static int get_cached_value_or_update(const struct device *dev,
510 				      int sensor_index,
511 				      struct ec_sensors_data *state, s32 *value)
512 {
513 	if (time_after(jiffies, state->last_updated + HZ)) {
514 		if (update_ec_sensors(dev, state)) {
515 			dev_err(dev, "update_ec_sensors() failure\n");
516 			return -EIO;
517 		}
518 
519 		state->last_updated = jiffies;
520 	}
521 
522 	*value = state->sensors[sensor_index].cached_value;
523 	return 0;
524 }
525 
526 /*
527  * Now follow the functions that implement the hwmon interface
528  */
529 
530 static int asus_ec_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
531 			      u32 attr, int channel, long *val)
532 {
533 	int ret;
534 	s32 value = 0;
535 
536 	struct ec_sensors_data *state = dev_get_drvdata(dev);
537 	int sidx = find_ec_sensor_index(state, type, channel);
538 
539 	if (sidx < 0) {
540 		return sidx;
541 	}
542 
543 	ret = get_cached_value_or_update(dev, sidx, state, &value);
544 	if (!ret) {
545 		*val = scale_sensor_value(value,
546 					  get_sensor_info(state, sidx)->type);
547 	}
548 
549 	return ret;
550 }
551 
552 static int asus_ec_hwmon_read_string(struct device *dev,
553 				     enum hwmon_sensor_types type, u32 attr,
554 				     int channel, const char **str)
555 {
556 	struct ec_sensors_data *state = dev_get_drvdata(dev);
557 	int sensor_index = find_ec_sensor_index(state, type, channel);
558 	*str = get_sensor_info(state, sensor_index)->label;
559 
560 	return 0;
561 }
562 
563 static umode_t asus_ec_hwmon_is_visible(const void *drvdata,
564 					enum hwmon_sensor_types type, u32 attr,
565 					int channel)
566 {
567 	const struct ec_sensors_data *state = drvdata;
568 
569 	return find_ec_sensor_index(state, type, channel) >= 0 ? S_IRUGO : 0;
570 }
571 
572 static int __init
573 asus_ec_hwmon_add_chan_info(struct hwmon_channel_info *asus_ec_hwmon_chan,
574 			     struct device *dev, int num,
575 			     enum hwmon_sensor_types type, u32 config)
576 {
577 	int i;
578 	u32 *cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL);
579 
580 	if (!cfg)
581 		return -ENOMEM;
582 
583 	asus_ec_hwmon_chan->type = type;
584 	asus_ec_hwmon_chan->config = cfg;
585 	for (i = 0; i < num; i++, cfg++)
586 		*cfg = config;
587 
588 	return 0;
589 }
590 
591 static const struct hwmon_ops asus_ec_hwmon_ops = {
592 	.is_visible = asus_ec_hwmon_is_visible,
593 	.read = asus_ec_hwmon_read,
594 	.read_string = asus_ec_hwmon_read_string,
595 };
596 
597 static struct hwmon_chip_info asus_ec_chip_info = {
598 	.ops = &asus_ec_hwmon_ops,
599 };
600 
601 static unsigned long __init get_board_sensors(void)
602 {
603 	const struct dmi_system_id *dmi_entry =
604 		dmi_first_match(asus_ec_dmi_table);
605 
606 	return dmi_entry ? (unsigned long)dmi_entry->driver_data : 0;
607 }
608 
609 static int __init asus_ec_probe(struct platform_device *pdev)
610 {
611 	const struct hwmon_channel_info **ptr_asus_ec_ci;
612 	int nr_count[hwmon_max] = { 0 }, nr_types = 0;
613 	struct hwmon_channel_info *asus_ec_hwmon_chan;
614 	const struct hwmon_chip_info *chip_info;
615 	struct device *dev = &pdev->dev;
616 	struct ec_sensors_data *ec_data;
617 	const struct ec_sensor_info *si;
618 	enum hwmon_sensor_types type;
619 	unsigned long board_sensors;
620 	struct device *hwdev;
621 	unsigned int i;
622 
623 	board_sensors = get_board_sensors();
624 	if (!board_sensors)
625 		return -ENODEV;
626 
627 	ec_data = devm_kzalloc(dev, sizeof(struct ec_sensors_data),
628 			       GFP_KERNEL);
629 	if (!ec_data)
630 		return -ENOMEM;
631 
632 	dev_set_drvdata(dev, ec_data);
633 	ec_data->board_sensors = board_sensors;
634 	ec_data->nr_sensors = board_sensors_count(ec_data->board_sensors);
635 	ec_data->sensors = devm_kcalloc(dev, ec_data->nr_sensors,
636 					sizeof(struct ec_sensor), GFP_KERNEL);
637 
638 	setup_sensor_data(ec_data);
639 	ec_data->registers = devm_kcalloc(dev, ec_data->nr_registers,
640 					  sizeof(u16), GFP_KERNEL);
641 	ec_data->read_buffer = devm_kcalloc(dev, ec_data->nr_registers,
642 					    sizeof(u8), GFP_KERNEL);
643 
644 	if (!ec_data->registers || !ec_data->read_buffer)
645 		return -ENOMEM;
646 
647 	fill_ec_registers(ec_data);
648 
649 	ec_data->aml_mutex = asus_hw_access_mutex(dev);
650 
651 	for (i = 0; i < ec_data->nr_sensors; ++i) {
652 		si = get_sensor_info(ec_data, i);
653 		if (!nr_count[si->type])
654 			++nr_types;
655 		++nr_count[si->type];
656 	}
657 
658 	if (nr_count[hwmon_temp])
659 		nr_count[hwmon_chip]++, nr_types++;
660 
661 	asus_ec_hwmon_chan = devm_kcalloc(
662 		dev, nr_types, sizeof(*asus_ec_hwmon_chan), GFP_KERNEL);
663 	if (!asus_ec_hwmon_chan)
664 		return -ENOMEM;
665 
666 	ptr_asus_ec_ci = devm_kcalloc(dev, nr_types + 1,
667 				       sizeof(*ptr_asus_ec_ci), GFP_KERNEL);
668 	if (!ptr_asus_ec_ci)
669 		return -ENOMEM;
670 
671 	asus_ec_chip_info.info = ptr_asus_ec_ci;
672 	chip_info = &asus_ec_chip_info;
673 
674 	for (type = 0; type < hwmon_max; ++type) {
675 		if (!nr_count[type])
676 			continue;
677 
678 		asus_ec_hwmon_add_chan_info(asus_ec_hwmon_chan, dev,
679 					     nr_count[type], type,
680 					     hwmon_attributes[type]);
681 		*ptr_asus_ec_ci++ = asus_ec_hwmon_chan++;
682 	}
683 
684 	dev_info(dev, "board has %d EC sensors that span %d registers",
685 		 ec_data->nr_sensors, ec_data->nr_registers);
686 
687 	hwdev = devm_hwmon_device_register_with_info(dev, "asusec",
688 						     ec_data, chip_info, NULL);
689 
690 	return PTR_ERR_OR_ZERO(hwdev);
691 }
692 
693 
694 static const struct acpi_device_id acpi_ec_ids[] = {
695 	/* Embedded Controller Device */
696 	{ "PNP0C09", 0 },
697 	{}
698 };
699 
700 static struct platform_driver asus_ec_sensors_platform_driver = {
701 	.driver = {
702 		.name	= "asus-ec-sensors",
703 		.acpi_match_table = acpi_ec_ids,
704 	},
705 };
706 
707 MODULE_DEVICE_TABLE(dmi, asus_ec_dmi_table);
708 module_platform_driver_probe(asus_ec_sensors_platform_driver, asus_ec_probe);
709 
710 module_param_named(mutex_path, mutex_path_override, charp, 0);
711 MODULE_PARM_DESC(mutex_path,
712 		 "Override ACPI mutex path used to guard access to hardware");
713 
714 MODULE_AUTHOR("Eugene Shalygin <eugene.shalygin@gmail.com>");
715 MODULE_DESCRIPTION(
716 	"HWMON driver for sensors accessible via ACPI EC in ASUS motherboards");
717 MODULE_LICENSE("GPL");
718