1*ae02e5d4SSrinivas Pandruvada /* 2*ae02e5d4SSrinivas Pandruvada * H/W layer of ISHTP provider device (ISH) 3*ae02e5d4SSrinivas Pandruvada * 4*ae02e5d4SSrinivas Pandruvada * Copyright (c) 2014-2016, Intel Corporation. 5*ae02e5d4SSrinivas Pandruvada * 6*ae02e5d4SSrinivas Pandruvada * This program is free software; you can redistribute it and/or modify it 7*ae02e5d4SSrinivas Pandruvada * under the terms and conditions of the GNU General Public License, 8*ae02e5d4SSrinivas Pandruvada * version 2, as published by the Free Software Foundation. 9*ae02e5d4SSrinivas Pandruvada * 10*ae02e5d4SSrinivas Pandruvada * This program is distributed in the hope it will be useful, but WITHOUT 11*ae02e5d4SSrinivas Pandruvada * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12*ae02e5d4SSrinivas Pandruvada * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13*ae02e5d4SSrinivas Pandruvada * more details. 14*ae02e5d4SSrinivas Pandruvada */ 15*ae02e5d4SSrinivas Pandruvada 16*ae02e5d4SSrinivas Pandruvada #ifndef _ISHTP_HW_ISH_H_ 17*ae02e5d4SSrinivas Pandruvada #define _ISHTP_HW_ISH_H_ 18*ae02e5d4SSrinivas Pandruvada 19*ae02e5d4SSrinivas Pandruvada #include <linux/pci.h> 20*ae02e5d4SSrinivas Pandruvada #include <linux/interrupt.h> 21*ae02e5d4SSrinivas Pandruvada #include "hw-ish-regs.h" 22*ae02e5d4SSrinivas Pandruvada #include "ishtp-dev.h" 23*ae02e5d4SSrinivas Pandruvada 24*ae02e5d4SSrinivas Pandruvada #define CHV_DEVICE_ID 0x22D8 25*ae02e5d4SSrinivas Pandruvada #define BXT_Ax_DEVICE_ID 0x0AA2 26*ae02e5d4SSrinivas Pandruvada #define BXT_Bx_DEVICE_ID 0x1AA2 27*ae02e5d4SSrinivas Pandruvada #define APL_Ax_DEVICE_ID 0x5AA2 28*ae02e5d4SSrinivas Pandruvada #define SPT_Ax_DEVICE_ID 0x9D35 29*ae02e5d4SSrinivas Pandruvada 30*ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_A0 0x6 31*ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_Ax_SI 0x0 32*ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_Bx_SI 0x10 33*ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_Kx_SI 0x20 34*ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_Dx_SI 0x30 35*ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_B0 0xB0 36*ae02e5d4SSrinivas Pandruvada #define REVISION_ID_SI_MASK 0x70 37*ae02e5d4SSrinivas Pandruvada 38*ae02e5d4SSrinivas Pandruvada struct ipc_rst_payload_type { 39*ae02e5d4SSrinivas Pandruvada uint16_t reset_id; 40*ae02e5d4SSrinivas Pandruvada uint16_t reserved; 41*ae02e5d4SSrinivas Pandruvada }; 42*ae02e5d4SSrinivas Pandruvada 43*ae02e5d4SSrinivas Pandruvada struct time_sync_format { 44*ae02e5d4SSrinivas Pandruvada uint8_t ts1_source; 45*ae02e5d4SSrinivas Pandruvada uint8_t ts2_source; 46*ae02e5d4SSrinivas Pandruvada uint16_t reserved; 47*ae02e5d4SSrinivas Pandruvada } __packed; 48*ae02e5d4SSrinivas Pandruvada 49*ae02e5d4SSrinivas Pandruvada struct ipc_time_update_msg { 50*ae02e5d4SSrinivas Pandruvada uint64_t primary_host_time; 51*ae02e5d4SSrinivas Pandruvada struct time_sync_format sync_info; 52*ae02e5d4SSrinivas Pandruvada uint64_t secondary_host_time; 53*ae02e5d4SSrinivas Pandruvada } __packed; 54*ae02e5d4SSrinivas Pandruvada 55*ae02e5d4SSrinivas Pandruvada enum { 56*ae02e5d4SSrinivas Pandruvada HOST_UTC_TIME_USEC = 0, 57*ae02e5d4SSrinivas Pandruvada HOST_SYSTEM_TIME_USEC = 1 58*ae02e5d4SSrinivas Pandruvada }; 59*ae02e5d4SSrinivas Pandruvada 60*ae02e5d4SSrinivas Pandruvada struct ish_hw { 61*ae02e5d4SSrinivas Pandruvada void __iomem *mem_addr; 62*ae02e5d4SSrinivas Pandruvada }; 63*ae02e5d4SSrinivas Pandruvada 64*ae02e5d4SSrinivas Pandruvada #define to_ish_hw(dev) (struct ish_hw *)((dev)->hw) 65*ae02e5d4SSrinivas Pandruvada 66*ae02e5d4SSrinivas Pandruvada irqreturn_t ish_irq_handler(int irq, void *dev_id); 67*ae02e5d4SSrinivas Pandruvada struct ishtp_device *ish_dev_init(struct pci_dev *pdev); 68*ae02e5d4SSrinivas Pandruvada int ish_hw_start(struct ishtp_device *dev); 69*ae02e5d4SSrinivas Pandruvada void ish_device_disable(struct ishtp_device *dev); 70*ae02e5d4SSrinivas Pandruvada 71*ae02e5d4SSrinivas Pandruvada #endif /* _ISHTP_HW_ISH_H_ */ 72