12025cf9eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2ae02e5d4SSrinivas Pandruvada /* 3ae02e5d4SSrinivas Pandruvada * H/W layer of ISHTP provider device (ISH) 4ae02e5d4SSrinivas Pandruvada * 5ae02e5d4SSrinivas Pandruvada * Copyright (c) 2014-2016, Intel Corporation. 6ae02e5d4SSrinivas Pandruvada */ 7ae02e5d4SSrinivas Pandruvada 8ae02e5d4SSrinivas Pandruvada #ifndef _ISHTP_HW_ISH_H_ 9ae02e5d4SSrinivas Pandruvada #define _ISHTP_HW_ISH_H_ 10ae02e5d4SSrinivas Pandruvada 11ae02e5d4SSrinivas Pandruvada #include <linux/pci.h> 12ae02e5d4SSrinivas Pandruvada #include <linux/interrupt.h> 13ae02e5d4SSrinivas Pandruvada #include "hw-ish-regs.h" 14ae02e5d4SSrinivas Pandruvada #include "ishtp-dev.h" 15ae02e5d4SSrinivas Pandruvada 16ae02e5d4SSrinivas Pandruvada #define CHV_DEVICE_ID 0x22D8 17ae02e5d4SSrinivas Pandruvada #define BXT_Ax_DEVICE_ID 0x0AA2 18ae02e5d4SSrinivas Pandruvada #define BXT_Bx_DEVICE_ID 0x1AA2 19ae02e5d4SSrinivas Pandruvada #define APL_Ax_DEVICE_ID 0x5AA2 20ae02e5d4SSrinivas Pandruvada #define SPT_Ax_DEVICE_ID 0x9D35 211e3b74a2SSong Hongyan #define CNL_Ax_DEVICE_ID 0x9DFC 2216941309SSong Hongyan #define GLK_Ax_DEVICE_ID 0x31A2 237103f6b2SSrinivas Pandruvada #define CNL_H_DEVICE_ID 0xA37C 249ff3541eSSrinivas Pandruvada #define ICL_MOBILE_DEVICE_ID 0x34FC 25e0ab8b26SAndreas Bosch #define SPT_H_DEVICE_ID 0xA135 26a50e8e2eSSrinivas Pandruvada #define CML_LP_DEVICE_ID 0x02FC 27abb33ee8SEven Xu #define CMP_H_DEVICE_ID 0x06FC 28b640be5bSEven Xu #define EHL_Ax_DEVICE_ID 0x4BB3 291479a82dSSrinivas Pandruvada #define TGL_LP_DEVICE_ID 0xA0FC 302aefba19SYou-Sheng Yang #define TGL_H_DEVICE_ID 0x43FC 31*22db5e00SYe Xiang #define ADL_S_DEVICE_ID 0x7AF8 32*22db5e00SYe Xiang #define ADL_P_DEVICE_ID 0x51FC 33ae02e5d4SSrinivas Pandruvada 34ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_A0 0x6 35ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_Ax_SI 0x0 36ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_Bx_SI 0x10 37ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_Kx_SI 0x20 38ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_Dx_SI 0x30 39ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_B0 0xB0 40ae02e5d4SSrinivas Pandruvada #define REVISION_ID_SI_MASK 0x70 41ae02e5d4SSrinivas Pandruvada 42ae02e5d4SSrinivas Pandruvada struct ipc_rst_payload_type { 43ae02e5d4SSrinivas Pandruvada uint16_t reset_id; 44ae02e5d4SSrinivas Pandruvada uint16_t reserved; 45ae02e5d4SSrinivas Pandruvada }; 46ae02e5d4SSrinivas Pandruvada 47ae02e5d4SSrinivas Pandruvada struct time_sync_format { 48ae02e5d4SSrinivas Pandruvada uint8_t ts1_source; 49ae02e5d4SSrinivas Pandruvada uint8_t ts2_source; 50ae02e5d4SSrinivas Pandruvada uint16_t reserved; 51ae02e5d4SSrinivas Pandruvada } __packed; 52ae02e5d4SSrinivas Pandruvada 53ae02e5d4SSrinivas Pandruvada struct ipc_time_update_msg { 54ae02e5d4SSrinivas Pandruvada uint64_t primary_host_time; 55ae02e5d4SSrinivas Pandruvada struct time_sync_format sync_info; 56ae02e5d4SSrinivas Pandruvada uint64_t secondary_host_time; 57ae02e5d4SSrinivas Pandruvada } __packed; 58ae02e5d4SSrinivas Pandruvada 59ae02e5d4SSrinivas Pandruvada enum { 60ae02e5d4SSrinivas Pandruvada HOST_UTC_TIME_USEC = 0, 61ae02e5d4SSrinivas Pandruvada HOST_SYSTEM_TIME_USEC = 1 62ae02e5d4SSrinivas Pandruvada }; 63ae02e5d4SSrinivas Pandruvada 64ae02e5d4SSrinivas Pandruvada struct ish_hw { 65ae02e5d4SSrinivas Pandruvada void __iomem *mem_addr; 66ae02e5d4SSrinivas Pandruvada }; 67ae02e5d4SSrinivas Pandruvada 68291e9e3fSEven Xu /* 69291e9e3fSEven Xu * ISH FW status type 70291e9e3fSEven Xu */ 71291e9e3fSEven Xu enum { 72291e9e3fSEven Xu FWSTS_AFTER_RESET = 0, 73291e9e3fSEven Xu FWSTS_WAIT_FOR_HOST = 4, 74291e9e3fSEven Xu FWSTS_START_KERNEL_DMA = 5, 75291e9e3fSEven Xu FWSTS_FW_IS_RUNNING = 7, 76291e9e3fSEven Xu FWSTS_SENSOR_APP_LOADED = 8, 77291e9e3fSEven Xu FWSTS_SENSOR_APP_RUNNING = 15 78291e9e3fSEven Xu }; 79291e9e3fSEven Xu 80ae02e5d4SSrinivas Pandruvada #define to_ish_hw(dev) (struct ish_hw *)((dev)->hw) 81ae02e5d4SSrinivas Pandruvada 82ae02e5d4SSrinivas Pandruvada irqreturn_t ish_irq_handler(int irq, void *dev_id); 83ae02e5d4SSrinivas Pandruvada struct ishtp_device *ish_dev_init(struct pci_dev *pdev); 84ae02e5d4SSrinivas Pandruvada int ish_hw_start(struct ishtp_device *dev); 85ae02e5d4SSrinivas Pandruvada void ish_device_disable(struct ishtp_device *dev); 86c1ca58f6SZhang Lixu int ish_disable_dma(struct ishtp_device *dev); 872f4ec154SZhang Lixu void ish_set_host_ready(struct ishtp_device *dev); 88ae02e5d4SSrinivas Pandruvada 89ae02e5d4SSrinivas Pandruvada #endif /* _ISHTP_HW_ISH_H_ */ 90