1ae02e5d4SSrinivas Pandruvada /* 2ae02e5d4SSrinivas Pandruvada * H/W layer of ISHTP provider device (ISH) 3ae02e5d4SSrinivas Pandruvada * 4ae02e5d4SSrinivas Pandruvada * Copyright (c) 2014-2016, Intel Corporation. 5ae02e5d4SSrinivas Pandruvada * 6ae02e5d4SSrinivas Pandruvada * This program is free software; you can redistribute it and/or modify it 7ae02e5d4SSrinivas Pandruvada * under the terms and conditions of the GNU General Public License, 8ae02e5d4SSrinivas Pandruvada * version 2, as published by the Free Software Foundation. 9ae02e5d4SSrinivas Pandruvada * 10ae02e5d4SSrinivas Pandruvada * This program is distributed in the hope it will be useful, but WITHOUT 11ae02e5d4SSrinivas Pandruvada * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12ae02e5d4SSrinivas Pandruvada * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13ae02e5d4SSrinivas Pandruvada * more details. 14ae02e5d4SSrinivas Pandruvada */ 15ae02e5d4SSrinivas Pandruvada 16ae02e5d4SSrinivas Pandruvada #ifndef _ISHTP_HW_ISH_H_ 17ae02e5d4SSrinivas Pandruvada #define _ISHTP_HW_ISH_H_ 18ae02e5d4SSrinivas Pandruvada 19ae02e5d4SSrinivas Pandruvada #include <linux/pci.h> 20ae02e5d4SSrinivas Pandruvada #include <linux/interrupt.h> 21ae02e5d4SSrinivas Pandruvada #include "hw-ish-regs.h" 22ae02e5d4SSrinivas Pandruvada #include "ishtp-dev.h" 23ae02e5d4SSrinivas Pandruvada 24ae02e5d4SSrinivas Pandruvada #define CHV_DEVICE_ID 0x22D8 25ae02e5d4SSrinivas Pandruvada #define BXT_Ax_DEVICE_ID 0x0AA2 26ae02e5d4SSrinivas Pandruvada #define BXT_Bx_DEVICE_ID 0x1AA2 27ae02e5d4SSrinivas Pandruvada #define APL_Ax_DEVICE_ID 0x5AA2 28ae02e5d4SSrinivas Pandruvada #define SPT_Ax_DEVICE_ID 0x9D35 29*1e3b74a2SSong Hongyan #define CNL_Ax_DEVICE_ID 0x9DFC 30ae02e5d4SSrinivas Pandruvada 31ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_A0 0x6 32ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_Ax_SI 0x0 33ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_Bx_SI 0x10 34ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_Kx_SI 0x20 35ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_Dx_SI 0x30 36ae02e5d4SSrinivas Pandruvada #define REVISION_ID_CHT_B0 0xB0 37ae02e5d4SSrinivas Pandruvada #define REVISION_ID_SI_MASK 0x70 38ae02e5d4SSrinivas Pandruvada 39ae02e5d4SSrinivas Pandruvada struct ipc_rst_payload_type { 40ae02e5d4SSrinivas Pandruvada uint16_t reset_id; 41ae02e5d4SSrinivas Pandruvada uint16_t reserved; 42ae02e5d4SSrinivas Pandruvada }; 43ae02e5d4SSrinivas Pandruvada 44ae02e5d4SSrinivas Pandruvada struct time_sync_format { 45ae02e5d4SSrinivas Pandruvada uint8_t ts1_source; 46ae02e5d4SSrinivas Pandruvada uint8_t ts2_source; 47ae02e5d4SSrinivas Pandruvada uint16_t reserved; 48ae02e5d4SSrinivas Pandruvada } __packed; 49ae02e5d4SSrinivas Pandruvada 50ae02e5d4SSrinivas Pandruvada struct ipc_time_update_msg { 51ae02e5d4SSrinivas Pandruvada uint64_t primary_host_time; 52ae02e5d4SSrinivas Pandruvada struct time_sync_format sync_info; 53ae02e5d4SSrinivas Pandruvada uint64_t secondary_host_time; 54ae02e5d4SSrinivas Pandruvada } __packed; 55ae02e5d4SSrinivas Pandruvada 56ae02e5d4SSrinivas Pandruvada enum { 57ae02e5d4SSrinivas Pandruvada HOST_UTC_TIME_USEC = 0, 58ae02e5d4SSrinivas Pandruvada HOST_SYSTEM_TIME_USEC = 1 59ae02e5d4SSrinivas Pandruvada }; 60ae02e5d4SSrinivas Pandruvada 61ae02e5d4SSrinivas Pandruvada struct ish_hw { 62ae02e5d4SSrinivas Pandruvada void __iomem *mem_addr; 63ae02e5d4SSrinivas Pandruvada }; 64ae02e5d4SSrinivas Pandruvada 65291e9e3fSEven Xu /* 66291e9e3fSEven Xu * ISH FW status type 67291e9e3fSEven Xu */ 68291e9e3fSEven Xu enum { 69291e9e3fSEven Xu FWSTS_AFTER_RESET = 0, 70291e9e3fSEven Xu FWSTS_WAIT_FOR_HOST = 4, 71291e9e3fSEven Xu FWSTS_START_KERNEL_DMA = 5, 72291e9e3fSEven Xu FWSTS_FW_IS_RUNNING = 7, 73291e9e3fSEven Xu FWSTS_SENSOR_APP_LOADED = 8, 74291e9e3fSEven Xu FWSTS_SENSOR_APP_RUNNING = 15 75291e9e3fSEven Xu }; 76291e9e3fSEven Xu 77ae02e5d4SSrinivas Pandruvada #define to_ish_hw(dev) (struct ish_hw *)((dev)->hw) 78ae02e5d4SSrinivas Pandruvada 79ae02e5d4SSrinivas Pandruvada irqreturn_t ish_irq_handler(int irq, void *dev_id); 80ae02e5d4SSrinivas Pandruvada struct ishtp_device *ish_dev_init(struct pci_dev *pdev); 81ae02e5d4SSrinivas Pandruvada int ish_hw_start(struct ishtp_device *dev); 82ae02e5d4SSrinivas Pandruvada void ish_device_disable(struct ishtp_device *dev); 83ae02e5d4SSrinivas Pandruvada 84ae02e5d4SSrinivas Pandruvada #endif /* _ISHTP_HW_ISH_H_ */ 85