xref: /openbmc/linux/drivers/hid/intel-ish-hid/ipc/hw-ish.h (revision 2612e3bbc0386368a850140a6c9b990cd496a5ec)
12025cf9eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2ae02e5d4SSrinivas Pandruvada /*
3ae02e5d4SSrinivas Pandruvada  * H/W layer of ISHTP provider device (ISH)
4ae02e5d4SSrinivas Pandruvada  *
5ae02e5d4SSrinivas Pandruvada  * Copyright (c) 2014-2016, Intel Corporation.
6ae02e5d4SSrinivas Pandruvada  */
7ae02e5d4SSrinivas Pandruvada 
8ae02e5d4SSrinivas Pandruvada #ifndef _ISHTP_HW_ISH_H_
9ae02e5d4SSrinivas Pandruvada #define _ISHTP_HW_ISH_H_
10ae02e5d4SSrinivas Pandruvada 
11ae02e5d4SSrinivas Pandruvada #include <linux/pci.h>
12ae02e5d4SSrinivas Pandruvada #include <linux/interrupt.h>
13ae02e5d4SSrinivas Pandruvada #include "hw-ish-regs.h"
14ae02e5d4SSrinivas Pandruvada #include "ishtp-dev.h"
15ae02e5d4SSrinivas Pandruvada 
16ae02e5d4SSrinivas Pandruvada #define CHV_DEVICE_ID		0x22D8
17ae02e5d4SSrinivas Pandruvada #define BXT_Ax_DEVICE_ID	0x0AA2
18ae02e5d4SSrinivas Pandruvada #define BXT_Bx_DEVICE_ID	0x1AA2
19ae02e5d4SSrinivas Pandruvada #define APL_Ax_DEVICE_ID	0x5AA2
20ae02e5d4SSrinivas Pandruvada #define SPT_Ax_DEVICE_ID	0x9D35
211e3b74a2SSong Hongyan #define CNL_Ax_DEVICE_ID	0x9DFC
2216941309SSong Hongyan #define GLK_Ax_DEVICE_ID	0x31A2
237103f6b2SSrinivas Pandruvada #define CNL_H_DEVICE_ID		0xA37C
249ff3541eSSrinivas Pandruvada #define ICL_MOBILE_DEVICE_ID	0x34FC
25e0ab8b26SAndreas Bosch #define SPT_H_DEVICE_ID		0xA135
26a50e8e2eSSrinivas Pandruvada #define CML_LP_DEVICE_ID	0x02FC
27abb33ee8SEven Xu #define CMP_H_DEVICE_ID		0x06FC
28b640be5bSEven Xu #define EHL_Ax_DEVICE_ID	0x4BB3
291479a82dSSrinivas Pandruvada #define TGL_LP_DEVICE_ID	0xA0FC
302aefba19SYou-Sheng Yang #define TGL_H_DEVICE_ID		0x43FC
3122db5e00SYe Xiang #define ADL_S_DEVICE_ID		0x7AF8
3222db5e00SYe Xiang #define ADL_P_DEVICE_ID		0x51FC
3310ec4afdSEven Xu #define ADL_N_DEVICE_ID		0x54FC
3410ec4afdSEven Xu #define RPL_S_DEVICE_ID		0x7A78
35467249a7SEven Xu #define MTL_P_DEVICE_ID		0x7E45
36*4982126eSEven Xu #define ARL_H_DEVICE_ID		0x7745
37ae02e5d4SSrinivas Pandruvada 
38ae02e5d4SSrinivas Pandruvada #define	REVISION_ID_CHT_A0	0x6
39ae02e5d4SSrinivas Pandruvada #define	REVISION_ID_CHT_Ax_SI	0x0
40ae02e5d4SSrinivas Pandruvada #define	REVISION_ID_CHT_Bx_SI	0x10
41ae02e5d4SSrinivas Pandruvada #define	REVISION_ID_CHT_Kx_SI	0x20
42ae02e5d4SSrinivas Pandruvada #define	REVISION_ID_CHT_Dx_SI	0x30
43ae02e5d4SSrinivas Pandruvada #define	REVISION_ID_CHT_B0	0xB0
44ae02e5d4SSrinivas Pandruvada #define	REVISION_ID_SI_MASK	0x70
45ae02e5d4SSrinivas Pandruvada 
46ae02e5d4SSrinivas Pandruvada struct ipc_rst_payload_type {
47ae02e5d4SSrinivas Pandruvada 	uint16_t	reset_id;
48ae02e5d4SSrinivas Pandruvada 	uint16_t	reserved;
49ae02e5d4SSrinivas Pandruvada };
50ae02e5d4SSrinivas Pandruvada 
51ae02e5d4SSrinivas Pandruvada struct time_sync_format {
52ae02e5d4SSrinivas Pandruvada 	uint8_t ts1_source;
53ae02e5d4SSrinivas Pandruvada 	uint8_t ts2_source;
54ae02e5d4SSrinivas Pandruvada 	uint16_t reserved;
55ae02e5d4SSrinivas Pandruvada } __packed;
56ae02e5d4SSrinivas Pandruvada 
57ae02e5d4SSrinivas Pandruvada struct ipc_time_update_msg {
58ae02e5d4SSrinivas Pandruvada 	uint64_t primary_host_time;
59ae02e5d4SSrinivas Pandruvada 	struct time_sync_format sync_info;
60ae02e5d4SSrinivas Pandruvada 	uint64_t secondary_host_time;
61ae02e5d4SSrinivas Pandruvada } __packed;
62ae02e5d4SSrinivas Pandruvada 
63ae02e5d4SSrinivas Pandruvada enum {
64ae02e5d4SSrinivas Pandruvada 	HOST_UTC_TIME_USEC = 0,
65ae02e5d4SSrinivas Pandruvada 	HOST_SYSTEM_TIME_USEC = 1
66ae02e5d4SSrinivas Pandruvada };
67ae02e5d4SSrinivas Pandruvada 
68ae02e5d4SSrinivas Pandruvada struct ish_hw {
69ae02e5d4SSrinivas Pandruvada 	void __iomem *mem_addr;
70ae02e5d4SSrinivas Pandruvada };
71ae02e5d4SSrinivas Pandruvada 
72291e9e3fSEven Xu /*
73291e9e3fSEven Xu  * ISH FW status type
74291e9e3fSEven Xu  */
75291e9e3fSEven Xu enum {
76291e9e3fSEven Xu 	FWSTS_AFTER_RESET		= 0,
77291e9e3fSEven Xu 	FWSTS_WAIT_FOR_HOST		= 4,
78291e9e3fSEven Xu 	FWSTS_START_KERNEL_DMA		= 5,
79291e9e3fSEven Xu 	FWSTS_FW_IS_RUNNING		= 7,
80291e9e3fSEven Xu 	FWSTS_SENSOR_APP_LOADED		= 8,
81291e9e3fSEven Xu 	FWSTS_SENSOR_APP_RUNNING	= 15
82291e9e3fSEven Xu };
83291e9e3fSEven Xu 
84ae02e5d4SSrinivas Pandruvada #define to_ish_hw(dev) (struct ish_hw *)((dev)->hw)
85ae02e5d4SSrinivas Pandruvada 
86ae02e5d4SSrinivas Pandruvada irqreturn_t ish_irq_handler(int irq, void *dev_id);
87ae02e5d4SSrinivas Pandruvada struct ishtp_device *ish_dev_init(struct pci_dev *pdev);
88ae02e5d4SSrinivas Pandruvada int ish_hw_start(struct ishtp_device *dev);
89ae02e5d4SSrinivas Pandruvada void ish_device_disable(struct ishtp_device *dev);
90c1ca58f6SZhang Lixu int ish_disable_dma(struct ishtp_device *dev);
912f4ec154SZhang Lixu void ish_set_host_ready(struct ishtp_device *dev);
92ae02e5d4SSrinivas Pandruvada 
93ae02e5d4SSrinivas Pandruvada #endif /* _ISHTP_HW_ISH_H_ */
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