xref: /openbmc/linux/drivers/hid/amd-sfh-hid/amd_sfh_pcie.h (revision 0aad9c95eb9a2b086322e28ae2e58ad25598604e)
14f567b9fSSandeep Singh /* SPDX-License-Identifier: GPL-2.0-or-later */
24f567b9fSSandeep Singh /*
34f567b9fSSandeep Singh  * AMD MP2 PCIe communication driver
44f567b9fSSandeep Singh  * Copyright 2020 Advanced Micro Devices, Inc.
54f567b9fSSandeep Singh  * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
64f567b9fSSandeep Singh  *	    Sandeep Singh <Sandeep.singh@amd.com>
74f567b9fSSandeep Singh  */
84f567b9fSSandeep Singh 
94f567b9fSSandeep Singh #ifndef PCIE_MP2_AMD_H
104f567b9fSSandeep Singh #define PCIE_MP2_AMD_H
114f567b9fSSandeep Singh 
124f567b9fSSandeep Singh #include <linux/pci.h>
13*0aad9c95SBasavaraj Natikar #include "amd_sfh_hid.h"
144f567b9fSSandeep Singh 
154f567b9fSSandeep Singh #define PCI_DEVICE_ID_AMD_MP2	0x15E4
164f567b9fSSandeep Singh 
174f567b9fSSandeep Singh #define ENABLE_SENSOR		1
184f567b9fSSandeep Singh #define DISABLE_SENSOR		2
194f567b9fSSandeep Singh #define STOP_ALL_SENSORS	8
204f567b9fSSandeep Singh 
214f567b9fSSandeep Singh /* MP2 C2P Message Registers */
224f567b9fSSandeep Singh #define AMD_C2P_MSG0	0x10500
234f567b9fSSandeep Singh #define AMD_C2P_MSG1	0x10504
244f567b9fSSandeep Singh #define AMD_C2P_MSG2	0x10508
254f567b9fSSandeep Singh 
26f264481aSBasavaraj Natikar #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))
27f264481aSBasavaraj Natikar 
284f567b9fSSandeep Singh /* MP2 P2C Message Registers */
294f567b9fSSandeep Singh #define AMD_P2C_MSG3	0x1068C /* Supported Sensors info */
304f567b9fSSandeep Singh 
31f264481aSBasavaraj Natikar #define V2_STATUS	0x2
32f264481aSBasavaraj Natikar 
334f567b9fSSandeep Singh /* SFH Command register */
344f567b9fSSandeep Singh union sfh_cmd_base {
354f567b9fSSandeep Singh 	u32 ul;
364f567b9fSSandeep Singh 	struct {
374f567b9fSSandeep Singh 		u32 cmd_id : 8;
384f567b9fSSandeep Singh 		u32 sensor_id : 8;
394f567b9fSSandeep Singh 		u32 period : 16;
404f567b9fSSandeep Singh 	} s;
41f264481aSBasavaraj Natikar 	struct {
42f264481aSBasavaraj Natikar 		u32 cmd_id : 4;
43f264481aSBasavaraj Natikar 		u32 intr_enable : 1;
44f264481aSBasavaraj Natikar 		u32 rsvd1 : 3;
45f264481aSBasavaraj Natikar 		u32 length : 7;
46f264481aSBasavaraj Natikar 		u32 mem_type : 1;
47f264481aSBasavaraj Natikar 		u32 sensor_id : 8;
48f264481aSBasavaraj Natikar 		u32 period : 8;
49f264481aSBasavaraj Natikar 	} cmd_v2;
504f567b9fSSandeep Singh };
514f567b9fSSandeep Singh 
524f567b9fSSandeep Singh union sfh_cmd_param {
534f567b9fSSandeep Singh 	u32 ul;
544f567b9fSSandeep Singh 	struct {
554f567b9fSSandeep Singh 		u32 buf_layout : 2;
564f567b9fSSandeep Singh 		u32 buf_length : 6;
574f567b9fSSandeep Singh 		u32 rsvd : 24;
584f567b9fSSandeep Singh 	} s;
594f567b9fSSandeep Singh };
604f567b9fSSandeep Singh 
614f567b9fSSandeep Singh struct sfh_cmd_reg {
624f567b9fSSandeep Singh 	union sfh_cmd_base cmd_base;
634f567b9fSSandeep Singh 	union sfh_cmd_param cmd_param;
644f567b9fSSandeep Singh 	phys_addr_t phys_addr;
654f567b9fSSandeep Singh };
664f567b9fSSandeep Singh 
674f567b9fSSandeep Singh enum sensor_idx {
684f567b9fSSandeep Singh 	accel_idx = 0,
694f567b9fSSandeep Singh 	gyro_idx = 1,
704f567b9fSSandeep Singh 	mag_idx = 2,
714f567b9fSSandeep Singh 	als_idx = 19
724f567b9fSSandeep Singh };
734f567b9fSSandeep Singh 
744f567b9fSSandeep Singh struct amd_mp2_dev {
754f567b9fSSandeep Singh 	struct pci_dev *pdev;
764f567b9fSSandeep Singh 	struct amdtp_cl_data *cl_data;
774f567b9fSSandeep Singh 	void __iomem *mmio;
78f264481aSBasavaraj Natikar 	const struct amd_mp2_ops *mp2_ops;
79*0aad9c95SBasavaraj Natikar 	struct amd_input_data in_data;
80f264481aSBasavaraj Natikar 	/* mp2 active control status */
81f264481aSBasavaraj Natikar 	u32 mp2_acs;
824f567b9fSSandeep Singh };
834f567b9fSSandeep Singh 
844f567b9fSSandeep Singh struct amd_mp2_sensor_info {
854f567b9fSSandeep Singh 	u8 sensor_idx;
864f567b9fSSandeep Singh 	u32 period;
87de30491eSArnd Bergmann 	dma_addr_t dma_address;
884f567b9fSSandeep Singh };
894f567b9fSSandeep Singh 
90f264481aSBasavaraj Natikar enum mem_use_type {
91f264481aSBasavaraj Natikar 	USE_DRAM,
92f264481aSBasavaraj Natikar 	USE_C2P_REG,
93f264481aSBasavaraj Natikar };
94f264481aSBasavaraj Natikar 
954f567b9fSSandeep Singh void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
964f567b9fSSandeep Singh void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx);
974f567b9fSSandeep Singh void amd_stop_all_sensors(struct amd_mp2_dev *privdata);
984f567b9fSSandeep Singh int amd_mp2_get_sensor_num(struct amd_mp2_dev *privdata, u8 *sensor_id);
994f567b9fSSandeep Singh int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata);
1004f567b9fSSandeep Singh int amd_sfh_hid_client_deinit(struct amd_mp2_dev *privdata);
101f264481aSBasavaraj Natikar 
102f264481aSBasavaraj Natikar struct amd_mp2_ops {
103f264481aSBasavaraj Natikar 	 void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
104f264481aSBasavaraj Natikar 	 void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx);
105f264481aSBasavaraj Natikar 	 void (*stop_all)(struct amd_mp2_dev *privdata);
106f264481aSBasavaraj Natikar };
1074f567b9fSSandeep Singh #endif
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