1d92223eaSZack Rusin /* SPDX-License-Identifier: GPL-2.0 OR MIT */
2d92223eaSZack Rusin /**************************************************************************
3d92223eaSZack Rusin *
4d92223eaSZack Rusin * Copyright 2021 VMware, Inc., Palo Alto, CA., USA
5d92223eaSZack Rusin *
6d92223eaSZack Rusin * Permission is hereby granted, free of charge, to any person obtaining a
7d92223eaSZack Rusin * copy of this software and associated documentation files (the
8d92223eaSZack Rusin * "Software"), to deal in the Software without restriction, including
9d92223eaSZack Rusin * without limitation the rights to use, copy, modify, merge, publish,
10d92223eaSZack Rusin * distribute, sub license, and/or sell copies of the Software, and to
11d92223eaSZack Rusin * permit persons to whom the Software is furnished to do so, subject to
12d92223eaSZack Rusin * the following conditions:
13d92223eaSZack Rusin *
14d92223eaSZack Rusin * The above copyright notice and this permission notice (including the
15d92223eaSZack Rusin * next paragraph) shall be included in all copies or substantial portions
16d92223eaSZack Rusin * of the Software.
17d92223eaSZack Rusin *
18d92223eaSZack Rusin * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19d92223eaSZack Rusin * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20d92223eaSZack Rusin * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21d92223eaSZack Rusin * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22d92223eaSZack Rusin * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23d92223eaSZack Rusin * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24d92223eaSZack Rusin * USE OR OTHER DEALINGS IN THE SOFTWARE.
25d92223eaSZack Rusin *
26d92223eaSZack Rusin **************************************************************************/
27d92223eaSZack Rusin
28d92223eaSZack Rusin #include "vmwgfx_devcaps.h"
29d92223eaSZack Rusin
30d92223eaSZack Rusin #include "vmwgfx_drv.h"
31d92223eaSZack Rusin
32d92223eaSZack Rusin
33d92223eaSZack Rusin struct svga_3d_compat_cap {
34*ebc9ac7cSZack Rusin SVGA3dFifoCapsRecordHeader header;
35*ebc9ac7cSZack Rusin SVGA3dFifoCapPair pairs[SVGA3D_DEVCAP_MAX];
36d92223eaSZack Rusin };
37d92223eaSZack Rusin
38d92223eaSZack Rusin
vmw_mask_legacy_multisample(unsigned int cap,u32 fmt_value)39d92223eaSZack Rusin static u32 vmw_mask_legacy_multisample(unsigned int cap, u32 fmt_value)
40d92223eaSZack Rusin {
41d92223eaSZack Rusin /*
42d92223eaSZack Rusin * A version of user-space exists which use MULTISAMPLE_MASKABLESAMPLES
43d92223eaSZack Rusin * to check the sample count supported by virtual device. Since there
44d92223eaSZack Rusin * never was support for multisample count for backing MOB return 0.
45d92223eaSZack Rusin *
46d92223eaSZack Rusin * MULTISAMPLE_MASKABLESAMPLES devcap is marked as deprecated by virtual
47d92223eaSZack Rusin * device.
48d92223eaSZack Rusin */
49d92223eaSZack Rusin if (cap == SVGA3D_DEVCAP_DEAD5)
50d92223eaSZack Rusin return 0;
51d92223eaSZack Rusin
52d92223eaSZack Rusin return fmt_value;
53d92223eaSZack Rusin }
54d92223eaSZack Rusin
vmw_fill_compat_cap(struct vmw_private * dev_priv,void * bounce,size_t size)55d92223eaSZack Rusin static int vmw_fill_compat_cap(struct vmw_private *dev_priv, void *bounce,
56d92223eaSZack Rusin size_t size)
57d92223eaSZack Rusin {
58d92223eaSZack Rusin struct svga_3d_compat_cap *compat_cap =
59d92223eaSZack Rusin (struct svga_3d_compat_cap *) bounce;
60d92223eaSZack Rusin unsigned int i;
61d92223eaSZack Rusin size_t pair_offset = offsetof(struct svga_3d_compat_cap, pairs);
62d92223eaSZack Rusin unsigned int max_size;
63d92223eaSZack Rusin
64d92223eaSZack Rusin if (size < pair_offset)
65d92223eaSZack Rusin return -EINVAL;
66d92223eaSZack Rusin
67*ebc9ac7cSZack Rusin max_size = (size - pair_offset) / sizeof(SVGA3dFifoCapPair);
68d92223eaSZack Rusin
69d92223eaSZack Rusin if (max_size > SVGA3D_DEVCAP_MAX)
70d92223eaSZack Rusin max_size = SVGA3D_DEVCAP_MAX;
71d92223eaSZack Rusin
72d92223eaSZack Rusin compat_cap->header.length =
73*ebc9ac7cSZack Rusin (pair_offset + max_size * sizeof(SVGA3dFifoCapPair)) / sizeof(u32);
74*ebc9ac7cSZack Rusin compat_cap->header.type = SVGA3D_FIFO_CAPS_RECORD_DEVCAPS;
75d92223eaSZack Rusin
76d92223eaSZack Rusin for (i = 0; i < max_size; ++i) {
77d92223eaSZack Rusin compat_cap->pairs[i][0] = i;
78d92223eaSZack Rusin compat_cap->pairs[i][1] = vmw_mask_legacy_multisample
79d92223eaSZack Rusin (i, dev_priv->devcaps[i]);
80d92223eaSZack Rusin }
81d92223eaSZack Rusin
82d92223eaSZack Rusin return 0;
83d92223eaSZack Rusin }
84d92223eaSZack Rusin
vmw_devcaps_create(struct vmw_private * vmw)85d92223eaSZack Rusin int vmw_devcaps_create(struct vmw_private *vmw)
86d92223eaSZack Rusin {
87d92223eaSZack Rusin bool gb_objects = !!(vmw->capabilities & SVGA_CAP_GBOBJECTS);
88d92223eaSZack Rusin uint32_t i;
89d92223eaSZack Rusin
90d92223eaSZack Rusin if (gb_objects) {
91d92223eaSZack Rusin vmw->devcaps = vzalloc(sizeof(uint32_t) * SVGA3D_DEVCAP_MAX);
92d92223eaSZack Rusin if (!vmw->devcaps)
93d92223eaSZack Rusin return -ENOMEM;
94d92223eaSZack Rusin for (i = 0; i < SVGA3D_DEVCAP_MAX; ++i) {
95d92223eaSZack Rusin vmw_write(vmw, SVGA_REG_DEV_CAP, i);
96d92223eaSZack Rusin vmw->devcaps[i] = vmw_read(vmw, SVGA_REG_DEV_CAP);
97d92223eaSZack Rusin }
98d92223eaSZack Rusin }
99d92223eaSZack Rusin return 0;
100d92223eaSZack Rusin }
101d92223eaSZack Rusin
vmw_devcaps_destroy(struct vmw_private * vmw)102d92223eaSZack Rusin void vmw_devcaps_destroy(struct vmw_private *vmw)
103d92223eaSZack Rusin {
104d92223eaSZack Rusin vfree(vmw->devcaps);
105d92223eaSZack Rusin vmw->devcaps = NULL;
106d92223eaSZack Rusin }
107d92223eaSZack Rusin
108d92223eaSZack Rusin
vmw_devcaps_size(const struct vmw_private * vmw,bool gb_aware)109d92223eaSZack Rusin uint32 vmw_devcaps_size(const struct vmw_private *vmw,
110d92223eaSZack Rusin bool gb_aware)
111d92223eaSZack Rusin {
112d92223eaSZack Rusin bool gb_objects = !!(vmw->capabilities & SVGA_CAP_GBOBJECTS);
113d92223eaSZack Rusin if (gb_objects && gb_aware)
114d92223eaSZack Rusin return SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
115d92223eaSZack Rusin else if (gb_objects)
116d92223eaSZack Rusin return sizeof(struct svga_3d_compat_cap) +
117d92223eaSZack Rusin sizeof(uint32_t);
118d92223eaSZack Rusin else if (vmw->fifo_mem != NULL)
119d92223eaSZack Rusin return (SVGA_FIFO_3D_CAPS_LAST - SVGA_FIFO_3D_CAPS + 1) *
120d92223eaSZack Rusin sizeof(uint32_t);
121d92223eaSZack Rusin else
122d92223eaSZack Rusin return 0;
123d92223eaSZack Rusin }
124d92223eaSZack Rusin
vmw_devcaps_copy(struct vmw_private * vmw,bool gb_aware,void * dst,uint32_t dst_size)125d92223eaSZack Rusin int vmw_devcaps_copy(struct vmw_private *vmw, bool gb_aware,
126d92223eaSZack Rusin void *dst, uint32_t dst_size)
127d92223eaSZack Rusin {
128d92223eaSZack Rusin int ret;
129d92223eaSZack Rusin bool gb_objects = !!(vmw->capabilities & SVGA_CAP_GBOBJECTS);
130d92223eaSZack Rusin if (gb_objects && gb_aware) {
131d92223eaSZack Rusin memcpy(dst, vmw->devcaps, dst_size);
132d92223eaSZack Rusin } else if (gb_objects) {
133d92223eaSZack Rusin ret = vmw_fill_compat_cap(vmw, dst, dst_size);
134d92223eaSZack Rusin if (unlikely(ret != 0))
135d92223eaSZack Rusin return ret;
136d92223eaSZack Rusin } else if (vmw->fifo_mem) {
137d92223eaSZack Rusin u32 *fifo_mem = vmw->fifo_mem;
138d92223eaSZack Rusin memcpy(dst, &fifo_mem[SVGA_FIFO_3D_CAPS], dst_size);
139d92223eaSZack Rusin } else
140d92223eaSZack Rusin return -EINVAL;
141d92223eaSZack Rusin return 0;
142d92223eaSZack Rusin }
143