1a4e7e98eSRodrigo Siqueira // SPDX-License-Identifier: GPL-2.0+ 2a4e7e98eSRodrigo Siqueira 3a4e7e98eSRodrigo Siqueira #include <linux/crc32.h> 4ce672a1bSSam Ravnborg 5a4e7e98eSRodrigo Siqueira #include <drm/drm_atomic.h> 6a4e7e98eSRodrigo Siqueira #include <drm/drm_atomic_helper.h> 7*cd075550SMaíra Canal #include <drm/drm_blend.h> 832a1648aSMelissa Wen #include <drm/drm_fourcc.h> 9a4e7e98eSRodrigo Siqueira #include <drm/drm_gem_framebuffer_helper.h> 10ce672a1bSSam Ravnborg #include <drm/drm_vblank.h> 118ba16485SIgor Torrente #include <linux/minmax.h> 12ce672a1bSSam Ravnborg 13ce672a1bSSam Ravnborg #include "vkms_drv.h" 14a4e7e98eSRodrigo Siqueira 158ba16485SIgor Torrente static u16 pre_mul_blend_channel(u16 src, u16 dst, u16 alpha) 1660cc2021SRodrigo Siqueira { 178ba16485SIgor Torrente u32 new_color; 1860cc2021SRodrigo Siqueira 198ba16485SIgor Torrente new_color = (src * 0xffff + dst * (0xffff - alpha)); 2060cc2021SRodrigo Siqueira 218ba16485SIgor Torrente return DIV_ROUND_CLOSEST(new_color, 0xffff); 2260cc2021SRodrigo Siqueira } 2360cc2021SRodrigo Siqueira 24a4e7e98eSRodrigo Siqueira /** 258ba16485SIgor Torrente * pre_mul_alpha_blend - alpha blending equation 261645e7b9SIgor Torrente * @src_frame_info: source framebuffer's metadata 278ba16485SIgor Torrente * @stage_buffer: The line with the pixels from src_plane 288ba16485SIgor Torrente * @output_buffer: A line buffer that receives all the blends output 29a4e7e98eSRodrigo Siqueira * 308ba16485SIgor Torrente * Using the information from the `frame_info`, this blends only the 318ba16485SIgor Torrente * necessary pixels from the `stage_buffer` to the `output_buffer` 328ba16485SIgor Torrente * using premultiplied blend formula. 3332a1648aSMelissa Wen * 348ba16485SIgor Torrente * The current DRM assumption is that pixel color values have been already 358ba16485SIgor Torrente * pre-multiplied with the alpha channel values. See more 368ba16485SIgor Torrente * drm_plane_create_blend_mode_property(). Also, this formula assumes a 378ba16485SIgor Torrente * completely opaque background. 38a4e7e98eSRodrigo Siqueira */ 398ba16485SIgor Torrente static void pre_mul_alpha_blend(struct vkms_frame_info *frame_info, 408ba16485SIgor Torrente struct line_buffer *stage_buffer, 418ba16485SIgor Torrente struct line_buffer *output_buffer) 42a4e7e98eSRodrigo Siqueira { 438ba16485SIgor Torrente int x_dst = frame_info->dst.x1; 448ba16485SIgor Torrente struct pixel_argb_u16 *out = output_buffer->pixels + x_dst; 458ba16485SIgor Torrente struct pixel_argb_u16 *in = stage_buffer->pixels; 468ba16485SIgor Torrente int x_limit = min_t(size_t, drm_rect_width(&frame_info->dst), 478ba16485SIgor Torrente stage_buffer->n_pixels); 48a4e7e98eSRodrigo Siqueira 498ba16485SIgor Torrente for (int x = 0; x < x_limit; x++) { 508ba16485SIgor Torrente out[x].a = (u16)0xffff; 518ba16485SIgor Torrente out[x].r = pre_mul_blend_channel(in[x].r, out[x].r, in[x].a); 528ba16485SIgor Torrente out[x].g = pre_mul_blend_channel(in[x].g, out[x].g, in[x].a); 538ba16485SIgor Torrente out[x].b = pre_mul_blend_channel(in[x].b, out[x].b, in[x].a); 54a4e7e98eSRodrigo Siqueira } 55a4e7e98eSRodrigo Siqueira } 56a4e7e98eSRodrigo Siqueira 571ce76faeSMaíra Canal static int get_y_pos(struct vkms_frame_info *frame_info, int y) 581ce76faeSMaíra Canal { 591ce76faeSMaíra Canal if (frame_info->rotation & DRM_MODE_REFLECT_Y) 601ce76faeSMaíra Canal return drm_rect_height(&frame_info->rotated) - y - 1; 61cf7f8c67SMaíra Canal 62cf7f8c67SMaíra Canal switch (frame_info->rotation & DRM_MODE_ROTATE_MASK) { 63cf7f8c67SMaíra Canal case DRM_MODE_ROTATE_90: 64cf7f8c67SMaíra Canal return frame_info->rotated.x2 - y - 1; 65*cd075550SMaíra Canal case DRM_MODE_ROTATE_270: 66*cd075550SMaíra Canal return y + frame_info->rotated.x1; 67cf7f8c67SMaíra Canal default: 681ce76faeSMaíra Canal return y; 691ce76faeSMaíra Canal } 70cf7f8c67SMaíra Canal } 711ce76faeSMaíra Canal 72cf7f8c67SMaíra Canal static bool check_limit(struct vkms_frame_info *frame_info, int pos) 73a4e7e98eSRodrigo Siqueira { 74*cd075550SMaíra Canal if (drm_rotation_90_or_270(frame_info->rotation)) { 75cf7f8c67SMaíra Canal if (pos >= 0 && pos < drm_rect_width(&frame_info->rotated)) 768ba16485SIgor Torrente return true; 77cf7f8c67SMaíra Canal } else { 78cf7f8c67SMaíra Canal if (pos >= frame_info->rotated.y1 && pos < frame_info->rotated.y2) 79cf7f8c67SMaíra Canal return true; 80cf7f8c67SMaíra Canal } 81a4e7e98eSRodrigo Siqueira 828ba16485SIgor Torrente return false; 83a4e7e98eSRodrigo Siqueira } 84a4e7e98eSRodrigo Siqueira 85bc0d7fdeSIgor Torrente static void fill_background(const struct pixel_argb_u16 *background_color, 86bc0d7fdeSIgor Torrente struct line_buffer *output_buffer) 87bc0d7fdeSIgor Torrente { 88bc0d7fdeSIgor Torrente for (size_t i = 0; i < output_buffer->n_pixels; i++) 89bc0d7fdeSIgor Torrente output_buffer->pixels[i] = *background_color; 90bc0d7fdeSIgor Torrente } 91bc0d7fdeSIgor Torrente 928ba16485SIgor Torrente /** 938ba16485SIgor Torrente * @wb_frame_info: The writeback frame buffer metadata 948ba16485SIgor Torrente * @crtc_state: The crtc state 958ba16485SIgor Torrente * @crc32: The crc output of the final frame 968ba16485SIgor Torrente * @output_buffer: A buffer of a row that will receive the result of the blend(s) 978ba16485SIgor Torrente * @stage_buffer: The line with the pixels from plane being blend to the output 988ba16485SIgor Torrente * 998ba16485SIgor Torrente * This function blends the pixels (Using the `pre_mul_alpha_blend`) 1008ba16485SIgor Torrente * from all planes, calculates the crc32 of the output from the former step, 1018ba16485SIgor Torrente * and, if necessary, convert and store the output to the writeback buffer. 1028ba16485SIgor Torrente */ 1038ba16485SIgor Torrente static void blend(struct vkms_writeback_job *wb, 1048ba16485SIgor Torrente struct vkms_crtc_state *crtc_state, 1058ba16485SIgor Torrente u32 *crc32, struct line_buffer *stage_buffer, 1068ba16485SIgor Torrente struct line_buffer *output_buffer, size_t row_size) 107a4e7e98eSRodrigo Siqueira { 1088ba16485SIgor Torrente struct vkms_plane_state **plane = crtc_state->active_planes; 1098ba16485SIgor Torrente u32 n_active_planes = crtc_state->num_active_planes; 1101ce76faeSMaíra Canal int y_pos; 111a4e7e98eSRodrigo Siqueira 112bc0d7fdeSIgor Torrente const struct pixel_argb_u16 background_color = { .a = 0xffff }; 113a4e7e98eSRodrigo Siqueira 114bc0d7fdeSIgor Torrente size_t crtc_y_limit = crtc_state->base.crtc->mode.vdisplay; 115a4e7e98eSRodrigo Siqueira 116bc0d7fdeSIgor Torrente for (size_t y = 0; y < crtc_y_limit; y++) { 117bc0d7fdeSIgor Torrente fill_background(&background_color, output_buffer); 118bc0d7fdeSIgor Torrente 119bc0d7fdeSIgor Torrente /* The active planes are composed associatively in z-order. */ 120bc0d7fdeSIgor Torrente for (size_t i = 0; i < n_active_planes; i++) { 1211ce76faeSMaíra Canal y_pos = get_y_pos(plane[i]->frame_info, y); 1221ce76faeSMaíra Canal 123cf7f8c67SMaíra Canal if (!check_limit(plane[i]->frame_info, y_pos)) 1248ba16485SIgor Torrente continue; 1258ba16485SIgor Torrente 1261ce76faeSMaíra Canal vkms_compose_row(stage_buffer, plane[i], y_pos); 1278ba16485SIgor Torrente pre_mul_alpha_blend(plane[i]->frame_info, stage_buffer, 1288ba16485SIgor Torrente output_buffer); 1298ba16485SIgor Torrente } 1308ba16485SIgor Torrente 1318ba16485SIgor Torrente *crc32 = crc32_le(*crc32, (void *)output_buffer->pixels, row_size); 1328ba16485SIgor Torrente 1338ba16485SIgor Torrente if (wb) 1341ce76faeSMaíra Canal wb->wb_write(&wb->wb_frame_info, output_buffer, y_pos); 1358ba16485SIgor Torrente } 1368ba16485SIgor Torrente } 1378ba16485SIgor Torrente 1388ba16485SIgor Torrente static int check_format_funcs(struct vkms_crtc_state *crtc_state, 1398ba16485SIgor Torrente struct vkms_writeback_job *active_wb) 1408ba16485SIgor Torrente { 1418ba16485SIgor Torrente struct vkms_plane_state **planes = crtc_state->active_planes; 1428ba16485SIgor Torrente u32 n_active_planes = crtc_state->num_active_planes; 1438ba16485SIgor Torrente 1448ba16485SIgor Torrente for (size_t i = 0; i < n_active_planes; i++) 145322d716aSMaíra Canal if (!planes[i]->pixel_read) 1468ba16485SIgor Torrente return -1; 1478ba16485SIgor Torrente 1488ba16485SIgor Torrente if (active_wb && !active_wb->wb_write) 1498ba16485SIgor Torrente return -1; 150a4e7e98eSRodrigo Siqueira 15195302576SRodrigo Siqueira return 0; 152a4e7e98eSRodrigo Siqueira } 153a4e7e98eSRodrigo Siqueira 154bc0d7fdeSIgor Torrente static int check_iosys_map(struct vkms_crtc_state *crtc_state) 155bc0d7fdeSIgor Torrente { 156bc0d7fdeSIgor Torrente struct vkms_plane_state **plane_state = crtc_state->active_planes; 157bc0d7fdeSIgor Torrente u32 n_active_planes = crtc_state->num_active_planes; 158bc0d7fdeSIgor Torrente 159bc0d7fdeSIgor Torrente for (size_t i = 0; i < n_active_planes; i++) 160bc0d7fdeSIgor Torrente if (iosys_map_is_null(&plane_state[i]->frame_info->map[0])) 161bc0d7fdeSIgor Torrente return -1; 162bc0d7fdeSIgor Torrente 163bc0d7fdeSIgor Torrente return 0; 164bc0d7fdeSIgor Torrente } 165bc0d7fdeSIgor Torrente 1668ba16485SIgor Torrente static int compose_active_planes(struct vkms_writeback_job *active_wb, 1678ba16485SIgor Torrente struct vkms_crtc_state *crtc_state, 1688ba16485SIgor Torrente u32 *crc32) 1698ba16485SIgor Torrente { 1708ba16485SIgor Torrente size_t line_width, pixel_size = sizeof(struct pixel_argb_u16); 1718ba16485SIgor Torrente struct line_buffer output_buffer, stage_buffer; 1728ba16485SIgor Torrente int ret = 0; 1738ba16485SIgor Torrente 1748ba16485SIgor Torrente /* 1758ba16485SIgor Torrente * This check exists so we can call `crc32_le` for the entire line 1768ba16485SIgor Torrente * instead doing it for each channel of each pixel in case 1778ba16485SIgor Torrente * `struct `pixel_argb_u16` had any gap added by the compiler 1788ba16485SIgor Torrente * between the struct fields. 1798ba16485SIgor Torrente */ 1808ba16485SIgor Torrente static_assert(sizeof(struct pixel_argb_u16) == 8); 1818ba16485SIgor Torrente 182bc0d7fdeSIgor Torrente if (WARN_ON(check_iosys_map(crtc_state))) 1838ba16485SIgor Torrente return -EINVAL; 1848ba16485SIgor Torrente 1858ba16485SIgor Torrente if (WARN_ON(check_format_funcs(crtc_state, active_wb))) 1868ba16485SIgor Torrente return -EINVAL; 1878ba16485SIgor Torrente 188bc0d7fdeSIgor Torrente line_width = crtc_state->base.crtc->mode.hdisplay; 1898ba16485SIgor Torrente stage_buffer.n_pixels = line_width; 1908ba16485SIgor Torrente output_buffer.n_pixels = line_width; 1918ba16485SIgor Torrente 1928ba16485SIgor Torrente stage_buffer.pixels = kvmalloc(line_width * pixel_size, GFP_KERNEL); 1938ba16485SIgor Torrente if (!stage_buffer.pixels) { 1948ba16485SIgor Torrente DRM_ERROR("Cannot allocate memory for the output line buffer"); 1958ba16485SIgor Torrente return -ENOMEM; 1968ba16485SIgor Torrente } 1978ba16485SIgor Torrente 1988ba16485SIgor Torrente output_buffer.pixels = kvmalloc(line_width * pixel_size, GFP_KERNEL); 1998ba16485SIgor Torrente if (!output_buffer.pixels) { 2008ba16485SIgor Torrente DRM_ERROR("Cannot allocate memory for intermediate line buffer"); 2018ba16485SIgor Torrente ret = -ENOMEM; 2028ba16485SIgor Torrente goto free_stage_buffer; 2038ba16485SIgor Torrente } 2048ba16485SIgor Torrente 2058ba16485SIgor Torrente blend(active_wb, crtc_state, crc32, &stage_buffer, 2068ba16485SIgor Torrente &output_buffer, line_width * pixel_size); 2078ba16485SIgor Torrente 2088ba16485SIgor Torrente kvfree(output_buffer.pixels); 2098ba16485SIgor Torrente free_stage_buffer: 2108ba16485SIgor Torrente kvfree(stage_buffer.pixels); 2118ba16485SIgor Torrente 2128ba16485SIgor Torrente return ret; 2138ba16485SIgor Torrente } 2148ba16485SIgor Torrente 215a4e7e98eSRodrigo Siqueira /** 216a4e7e98eSRodrigo Siqueira * vkms_composer_worker - ordered work_struct to compute CRC 217a4e7e98eSRodrigo Siqueira * 218a4e7e98eSRodrigo Siqueira * @work: work_struct 219a4e7e98eSRodrigo Siqueira * 220a4e7e98eSRodrigo Siqueira * Work handler for composing and computing CRCs. work_struct scheduled in 221a4e7e98eSRodrigo Siqueira * an ordered workqueue that's periodically scheduled to run by 222e3137249SAndré Almeida * vkms_vblank_simulate() and flushed at vkms_atomic_commit_tail(). 223a4e7e98eSRodrigo Siqueira */ 224a4e7e98eSRodrigo Siqueira void vkms_composer_worker(struct work_struct *work) 225a4e7e98eSRodrigo Siqueira { 226a4e7e98eSRodrigo Siqueira struct vkms_crtc_state *crtc_state = container_of(work, 227a4e7e98eSRodrigo Siqueira struct vkms_crtc_state, 228a4e7e98eSRodrigo Siqueira composer_work); 229a4e7e98eSRodrigo Siqueira struct drm_crtc *crtc = crtc_state->base.crtc; 2308ba16485SIgor Torrente struct vkms_writeback_job *active_wb = crtc_state->active_writeback; 231a4e7e98eSRodrigo Siqueira struct vkms_output *out = drm_crtc_to_vkms_output(crtc); 232dbd9d80cSRodrigo Siqueira bool crc_pending, wb_pending; 233a4e7e98eSRodrigo Siqueira u64 frame_start, frame_end; 2348ba16485SIgor Torrente u32 crc32 = 0; 23595302576SRodrigo Siqueira int ret; 236a4e7e98eSRodrigo Siqueira 237a4e7e98eSRodrigo Siqueira spin_lock_irq(&out->composer_lock); 238a4e7e98eSRodrigo Siqueira frame_start = crtc_state->frame_start; 239a4e7e98eSRodrigo Siqueira frame_end = crtc_state->frame_end; 240a4e7e98eSRodrigo Siqueira crc_pending = crtc_state->crc_pending; 241dbd9d80cSRodrigo Siqueira wb_pending = crtc_state->wb_pending; 242a4e7e98eSRodrigo Siqueira crtc_state->frame_start = 0; 243a4e7e98eSRodrigo Siqueira crtc_state->frame_end = 0; 244a4e7e98eSRodrigo Siqueira crtc_state->crc_pending = false; 245a4e7e98eSRodrigo Siqueira spin_unlock_irq(&out->composer_lock); 246a4e7e98eSRodrigo Siqueira 247a4e7e98eSRodrigo Siqueira /* 248a4e7e98eSRodrigo Siqueira * We raced with the vblank hrtimer and previous work already computed 249a4e7e98eSRodrigo Siqueira * the crc, nothing to do. 250a4e7e98eSRodrigo Siqueira */ 251a4e7e98eSRodrigo Siqueira if (!crc_pending) 252a4e7e98eSRodrigo Siqueira return; 253a4e7e98eSRodrigo Siqueira 254dbd9d80cSRodrigo Siqueira if (wb_pending) 2558ba16485SIgor Torrente ret = compose_active_planes(active_wb, crtc_state, &crc32); 2568ba16485SIgor Torrente else 2578ba16485SIgor Torrente ret = compose_active_planes(NULL, crtc_state, &crc32); 258dbd9d80cSRodrigo Siqueira 2598ba16485SIgor Torrente if (ret) 26095302576SRodrigo Siqueira return; 261a4e7e98eSRodrigo Siqueira 262dbd9d80cSRodrigo Siqueira if (wb_pending) { 263dbd9d80cSRodrigo Siqueira drm_writeback_signal_completion(&out->wb_connector, 0); 264dbd9d80cSRodrigo Siqueira spin_lock_irq(&out->composer_lock); 265dbd9d80cSRodrigo Siqueira crtc_state->wb_pending = false; 266dbd9d80cSRodrigo Siqueira spin_unlock_irq(&out->composer_lock); 267dbd9d80cSRodrigo Siqueira } 268dbd9d80cSRodrigo Siqueira 269a4e7e98eSRodrigo Siqueira /* 270a4e7e98eSRodrigo Siqueira * The worker can fall behind the vblank hrtimer, make sure we catch up. 271a4e7e98eSRodrigo Siqueira */ 272a4e7e98eSRodrigo Siqueira while (frame_start <= frame_end) 273a4e7e98eSRodrigo Siqueira drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32); 274a4e7e98eSRodrigo Siqueira } 275a4e7e98eSRodrigo Siqueira 276a4e7e98eSRodrigo Siqueira static const char * const pipe_crc_sources[] = {"auto"}; 277a4e7e98eSRodrigo Siqueira 278a4e7e98eSRodrigo Siqueira const char *const *vkms_get_crc_sources(struct drm_crtc *crtc, 279a4e7e98eSRodrigo Siqueira size_t *count) 280a4e7e98eSRodrigo Siqueira { 281a4e7e98eSRodrigo Siqueira *count = ARRAY_SIZE(pipe_crc_sources); 282a4e7e98eSRodrigo Siqueira return pipe_crc_sources; 283a4e7e98eSRodrigo Siqueira } 284a4e7e98eSRodrigo Siqueira 285a4e7e98eSRodrigo Siqueira static int vkms_crc_parse_source(const char *src_name, bool *enabled) 286a4e7e98eSRodrigo Siqueira { 287a4e7e98eSRodrigo Siqueira int ret = 0; 288a4e7e98eSRodrigo Siqueira 289a4e7e98eSRodrigo Siqueira if (!src_name) { 290a4e7e98eSRodrigo Siqueira *enabled = false; 291a4e7e98eSRodrigo Siqueira } else if (strcmp(src_name, "auto") == 0) { 292a4e7e98eSRodrigo Siqueira *enabled = true; 293a4e7e98eSRodrigo Siqueira } else { 294a4e7e98eSRodrigo Siqueira *enabled = false; 295a4e7e98eSRodrigo Siqueira ret = -EINVAL; 296a4e7e98eSRodrigo Siqueira } 297a4e7e98eSRodrigo Siqueira 298a4e7e98eSRodrigo Siqueira return ret; 299a4e7e98eSRodrigo Siqueira } 300a4e7e98eSRodrigo Siqueira 301a4e7e98eSRodrigo Siqueira int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name, 302a4e7e98eSRodrigo Siqueira size_t *values_cnt) 303a4e7e98eSRodrigo Siqueira { 304a4e7e98eSRodrigo Siqueira bool enabled; 305a4e7e98eSRodrigo Siqueira 306a4e7e98eSRodrigo Siqueira if (vkms_crc_parse_source(src_name, &enabled) < 0) { 307a4e7e98eSRodrigo Siqueira DRM_DEBUG_DRIVER("unknown source %s\n", src_name); 308a4e7e98eSRodrigo Siqueira return -EINVAL; 309a4e7e98eSRodrigo Siqueira } 310a4e7e98eSRodrigo Siqueira 311a4e7e98eSRodrigo Siqueira *values_cnt = 1; 312a4e7e98eSRodrigo Siqueira 313a4e7e98eSRodrigo Siqueira return 0; 314a4e7e98eSRodrigo Siqueira } 315a4e7e98eSRodrigo Siqueira 316dbd9d80cSRodrigo Siqueira void vkms_set_composer(struct vkms_output *out, bool enabled) 3175bd858d7SMelissa Wen { 3185bd858d7SMelissa Wen bool old_enabled; 3195bd858d7SMelissa Wen 3205bd858d7SMelissa Wen if (enabled) 3215bd858d7SMelissa Wen drm_crtc_vblank_get(&out->crtc); 3225bd858d7SMelissa Wen 3235bd858d7SMelissa Wen spin_lock_irq(&out->lock); 3245bd858d7SMelissa Wen old_enabled = out->composer_enabled; 3255bd858d7SMelissa Wen out->composer_enabled = enabled; 3265bd858d7SMelissa Wen spin_unlock_irq(&out->lock); 3275bd858d7SMelissa Wen 3285bd858d7SMelissa Wen if (old_enabled) 3295bd858d7SMelissa Wen drm_crtc_vblank_put(&out->crtc); 3305bd858d7SMelissa Wen } 3315bd858d7SMelissa Wen 332a4e7e98eSRodrigo Siqueira int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name) 333a4e7e98eSRodrigo Siqueira { 334a4e7e98eSRodrigo Siqueira struct vkms_output *out = drm_crtc_to_vkms_output(crtc); 335a4e7e98eSRodrigo Siqueira bool enabled = false; 336a4e7e98eSRodrigo Siqueira int ret = 0; 337a4e7e98eSRodrigo Siqueira 338a4e7e98eSRodrigo Siqueira ret = vkms_crc_parse_source(src_name, &enabled); 339a4e7e98eSRodrigo Siqueira 3405bd858d7SMelissa Wen vkms_set_composer(out, enabled); 341a4e7e98eSRodrigo Siqueira 342a4e7e98eSRodrigo Siqueira return ret; 343a4e7e98eSRodrigo Siqueira } 344