xref: /openbmc/linux/drivers/gpu/drm/vkms/vkms_composer.c (revision bc0d7fdefec62e0cb83c1bcd3c7bd033f5e826e0)
1a4e7e98eSRodrigo Siqueira // SPDX-License-Identifier: GPL-2.0+
2a4e7e98eSRodrigo Siqueira 
3a4e7e98eSRodrigo Siqueira #include <linux/crc32.h>
4ce672a1bSSam Ravnborg 
5a4e7e98eSRodrigo Siqueira #include <drm/drm_atomic.h>
6a4e7e98eSRodrigo Siqueira #include <drm/drm_atomic_helper.h>
732a1648aSMelissa Wen #include <drm/drm_fourcc.h>
8a4e7e98eSRodrigo Siqueira #include <drm/drm_gem_framebuffer_helper.h>
9ce672a1bSSam Ravnborg #include <drm/drm_vblank.h>
108ba16485SIgor Torrente #include <linux/minmax.h>
11ce672a1bSSam Ravnborg 
12ce672a1bSSam Ravnborg #include "vkms_drv.h"
13a4e7e98eSRodrigo Siqueira 
148ba16485SIgor Torrente static u16 pre_mul_blend_channel(u16 src, u16 dst, u16 alpha)
1560cc2021SRodrigo Siqueira {
168ba16485SIgor Torrente 	u32 new_color;
1760cc2021SRodrigo Siqueira 
188ba16485SIgor Torrente 	new_color = (src * 0xffff + dst * (0xffff - alpha));
1960cc2021SRodrigo Siqueira 
208ba16485SIgor Torrente 	return DIV_ROUND_CLOSEST(new_color, 0xffff);
2160cc2021SRodrigo Siqueira }
2260cc2021SRodrigo Siqueira 
23a4e7e98eSRodrigo Siqueira /**
248ba16485SIgor Torrente  * pre_mul_alpha_blend - alpha blending equation
251645e7b9SIgor Torrente  * @src_frame_info: source framebuffer's metadata
268ba16485SIgor Torrente  * @stage_buffer: The line with the pixels from src_plane
278ba16485SIgor Torrente  * @output_buffer: A line buffer that receives all the blends output
28a4e7e98eSRodrigo Siqueira  *
298ba16485SIgor Torrente  * Using the information from the `frame_info`, this blends only the
308ba16485SIgor Torrente  * necessary pixels from the `stage_buffer` to the `output_buffer`
318ba16485SIgor Torrente  * using premultiplied blend formula.
3232a1648aSMelissa Wen  *
338ba16485SIgor Torrente  * The current DRM assumption is that pixel color values have been already
348ba16485SIgor Torrente  * pre-multiplied with the alpha channel values. See more
358ba16485SIgor Torrente  * drm_plane_create_blend_mode_property(). Also, this formula assumes a
368ba16485SIgor Torrente  * completely opaque background.
37a4e7e98eSRodrigo Siqueira  */
388ba16485SIgor Torrente static void pre_mul_alpha_blend(struct vkms_frame_info *frame_info,
398ba16485SIgor Torrente 				struct line_buffer *stage_buffer,
408ba16485SIgor Torrente 				struct line_buffer *output_buffer)
41a4e7e98eSRodrigo Siqueira {
428ba16485SIgor Torrente 	int x_dst = frame_info->dst.x1;
438ba16485SIgor Torrente 	struct pixel_argb_u16 *out = output_buffer->pixels + x_dst;
448ba16485SIgor Torrente 	struct pixel_argb_u16 *in = stage_buffer->pixels;
458ba16485SIgor Torrente 	int x_limit = min_t(size_t, drm_rect_width(&frame_info->dst),
468ba16485SIgor Torrente 			    stage_buffer->n_pixels);
47a4e7e98eSRodrigo Siqueira 
488ba16485SIgor Torrente 	for (int x = 0; x < x_limit; x++) {
498ba16485SIgor Torrente 		out[x].a = (u16)0xffff;
508ba16485SIgor Torrente 		out[x].r = pre_mul_blend_channel(in[x].r, out[x].r, in[x].a);
518ba16485SIgor Torrente 		out[x].g = pre_mul_blend_channel(in[x].g, out[x].g, in[x].a);
528ba16485SIgor Torrente 		out[x].b = pre_mul_blend_channel(in[x].b, out[x].b, in[x].a);
53a4e7e98eSRodrigo Siqueira 	}
54a4e7e98eSRodrigo Siqueira }
55a4e7e98eSRodrigo Siqueira 
568ba16485SIgor Torrente static bool check_y_limit(struct vkms_frame_info *frame_info, int y)
57a4e7e98eSRodrigo Siqueira {
588ba16485SIgor Torrente 	if (y >= frame_info->dst.y1 && y < frame_info->dst.y2)
598ba16485SIgor Torrente 		return true;
60a4e7e98eSRodrigo Siqueira 
618ba16485SIgor Torrente 	return false;
62a4e7e98eSRodrigo Siqueira }
63a4e7e98eSRodrigo Siqueira 
64*bc0d7fdeSIgor Torrente static void fill_background(const struct pixel_argb_u16 *background_color,
65*bc0d7fdeSIgor Torrente 			    struct line_buffer *output_buffer)
66*bc0d7fdeSIgor Torrente {
67*bc0d7fdeSIgor Torrente 	for (size_t i = 0; i < output_buffer->n_pixels; i++)
68*bc0d7fdeSIgor Torrente 		output_buffer->pixels[i] = *background_color;
69*bc0d7fdeSIgor Torrente }
70*bc0d7fdeSIgor Torrente 
718ba16485SIgor Torrente /**
728ba16485SIgor Torrente  * @wb_frame_info: The writeback frame buffer metadata
738ba16485SIgor Torrente  * @crtc_state: The crtc state
748ba16485SIgor Torrente  * @crc32: The crc output of the final frame
758ba16485SIgor Torrente  * @output_buffer: A buffer of a row that will receive the result of the blend(s)
768ba16485SIgor Torrente  * @stage_buffer: The line with the pixels from plane being blend to the output
778ba16485SIgor Torrente  *
788ba16485SIgor Torrente  * This function blends the pixels (Using the `pre_mul_alpha_blend`)
798ba16485SIgor Torrente  * from all planes, calculates the crc32 of the output from the former step,
808ba16485SIgor Torrente  * and, if necessary, convert and store the output to the writeback buffer.
818ba16485SIgor Torrente  */
828ba16485SIgor Torrente static void blend(struct vkms_writeback_job *wb,
838ba16485SIgor Torrente 		  struct vkms_crtc_state *crtc_state,
848ba16485SIgor Torrente 		  u32 *crc32, struct line_buffer *stage_buffer,
858ba16485SIgor Torrente 		  struct line_buffer *output_buffer, size_t row_size)
86a4e7e98eSRodrigo Siqueira {
878ba16485SIgor Torrente 	struct vkms_plane_state **plane = crtc_state->active_planes;
888ba16485SIgor Torrente 	u32 n_active_planes = crtc_state->num_active_planes;
89a4e7e98eSRodrigo Siqueira 
90*bc0d7fdeSIgor Torrente 	const struct pixel_argb_u16 background_color = { .a = 0xffff };
91a4e7e98eSRodrigo Siqueira 
92*bc0d7fdeSIgor Torrente 	size_t crtc_y_limit = crtc_state->base.crtc->mode.vdisplay;
93a4e7e98eSRodrigo Siqueira 
94*bc0d7fdeSIgor Torrente 	for (size_t y = 0; y < crtc_y_limit; y++) {
95*bc0d7fdeSIgor Torrente 		fill_background(&background_color, output_buffer);
96*bc0d7fdeSIgor Torrente 
97*bc0d7fdeSIgor Torrente 		/* The active planes are composed associatively in z-order. */
98*bc0d7fdeSIgor Torrente 		for (size_t i = 0; i < n_active_planes; i++) {
998ba16485SIgor Torrente 			if (!check_y_limit(plane[i]->frame_info, y))
1008ba16485SIgor Torrente 				continue;
1018ba16485SIgor Torrente 
1028ba16485SIgor Torrente 			plane[i]->plane_read(stage_buffer, plane[i]->frame_info, y);
1038ba16485SIgor Torrente 			pre_mul_alpha_blend(plane[i]->frame_info, stage_buffer,
1048ba16485SIgor Torrente 					    output_buffer);
1058ba16485SIgor Torrente 		}
1068ba16485SIgor Torrente 
1078ba16485SIgor Torrente 		*crc32 = crc32_le(*crc32, (void *)output_buffer->pixels, row_size);
1088ba16485SIgor Torrente 
1098ba16485SIgor Torrente 		if (wb)
1108ba16485SIgor Torrente 			wb->wb_write(&wb->wb_frame_info, output_buffer, y);
1118ba16485SIgor Torrente 	}
1128ba16485SIgor Torrente }
1138ba16485SIgor Torrente 
1148ba16485SIgor Torrente static int check_format_funcs(struct vkms_crtc_state *crtc_state,
1158ba16485SIgor Torrente 			      struct vkms_writeback_job *active_wb)
1168ba16485SIgor Torrente {
1178ba16485SIgor Torrente 	struct vkms_plane_state **planes = crtc_state->active_planes;
1188ba16485SIgor Torrente 	u32 n_active_planes = crtc_state->num_active_planes;
1198ba16485SIgor Torrente 
1208ba16485SIgor Torrente 	for (size_t i = 0; i < n_active_planes; i++)
1218ba16485SIgor Torrente 		if (!planes[i]->plane_read)
1228ba16485SIgor Torrente 			return -1;
1238ba16485SIgor Torrente 
1248ba16485SIgor Torrente 	if (active_wb && !active_wb->wb_write)
1258ba16485SIgor Torrente 		return -1;
126a4e7e98eSRodrigo Siqueira 
12795302576SRodrigo Siqueira 	return 0;
128a4e7e98eSRodrigo Siqueira }
129a4e7e98eSRodrigo Siqueira 
130*bc0d7fdeSIgor Torrente static int check_iosys_map(struct vkms_crtc_state *crtc_state)
131*bc0d7fdeSIgor Torrente {
132*bc0d7fdeSIgor Torrente 	struct vkms_plane_state **plane_state = crtc_state->active_planes;
133*bc0d7fdeSIgor Torrente 	u32 n_active_planes = crtc_state->num_active_planes;
134*bc0d7fdeSIgor Torrente 
135*bc0d7fdeSIgor Torrente 	for (size_t i = 0; i < n_active_planes; i++)
136*bc0d7fdeSIgor Torrente 		if (iosys_map_is_null(&plane_state[i]->frame_info->map[0]))
137*bc0d7fdeSIgor Torrente 			return -1;
138*bc0d7fdeSIgor Torrente 
139*bc0d7fdeSIgor Torrente 	return 0;
140*bc0d7fdeSIgor Torrente }
141*bc0d7fdeSIgor Torrente 
1428ba16485SIgor Torrente static int compose_active_planes(struct vkms_writeback_job *active_wb,
1438ba16485SIgor Torrente 				 struct vkms_crtc_state *crtc_state,
1448ba16485SIgor Torrente 				 u32 *crc32)
1458ba16485SIgor Torrente {
1468ba16485SIgor Torrente 	size_t line_width, pixel_size = sizeof(struct pixel_argb_u16);
1478ba16485SIgor Torrente 	struct line_buffer output_buffer, stage_buffer;
1488ba16485SIgor Torrente 	int ret = 0;
1498ba16485SIgor Torrente 
1508ba16485SIgor Torrente 	/*
1518ba16485SIgor Torrente 	 * This check exists so we can call `crc32_le` for the entire line
1528ba16485SIgor Torrente 	 * instead doing it for each channel of each pixel in case
1538ba16485SIgor Torrente 	 * `struct `pixel_argb_u16` had any gap added by the compiler
1548ba16485SIgor Torrente 	 * between the struct fields.
1558ba16485SIgor Torrente 	 */
1568ba16485SIgor Torrente 	static_assert(sizeof(struct pixel_argb_u16) == 8);
1578ba16485SIgor Torrente 
158*bc0d7fdeSIgor Torrente 	if (WARN_ON(check_iosys_map(crtc_state)))
1598ba16485SIgor Torrente 		return -EINVAL;
1608ba16485SIgor Torrente 
1618ba16485SIgor Torrente 	if (WARN_ON(check_format_funcs(crtc_state, active_wb)))
1628ba16485SIgor Torrente 		return -EINVAL;
1638ba16485SIgor Torrente 
164*bc0d7fdeSIgor Torrente 	line_width = crtc_state->base.crtc->mode.hdisplay;
1658ba16485SIgor Torrente 	stage_buffer.n_pixels = line_width;
1668ba16485SIgor Torrente 	output_buffer.n_pixels = line_width;
1678ba16485SIgor Torrente 
1688ba16485SIgor Torrente 	stage_buffer.pixels = kvmalloc(line_width * pixel_size, GFP_KERNEL);
1698ba16485SIgor Torrente 	if (!stage_buffer.pixels) {
1708ba16485SIgor Torrente 		DRM_ERROR("Cannot allocate memory for the output line buffer");
1718ba16485SIgor Torrente 		return -ENOMEM;
1728ba16485SIgor Torrente 	}
1738ba16485SIgor Torrente 
1748ba16485SIgor Torrente 	output_buffer.pixels = kvmalloc(line_width * pixel_size, GFP_KERNEL);
1758ba16485SIgor Torrente 	if (!output_buffer.pixels) {
1768ba16485SIgor Torrente 		DRM_ERROR("Cannot allocate memory for intermediate line buffer");
1778ba16485SIgor Torrente 		ret = -ENOMEM;
1788ba16485SIgor Torrente 		goto free_stage_buffer;
1798ba16485SIgor Torrente 	}
1808ba16485SIgor Torrente 
1818ba16485SIgor Torrente 	blend(active_wb, crtc_state, crc32, &stage_buffer,
1828ba16485SIgor Torrente 	      &output_buffer, line_width * pixel_size);
1838ba16485SIgor Torrente 
1848ba16485SIgor Torrente 	kvfree(output_buffer.pixels);
1858ba16485SIgor Torrente free_stage_buffer:
1868ba16485SIgor Torrente 	kvfree(stage_buffer.pixels);
1878ba16485SIgor Torrente 
1888ba16485SIgor Torrente 	return ret;
1898ba16485SIgor Torrente }
1908ba16485SIgor Torrente 
191a4e7e98eSRodrigo Siqueira /**
192a4e7e98eSRodrigo Siqueira  * vkms_composer_worker - ordered work_struct to compute CRC
193a4e7e98eSRodrigo Siqueira  *
194a4e7e98eSRodrigo Siqueira  * @work: work_struct
195a4e7e98eSRodrigo Siqueira  *
196a4e7e98eSRodrigo Siqueira  * Work handler for composing and computing CRCs. work_struct scheduled in
197a4e7e98eSRodrigo Siqueira  * an ordered workqueue that's periodically scheduled to run by
198e3137249SAndré Almeida  * vkms_vblank_simulate() and flushed at vkms_atomic_commit_tail().
199a4e7e98eSRodrigo Siqueira  */
200a4e7e98eSRodrigo Siqueira void vkms_composer_worker(struct work_struct *work)
201a4e7e98eSRodrigo Siqueira {
202a4e7e98eSRodrigo Siqueira 	struct vkms_crtc_state *crtc_state = container_of(work,
203a4e7e98eSRodrigo Siqueira 						struct vkms_crtc_state,
204a4e7e98eSRodrigo Siqueira 						composer_work);
205a4e7e98eSRodrigo Siqueira 	struct drm_crtc *crtc = crtc_state->base.crtc;
2068ba16485SIgor Torrente 	struct vkms_writeback_job *active_wb = crtc_state->active_writeback;
207a4e7e98eSRodrigo Siqueira 	struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
208dbd9d80cSRodrigo Siqueira 	bool crc_pending, wb_pending;
209a4e7e98eSRodrigo Siqueira 	u64 frame_start, frame_end;
2108ba16485SIgor Torrente 	u32 crc32 = 0;
21195302576SRodrigo Siqueira 	int ret;
212a4e7e98eSRodrigo Siqueira 
213a4e7e98eSRodrigo Siqueira 	spin_lock_irq(&out->composer_lock);
214a4e7e98eSRodrigo Siqueira 	frame_start = crtc_state->frame_start;
215a4e7e98eSRodrigo Siqueira 	frame_end = crtc_state->frame_end;
216a4e7e98eSRodrigo Siqueira 	crc_pending = crtc_state->crc_pending;
217dbd9d80cSRodrigo Siqueira 	wb_pending = crtc_state->wb_pending;
218a4e7e98eSRodrigo Siqueira 	crtc_state->frame_start = 0;
219a4e7e98eSRodrigo Siqueira 	crtc_state->frame_end = 0;
220a4e7e98eSRodrigo Siqueira 	crtc_state->crc_pending = false;
221a4e7e98eSRodrigo Siqueira 	spin_unlock_irq(&out->composer_lock);
222a4e7e98eSRodrigo Siqueira 
223a4e7e98eSRodrigo Siqueira 	/*
224a4e7e98eSRodrigo Siqueira 	 * We raced with the vblank hrtimer and previous work already computed
225a4e7e98eSRodrigo Siqueira 	 * the crc, nothing to do.
226a4e7e98eSRodrigo Siqueira 	 */
227a4e7e98eSRodrigo Siqueira 	if (!crc_pending)
228a4e7e98eSRodrigo Siqueira 		return;
229a4e7e98eSRodrigo Siqueira 
230dbd9d80cSRodrigo Siqueira 	if (wb_pending)
2318ba16485SIgor Torrente 		ret = compose_active_planes(active_wb, crtc_state, &crc32);
2328ba16485SIgor Torrente 	else
2338ba16485SIgor Torrente 		ret = compose_active_planes(NULL, crtc_state, &crc32);
234dbd9d80cSRodrigo Siqueira 
2358ba16485SIgor Torrente 	if (ret)
23695302576SRodrigo Siqueira 		return;
237a4e7e98eSRodrigo Siqueira 
238dbd9d80cSRodrigo Siqueira 	if (wb_pending) {
239dbd9d80cSRodrigo Siqueira 		drm_writeback_signal_completion(&out->wb_connector, 0);
240dbd9d80cSRodrigo Siqueira 		spin_lock_irq(&out->composer_lock);
241dbd9d80cSRodrigo Siqueira 		crtc_state->wb_pending = false;
242dbd9d80cSRodrigo Siqueira 		spin_unlock_irq(&out->composer_lock);
243dbd9d80cSRodrigo Siqueira 	}
244dbd9d80cSRodrigo Siqueira 
245a4e7e98eSRodrigo Siqueira 	/*
246a4e7e98eSRodrigo Siqueira 	 * The worker can fall behind the vblank hrtimer, make sure we catch up.
247a4e7e98eSRodrigo Siqueira 	 */
248a4e7e98eSRodrigo Siqueira 	while (frame_start <= frame_end)
249a4e7e98eSRodrigo Siqueira 		drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32);
250a4e7e98eSRodrigo Siqueira }
251a4e7e98eSRodrigo Siqueira 
252a4e7e98eSRodrigo Siqueira static const char * const pipe_crc_sources[] = {"auto"};
253a4e7e98eSRodrigo Siqueira 
254a4e7e98eSRodrigo Siqueira const char *const *vkms_get_crc_sources(struct drm_crtc *crtc,
255a4e7e98eSRodrigo Siqueira 					size_t *count)
256a4e7e98eSRodrigo Siqueira {
257a4e7e98eSRodrigo Siqueira 	*count = ARRAY_SIZE(pipe_crc_sources);
258a4e7e98eSRodrigo Siqueira 	return pipe_crc_sources;
259a4e7e98eSRodrigo Siqueira }
260a4e7e98eSRodrigo Siqueira 
261a4e7e98eSRodrigo Siqueira static int vkms_crc_parse_source(const char *src_name, bool *enabled)
262a4e7e98eSRodrigo Siqueira {
263a4e7e98eSRodrigo Siqueira 	int ret = 0;
264a4e7e98eSRodrigo Siqueira 
265a4e7e98eSRodrigo Siqueira 	if (!src_name) {
266a4e7e98eSRodrigo Siqueira 		*enabled = false;
267a4e7e98eSRodrigo Siqueira 	} else if (strcmp(src_name, "auto") == 0) {
268a4e7e98eSRodrigo Siqueira 		*enabled = true;
269a4e7e98eSRodrigo Siqueira 	} else {
270a4e7e98eSRodrigo Siqueira 		*enabled = false;
271a4e7e98eSRodrigo Siqueira 		ret = -EINVAL;
272a4e7e98eSRodrigo Siqueira 	}
273a4e7e98eSRodrigo Siqueira 
274a4e7e98eSRodrigo Siqueira 	return ret;
275a4e7e98eSRodrigo Siqueira }
276a4e7e98eSRodrigo Siqueira 
277a4e7e98eSRodrigo Siqueira int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name,
278a4e7e98eSRodrigo Siqueira 			   size_t *values_cnt)
279a4e7e98eSRodrigo Siqueira {
280a4e7e98eSRodrigo Siqueira 	bool enabled;
281a4e7e98eSRodrigo Siqueira 
282a4e7e98eSRodrigo Siqueira 	if (vkms_crc_parse_source(src_name, &enabled) < 0) {
283a4e7e98eSRodrigo Siqueira 		DRM_DEBUG_DRIVER("unknown source %s\n", src_name);
284a4e7e98eSRodrigo Siqueira 		return -EINVAL;
285a4e7e98eSRodrigo Siqueira 	}
286a4e7e98eSRodrigo Siqueira 
287a4e7e98eSRodrigo Siqueira 	*values_cnt = 1;
288a4e7e98eSRodrigo Siqueira 
289a4e7e98eSRodrigo Siqueira 	return 0;
290a4e7e98eSRodrigo Siqueira }
291a4e7e98eSRodrigo Siqueira 
292dbd9d80cSRodrigo Siqueira void vkms_set_composer(struct vkms_output *out, bool enabled)
2935bd858d7SMelissa Wen {
2945bd858d7SMelissa Wen 	bool old_enabled;
2955bd858d7SMelissa Wen 
2965bd858d7SMelissa Wen 	if (enabled)
2975bd858d7SMelissa Wen 		drm_crtc_vblank_get(&out->crtc);
2985bd858d7SMelissa Wen 
2995bd858d7SMelissa Wen 	spin_lock_irq(&out->lock);
3005bd858d7SMelissa Wen 	old_enabled = out->composer_enabled;
3015bd858d7SMelissa Wen 	out->composer_enabled = enabled;
3025bd858d7SMelissa Wen 	spin_unlock_irq(&out->lock);
3035bd858d7SMelissa Wen 
3045bd858d7SMelissa Wen 	if (old_enabled)
3055bd858d7SMelissa Wen 		drm_crtc_vblank_put(&out->crtc);
3065bd858d7SMelissa Wen }
3075bd858d7SMelissa Wen 
308a4e7e98eSRodrigo Siqueira int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name)
309a4e7e98eSRodrigo Siqueira {
310a4e7e98eSRodrigo Siqueira 	struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
311a4e7e98eSRodrigo Siqueira 	bool enabled = false;
312a4e7e98eSRodrigo Siqueira 	int ret = 0;
313a4e7e98eSRodrigo Siqueira 
314a4e7e98eSRodrigo Siqueira 	ret = vkms_crc_parse_source(src_name, &enabled);
315a4e7e98eSRodrigo Siqueira 
3165bd858d7SMelissa Wen 	vkms_set_composer(out, enabled);
317a4e7e98eSRodrigo Siqueira 
318a4e7e98eSRodrigo Siqueira 	return ret;
319a4e7e98eSRodrigo Siqueira }
320