xref: /openbmc/linux/drivers/gpu/drm/vkms/vkms_composer.c (revision 953025763d1421605939479b2e9c070f03e428c1)
1a4e7e98eSRodrigo Siqueira // SPDX-License-Identifier: GPL-2.0+
2a4e7e98eSRodrigo Siqueira 
3a4e7e98eSRodrigo Siqueira #include <linux/crc32.h>
4ce672a1bSSam Ravnborg 
5a4e7e98eSRodrigo Siqueira #include <drm/drm_atomic.h>
6a4e7e98eSRodrigo Siqueira #include <drm/drm_atomic_helper.h>
7a4e7e98eSRodrigo Siqueira #include <drm/drm_gem_framebuffer_helper.h>
8ce672a1bSSam Ravnborg #include <drm/drm_vblank.h>
9ce672a1bSSam Ravnborg 
10ce672a1bSSam Ravnborg #include "vkms_drv.h"
11a4e7e98eSRodrigo Siqueira 
12a4e7e98eSRodrigo Siqueira /**
13a4e7e98eSRodrigo Siqueira  * compute_crc - Compute CRC value on output frame
14a4e7e98eSRodrigo Siqueira  *
15a4e7e98eSRodrigo Siqueira  * @vaddr_out: address to final framebuffer
16a4e7e98eSRodrigo Siqueira  * @composer: framebuffer's metadata
17a4e7e98eSRodrigo Siqueira  *
18a4e7e98eSRodrigo Siqueira  * returns CRC value computed using crc32 on the visible portion of
19a4e7e98eSRodrigo Siqueira  * the final framebuffer at vaddr_out
20a4e7e98eSRodrigo Siqueira  */
21a4e7e98eSRodrigo Siqueira static uint32_t compute_crc(void *vaddr_out, struct vkms_composer *composer)
22a4e7e98eSRodrigo Siqueira {
23a4e7e98eSRodrigo Siqueira 	int i, j, src_offset;
24a4e7e98eSRodrigo Siqueira 	int x_src = composer->src.x1 >> 16;
25a4e7e98eSRodrigo Siqueira 	int y_src = composer->src.y1 >> 16;
26a4e7e98eSRodrigo Siqueira 	int h_src = drm_rect_height(&composer->src) >> 16;
27a4e7e98eSRodrigo Siqueira 	int w_src = drm_rect_width(&composer->src) >> 16;
28a4e7e98eSRodrigo Siqueira 	u32 crc = 0;
29a4e7e98eSRodrigo Siqueira 
30a4e7e98eSRodrigo Siqueira 	for (i = y_src; i < y_src + h_src; ++i) {
31a4e7e98eSRodrigo Siqueira 		for (j = x_src; j < x_src + w_src; ++j) {
32a4e7e98eSRodrigo Siqueira 			src_offset = composer->offset
33a4e7e98eSRodrigo Siqueira 				     + (i * composer->pitch)
34a4e7e98eSRodrigo Siqueira 				     + (j * composer->cpp);
35a4e7e98eSRodrigo Siqueira 			crc = crc32_le(crc, vaddr_out + src_offset,
36a4e7e98eSRodrigo Siqueira 				       sizeof(u32));
37a4e7e98eSRodrigo Siqueira 		}
38a4e7e98eSRodrigo Siqueira 	}
39a4e7e98eSRodrigo Siqueira 
40a4e7e98eSRodrigo Siqueira 	return crc;
41a4e7e98eSRodrigo Siqueira }
42a4e7e98eSRodrigo Siqueira 
4339cba5cfSMelissa Wen static u8 blend_channel(u8 src, u8 dst, u8 alpha)
4439cba5cfSMelissa Wen {
4539cba5cfSMelissa Wen 	u32 pre_blend;
4639cba5cfSMelissa Wen 	u8 new_color;
4739cba5cfSMelissa Wen 
4839cba5cfSMelissa Wen 	pre_blend = (src * 255 + dst * (255 - alpha));
4939cba5cfSMelissa Wen 
5039cba5cfSMelissa Wen 	/* Faster div by 255 */
5139cba5cfSMelissa Wen 	new_color = ((pre_blend + ((pre_blend + 257) >> 8)) >> 8);
5239cba5cfSMelissa Wen 
5339cba5cfSMelissa Wen 	return new_color;
5439cba5cfSMelissa Wen }
5539cba5cfSMelissa Wen 
5639cba5cfSMelissa Wen static void alpha_blending(const u8 *argb_src, u8 *argb_dst)
5739cba5cfSMelissa Wen {
5839cba5cfSMelissa Wen 	u8 alpha;
5939cba5cfSMelissa Wen 
6039cba5cfSMelissa Wen 	alpha = argb_src[3];
6139cba5cfSMelissa Wen 	argb_dst[0] = blend_channel(argb_src[0], argb_dst[0], alpha);
6239cba5cfSMelissa Wen 	argb_dst[1] = blend_channel(argb_src[1], argb_dst[1], alpha);
6339cba5cfSMelissa Wen 	argb_dst[2] = blend_channel(argb_src[2], argb_dst[2], alpha);
6439cba5cfSMelissa Wen 	/* Opaque primary */
6539cba5cfSMelissa Wen 	argb_dst[3] = 0xFF;
6639cba5cfSMelissa Wen }
6739cba5cfSMelissa Wen 
68a4e7e98eSRodrigo Siqueira /**
690530bbd0SGabriela Bittencourt  * blend - blend value at vaddr_src with value at vaddr_dst
70a4e7e98eSRodrigo Siqueira  * @vaddr_dst: destination address
71a4e7e98eSRodrigo Siqueira  * @vaddr_src: source address
7239cba5cfSMelissa Wen  * @dst_composer: destination framebuffer's metadata
73a4e7e98eSRodrigo Siqueira  * @src_composer: source framebuffer's metadata
74a4e7e98eSRodrigo Siqueira  *
7539cba5cfSMelissa Wen  * Blend the vaddr_src value with the vaddr_dst value using the pre-multiplied
7639cba5cfSMelissa Wen  * alpha blending equation, since DRM currently assumes that the pixel color
7739cba5cfSMelissa Wen  * values have already been pre-multiplied with the alpha channel values. See
7839cba5cfSMelissa Wen  * more drm_plane_create_blend_mode_property(). This function uses buffer's
7939cba5cfSMelissa Wen  * metadata to locate the new composite values at vaddr_dst.
80a4e7e98eSRodrigo Siqueira  */
81a4e7e98eSRodrigo Siqueira static void blend(void *vaddr_dst, void *vaddr_src,
8239cba5cfSMelissa Wen 		  struct vkms_composer *dst_composer,
83a4e7e98eSRodrigo Siqueira 		  struct vkms_composer *src_composer)
84a4e7e98eSRodrigo Siqueira {
85a4e7e98eSRodrigo Siqueira 	int i, j, j_dst, i_dst;
86a4e7e98eSRodrigo Siqueira 	int offset_src, offset_dst;
8739cba5cfSMelissa Wen 	u8 *pixel_dst, *pixel_src;
88a4e7e98eSRodrigo Siqueira 
89a4e7e98eSRodrigo Siqueira 	int x_src = src_composer->src.x1 >> 16;
90a4e7e98eSRodrigo Siqueira 	int y_src = src_composer->src.y1 >> 16;
91a4e7e98eSRodrigo Siqueira 
92a4e7e98eSRodrigo Siqueira 	int x_dst = src_composer->dst.x1;
93a4e7e98eSRodrigo Siqueira 	int y_dst = src_composer->dst.y1;
94a4e7e98eSRodrigo Siqueira 	int h_dst = drm_rect_height(&src_composer->dst);
95a4e7e98eSRodrigo Siqueira 	int w_dst = drm_rect_width(&src_composer->dst);
96a4e7e98eSRodrigo Siqueira 
97a4e7e98eSRodrigo Siqueira 	int y_limit = y_src + h_dst;
98a4e7e98eSRodrigo Siqueira 	int x_limit = x_src + w_dst;
99a4e7e98eSRodrigo Siqueira 
100a4e7e98eSRodrigo Siqueira 	for (i = y_src, i_dst = y_dst; i < y_limit; ++i) {
101a4e7e98eSRodrigo Siqueira 		for (j = x_src, j_dst = x_dst; j < x_limit; ++j) {
10239cba5cfSMelissa Wen 			offset_dst = dst_composer->offset
10339cba5cfSMelissa Wen 				     + (i_dst * dst_composer->pitch)
10439cba5cfSMelissa Wen 				     + (j_dst++ * dst_composer->cpp);
105a4e7e98eSRodrigo Siqueira 			offset_src = src_composer->offset
106a4e7e98eSRodrigo Siqueira 				     + (i * src_composer->pitch)
107a4e7e98eSRodrigo Siqueira 				     + (j * src_composer->cpp);
108a4e7e98eSRodrigo Siqueira 
10939cba5cfSMelissa Wen 			pixel_src = (u8 *)(vaddr_src + offset_src);
11039cba5cfSMelissa Wen 			pixel_dst = (u8 *)(vaddr_dst + offset_dst);
11139cba5cfSMelissa Wen 			alpha_blending(pixel_src, pixel_dst);
112a4e7e98eSRodrigo Siqueira 		}
113a4e7e98eSRodrigo Siqueira 		i_dst++;
114a4e7e98eSRodrigo Siqueira 	}
115a4e7e98eSRodrigo Siqueira }
116a4e7e98eSRodrigo Siqueira 
117a4e7e98eSRodrigo Siqueira static void compose_cursor(struct vkms_composer *cursor_composer,
118a4e7e98eSRodrigo Siqueira 			   struct vkms_composer *primary_composer,
119a4e7e98eSRodrigo Siqueira 			   void *vaddr_out)
120a4e7e98eSRodrigo Siqueira {
121a4e7e98eSRodrigo Siqueira 	struct drm_gem_object *cursor_obj;
122a4e7e98eSRodrigo Siqueira 	struct vkms_gem_object *cursor_vkms_obj;
123a4e7e98eSRodrigo Siqueira 
124a4e7e98eSRodrigo Siqueira 	cursor_obj = drm_gem_fb_get_obj(&cursor_composer->fb, 0);
125a4e7e98eSRodrigo Siqueira 	cursor_vkms_obj = drm_gem_to_vkms_gem(cursor_obj);
126a4e7e98eSRodrigo Siqueira 
127a4e7e98eSRodrigo Siqueira 	if (WARN_ON(!cursor_vkms_obj->vaddr))
128a4e7e98eSRodrigo Siqueira 		return;
129a4e7e98eSRodrigo Siqueira 
130a4e7e98eSRodrigo Siqueira 	blend(vaddr_out, cursor_vkms_obj->vaddr,
131a4e7e98eSRodrigo Siqueira 	      primary_composer, cursor_composer);
132a4e7e98eSRodrigo Siqueira }
133a4e7e98eSRodrigo Siqueira 
134*95302576SRodrigo Siqueira static int compose_planes(void **vaddr_out,
135*95302576SRodrigo Siqueira 			  struct vkms_composer *primary_composer,
136a4e7e98eSRodrigo Siqueira 			  struct vkms_composer *cursor_composer)
137a4e7e98eSRodrigo Siqueira {
138a4e7e98eSRodrigo Siqueira 	struct drm_framebuffer *fb = &primary_composer->fb;
139a4e7e98eSRodrigo Siqueira 	struct drm_gem_object *gem_obj = drm_gem_fb_get_obj(fb, 0);
140a4e7e98eSRodrigo Siqueira 	struct vkms_gem_object *vkms_obj = drm_gem_to_vkms_gem(gem_obj);
141a4e7e98eSRodrigo Siqueira 
142*95302576SRodrigo Siqueira 	if (!*vaddr_out) {
143*95302576SRodrigo Siqueira 		*vaddr_out = kzalloc(vkms_obj->gem.size, GFP_KERNEL);
144*95302576SRodrigo Siqueira 		if (!*vaddr_out) {
145*95302576SRodrigo Siqueira 			DRM_ERROR("Cannot allocate memory for output frame.");
146*95302576SRodrigo Siqueira 			return -ENOMEM;
147*95302576SRodrigo Siqueira 		}
148a4e7e98eSRodrigo Siqueira 	}
149a4e7e98eSRodrigo Siqueira 
150*95302576SRodrigo Siqueira 	if (WARN_ON(!vkms_obj->vaddr))
151*95302576SRodrigo Siqueira 		return -EINVAL;
152a4e7e98eSRodrigo Siqueira 
153*95302576SRodrigo Siqueira 	memcpy(*vaddr_out, vkms_obj->vaddr, vkms_obj->gem.size);
154a4e7e98eSRodrigo Siqueira 
155a4e7e98eSRodrigo Siqueira 	if (cursor_composer)
156*95302576SRodrigo Siqueira 		compose_cursor(cursor_composer, primary_composer, *vaddr_out);
157a4e7e98eSRodrigo Siqueira 
158*95302576SRodrigo Siqueira 	return 0;
159a4e7e98eSRodrigo Siqueira }
160a4e7e98eSRodrigo Siqueira 
161a4e7e98eSRodrigo Siqueira /**
162a4e7e98eSRodrigo Siqueira  * vkms_composer_worker - ordered work_struct to compute CRC
163a4e7e98eSRodrigo Siqueira  *
164a4e7e98eSRodrigo Siqueira  * @work: work_struct
165a4e7e98eSRodrigo Siqueira  *
166a4e7e98eSRodrigo Siqueira  * Work handler for composing and computing CRCs. work_struct scheduled in
167a4e7e98eSRodrigo Siqueira  * an ordered workqueue that's periodically scheduled to run by
168a4e7e98eSRodrigo Siqueira  * _vblank_handle() and flushed at vkms_atomic_crtc_destroy_state().
169a4e7e98eSRodrigo Siqueira  */
170a4e7e98eSRodrigo Siqueira void vkms_composer_worker(struct work_struct *work)
171a4e7e98eSRodrigo Siqueira {
172a4e7e98eSRodrigo Siqueira 	struct vkms_crtc_state *crtc_state = container_of(work,
173a4e7e98eSRodrigo Siqueira 						struct vkms_crtc_state,
174a4e7e98eSRodrigo Siqueira 						composer_work);
175a4e7e98eSRodrigo Siqueira 	struct drm_crtc *crtc = crtc_state->base.crtc;
176a4e7e98eSRodrigo Siqueira 	struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
177a4e7e98eSRodrigo Siqueira 	struct vkms_composer *primary_composer = NULL;
178a4e7e98eSRodrigo Siqueira 	struct vkms_composer *cursor_composer = NULL;
179*95302576SRodrigo Siqueira 	void *vaddr_out = NULL;
180a4e7e98eSRodrigo Siqueira 	u32 crc32 = 0;
181a4e7e98eSRodrigo Siqueira 	u64 frame_start, frame_end;
182a4e7e98eSRodrigo Siqueira 	bool crc_pending;
183*95302576SRodrigo Siqueira 	int ret;
184a4e7e98eSRodrigo Siqueira 
185a4e7e98eSRodrigo Siqueira 	spin_lock_irq(&out->composer_lock);
186a4e7e98eSRodrigo Siqueira 	frame_start = crtc_state->frame_start;
187a4e7e98eSRodrigo Siqueira 	frame_end = crtc_state->frame_end;
188a4e7e98eSRodrigo Siqueira 	crc_pending = crtc_state->crc_pending;
189a4e7e98eSRodrigo Siqueira 	crtc_state->frame_start = 0;
190a4e7e98eSRodrigo Siqueira 	crtc_state->frame_end = 0;
191a4e7e98eSRodrigo Siqueira 	crtc_state->crc_pending = false;
192a4e7e98eSRodrigo Siqueira 	spin_unlock_irq(&out->composer_lock);
193a4e7e98eSRodrigo Siqueira 
194a4e7e98eSRodrigo Siqueira 	/*
195a4e7e98eSRodrigo Siqueira 	 * We raced with the vblank hrtimer and previous work already computed
196a4e7e98eSRodrigo Siqueira 	 * the crc, nothing to do.
197a4e7e98eSRodrigo Siqueira 	 */
198a4e7e98eSRodrigo Siqueira 	if (!crc_pending)
199a4e7e98eSRodrigo Siqueira 		return;
200a4e7e98eSRodrigo Siqueira 
201a4e7e98eSRodrigo Siqueira 	if (crtc_state->num_active_planes >= 1)
202a4e7e98eSRodrigo Siqueira 		primary_composer = crtc_state->active_planes[0]->composer;
203a4e7e98eSRodrigo Siqueira 
204a4e7e98eSRodrigo Siqueira 	if (crtc_state->num_active_planes == 2)
205a4e7e98eSRodrigo Siqueira 		cursor_composer = crtc_state->active_planes[1]->composer;
206a4e7e98eSRodrigo Siqueira 
207*95302576SRodrigo Siqueira 	if (!primary_composer)
208*95302576SRodrigo Siqueira 		return;
209*95302576SRodrigo Siqueira 
210*95302576SRodrigo Siqueira 	ret = compose_planes(&vaddr_out, primary_composer, cursor_composer);
211*95302576SRodrigo Siqueira 	if (ret) {
212*95302576SRodrigo Siqueira 		if (ret == -EINVAL)
213*95302576SRodrigo Siqueira 			kfree(vaddr_out);
214*95302576SRodrigo Siqueira 		return;
215*95302576SRodrigo Siqueira 	}
216*95302576SRodrigo Siqueira 
217*95302576SRodrigo Siqueira 	crc32 = compute_crc(vaddr_out, primary_composer);
218a4e7e98eSRodrigo Siqueira 
219a4e7e98eSRodrigo Siqueira 	/*
220a4e7e98eSRodrigo Siqueira 	 * The worker can fall behind the vblank hrtimer, make sure we catch up.
221a4e7e98eSRodrigo Siqueira 	 */
222a4e7e98eSRodrigo Siqueira 	while (frame_start <= frame_end)
223a4e7e98eSRodrigo Siqueira 		drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32);
224*95302576SRodrigo Siqueira 
225*95302576SRodrigo Siqueira 	kfree(vaddr_out);
226a4e7e98eSRodrigo Siqueira }
227a4e7e98eSRodrigo Siqueira 
228a4e7e98eSRodrigo Siqueira static const char * const pipe_crc_sources[] = {"auto"};
229a4e7e98eSRodrigo Siqueira 
230a4e7e98eSRodrigo Siqueira const char *const *vkms_get_crc_sources(struct drm_crtc *crtc,
231a4e7e98eSRodrigo Siqueira 					size_t *count)
232a4e7e98eSRodrigo Siqueira {
233a4e7e98eSRodrigo Siqueira 	*count = ARRAY_SIZE(pipe_crc_sources);
234a4e7e98eSRodrigo Siqueira 	return pipe_crc_sources;
235a4e7e98eSRodrigo Siqueira }
236a4e7e98eSRodrigo Siqueira 
237a4e7e98eSRodrigo Siqueira static int vkms_crc_parse_source(const char *src_name, bool *enabled)
238a4e7e98eSRodrigo Siqueira {
239a4e7e98eSRodrigo Siqueira 	int ret = 0;
240a4e7e98eSRodrigo Siqueira 
241a4e7e98eSRodrigo Siqueira 	if (!src_name) {
242a4e7e98eSRodrigo Siqueira 		*enabled = false;
243a4e7e98eSRodrigo Siqueira 	} else if (strcmp(src_name, "auto") == 0) {
244a4e7e98eSRodrigo Siqueira 		*enabled = true;
245a4e7e98eSRodrigo Siqueira 	} else {
246a4e7e98eSRodrigo Siqueira 		*enabled = false;
247a4e7e98eSRodrigo Siqueira 		ret = -EINVAL;
248a4e7e98eSRodrigo Siqueira 	}
249a4e7e98eSRodrigo Siqueira 
250a4e7e98eSRodrigo Siqueira 	return ret;
251a4e7e98eSRodrigo Siqueira }
252a4e7e98eSRodrigo Siqueira 
253a4e7e98eSRodrigo Siqueira int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name,
254a4e7e98eSRodrigo Siqueira 			   size_t *values_cnt)
255a4e7e98eSRodrigo Siqueira {
256a4e7e98eSRodrigo Siqueira 	bool enabled;
257a4e7e98eSRodrigo Siqueira 
258a4e7e98eSRodrigo Siqueira 	if (vkms_crc_parse_source(src_name, &enabled) < 0) {
259a4e7e98eSRodrigo Siqueira 		DRM_DEBUG_DRIVER("unknown source %s\n", src_name);
260a4e7e98eSRodrigo Siqueira 		return -EINVAL;
261a4e7e98eSRodrigo Siqueira 	}
262a4e7e98eSRodrigo Siqueira 
263a4e7e98eSRodrigo Siqueira 	*values_cnt = 1;
264a4e7e98eSRodrigo Siqueira 
265a4e7e98eSRodrigo Siqueira 	return 0;
266a4e7e98eSRodrigo Siqueira }
267a4e7e98eSRodrigo Siqueira 
2685bd858d7SMelissa Wen static void vkms_set_composer(struct vkms_output *out, bool enabled)
2695bd858d7SMelissa Wen {
2705bd858d7SMelissa Wen 	bool old_enabled;
2715bd858d7SMelissa Wen 
2725bd858d7SMelissa Wen 	if (enabled)
2735bd858d7SMelissa Wen 		drm_crtc_vblank_get(&out->crtc);
2745bd858d7SMelissa Wen 
2755bd858d7SMelissa Wen 	spin_lock_irq(&out->lock);
2765bd858d7SMelissa Wen 	old_enabled = out->composer_enabled;
2775bd858d7SMelissa Wen 	out->composer_enabled = enabled;
2785bd858d7SMelissa Wen 	spin_unlock_irq(&out->lock);
2795bd858d7SMelissa Wen 
2805bd858d7SMelissa Wen 	if (old_enabled)
2815bd858d7SMelissa Wen 		drm_crtc_vblank_put(&out->crtc);
2825bd858d7SMelissa Wen }
2835bd858d7SMelissa Wen 
284a4e7e98eSRodrigo Siqueira int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name)
285a4e7e98eSRodrigo Siqueira {
286a4e7e98eSRodrigo Siqueira 	struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
287a4e7e98eSRodrigo Siqueira 	bool enabled = false;
288a4e7e98eSRodrigo Siqueira 	int ret = 0;
289a4e7e98eSRodrigo Siqueira 
290a4e7e98eSRodrigo Siqueira 	ret = vkms_crc_parse_source(src_name, &enabled);
291a4e7e98eSRodrigo Siqueira 
2925bd858d7SMelissa Wen 	vkms_set_composer(out, enabled);
293a4e7e98eSRodrigo Siqueira 
294a4e7e98eSRodrigo Siqueira 	return ret;
295a4e7e98eSRodrigo Siqueira }
296