1a4e7e98eSRodrigo Siqueira // SPDX-License-Identifier: GPL-2.0+ 2a4e7e98eSRodrigo Siqueira 3a4e7e98eSRodrigo Siqueira #include <linux/crc32.h> 4ce672a1bSSam Ravnborg 5a4e7e98eSRodrigo Siqueira #include <drm/drm_atomic.h> 6a4e7e98eSRodrigo Siqueira #include <drm/drm_atomic_helper.h> 7a4e7e98eSRodrigo Siqueira #include <drm/drm_gem_framebuffer_helper.h> 8*488c888aSDaniel Vetter #include <drm/drm_gem_shmem_helper.h> 9ce672a1bSSam Ravnborg #include <drm/drm_vblank.h> 10ce672a1bSSam Ravnborg 11ce672a1bSSam Ravnborg #include "vkms_drv.h" 12a4e7e98eSRodrigo Siqueira 1360cc2021SRodrigo Siqueira static u32 get_pixel_from_buffer(int x, int y, const u8 *buffer, 1460cc2021SRodrigo Siqueira const struct vkms_composer *composer) 1560cc2021SRodrigo Siqueira { 1660cc2021SRodrigo Siqueira u32 pixel; 1760cc2021SRodrigo Siqueira int src_offset = composer->offset + (y * composer->pitch) 1860cc2021SRodrigo Siqueira + (x * composer->cpp); 1960cc2021SRodrigo Siqueira 2060cc2021SRodrigo Siqueira pixel = *(u32 *)&buffer[src_offset]; 2160cc2021SRodrigo Siqueira 2260cc2021SRodrigo Siqueira return pixel; 2360cc2021SRodrigo Siqueira } 2460cc2021SRodrigo Siqueira 25a4e7e98eSRodrigo Siqueira /** 26a4e7e98eSRodrigo Siqueira * compute_crc - Compute CRC value on output frame 27a4e7e98eSRodrigo Siqueira * 2860cc2021SRodrigo Siqueira * @vaddr: address to final framebuffer 29a4e7e98eSRodrigo Siqueira * @composer: framebuffer's metadata 30a4e7e98eSRodrigo Siqueira * 31a4e7e98eSRodrigo Siqueira * returns CRC value computed using crc32 on the visible portion of 32a4e7e98eSRodrigo Siqueira * the final framebuffer at vaddr_out 33a4e7e98eSRodrigo Siqueira */ 3460cc2021SRodrigo Siqueira static uint32_t compute_crc(const u8 *vaddr, 3560cc2021SRodrigo Siqueira const struct vkms_composer *composer) 36a4e7e98eSRodrigo Siqueira { 3760cc2021SRodrigo Siqueira int x, y; 3860cc2021SRodrigo Siqueira u32 crc = 0, pixel = 0; 39a4e7e98eSRodrigo Siqueira int x_src = composer->src.x1 >> 16; 40a4e7e98eSRodrigo Siqueira int y_src = composer->src.y1 >> 16; 41a4e7e98eSRodrigo Siqueira int h_src = drm_rect_height(&composer->src) >> 16; 42a4e7e98eSRodrigo Siqueira int w_src = drm_rect_width(&composer->src) >> 16; 43a4e7e98eSRodrigo Siqueira 4460cc2021SRodrigo Siqueira for (y = y_src; y < y_src + h_src; ++y) { 4560cc2021SRodrigo Siqueira for (x = x_src; x < x_src + w_src; ++x) { 4660cc2021SRodrigo Siqueira pixel = get_pixel_from_buffer(x, y, vaddr, composer); 4760cc2021SRodrigo Siqueira crc = crc32_le(crc, (void *)&pixel, sizeof(u32)); 48a4e7e98eSRodrigo Siqueira } 49a4e7e98eSRodrigo Siqueira } 50a4e7e98eSRodrigo Siqueira 51a4e7e98eSRodrigo Siqueira return crc; 52a4e7e98eSRodrigo Siqueira } 53a4e7e98eSRodrigo Siqueira 5439cba5cfSMelissa Wen static u8 blend_channel(u8 src, u8 dst, u8 alpha) 5539cba5cfSMelissa Wen { 5639cba5cfSMelissa Wen u32 pre_blend; 5739cba5cfSMelissa Wen u8 new_color; 5839cba5cfSMelissa Wen 5939cba5cfSMelissa Wen pre_blend = (src * 255 + dst * (255 - alpha)); 6039cba5cfSMelissa Wen 6139cba5cfSMelissa Wen /* Faster div by 255 */ 6239cba5cfSMelissa Wen new_color = ((pre_blend + ((pre_blend + 257) >> 8)) >> 8); 6339cba5cfSMelissa Wen 6439cba5cfSMelissa Wen return new_color; 6539cba5cfSMelissa Wen } 6639cba5cfSMelissa Wen 6739cba5cfSMelissa Wen static void alpha_blending(const u8 *argb_src, u8 *argb_dst) 6839cba5cfSMelissa Wen { 6939cba5cfSMelissa Wen u8 alpha; 7039cba5cfSMelissa Wen 7139cba5cfSMelissa Wen alpha = argb_src[3]; 7239cba5cfSMelissa Wen argb_dst[0] = blend_channel(argb_src[0], argb_dst[0], alpha); 7339cba5cfSMelissa Wen argb_dst[1] = blend_channel(argb_src[1], argb_dst[1], alpha); 7439cba5cfSMelissa Wen argb_dst[2] = blend_channel(argb_src[2], argb_dst[2], alpha); 7539cba5cfSMelissa Wen /* Opaque primary */ 7639cba5cfSMelissa Wen argb_dst[3] = 0xFF; 7739cba5cfSMelissa Wen } 7839cba5cfSMelissa Wen 79a4e7e98eSRodrigo Siqueira /** 800530bbd0SGabriela Bittencourt * blend - blend value at vaddr_src with value at vaddr_dst 81a4e7e98eSRodrigo Siqueira * @vaddr_dst: destination address 82a4e7e98eSRodrigo Siqueira * @vaddr_src: source address 8339cba5cfSMelissa Wen * @dst_composer: destination framebuffer's metadata 84a4e7e98eSRodrigo Siqueira * @src_composer: source framebuffer's metadata 85a4e7e98eSRodrigo Siqueira * 8639cba5cfSMelissa Wen * Blend the vaddr_src value with the vaddr_dst value using the pre-multiplied 8739cba5cfSMelissa Wen * alpha blending equation, since DRM currently assumes that the pixel color 8839cba5cfSMelissa Wen * values have already been pre-multiplied with the alpha channel values. See 8939cba5cfSMelissa Wen * more drm_plane_create_blend_mode_property(). This function uses buffer's 9039cba5cfSMelissa Wen * metadata to locate the new composite values at vaddr_dst. 91a4e7e98eSRodrigo Siqueira */ 92a4e7e98eSRodrigo Siqueira static void blend(void *vaddr_dst, void *vaddr_src, 9339cba5cfSMelissa Wen struct vkms_composer *dst_composer, 94a4e7e98eSRodrigo Siqueira struct vkms_composer *src_composer) 95a4e7e98eSRodrigo Siqueira { 96a4e7e98eSRodrigo Siqueira int i, j, j_dst, i_dst; 97a4e7e98eSRodrigo Siqueira int offset_src, offset_dst; 9839cba5cfSMelissa Wen u8 *pixel_dst, *pixel_src; 99a4e7e98eSRodrigo Siqueira 100a4e7e98eSRodrigo Siqueira int x_src = src_composer->src.x1 >> 16; 101a4e7e98eSRodrigo Siqueira int y_src = src_composer->src.y1 >> 16; 102a4e7e98eSRodrigo Siqueira 103a4e7e98eSRodrigo Siqueira int x_dst = src_composer->dst.x1; 104a4e7e98eSRodrigo Siqueira int y_dst = src_composer->dst.y1; 105a4e7e98eSRodrigo Siqueira int h_dst = drm_rect_height(&src_composer->dst); 106a4e7e98eSRodrigo Siqueira int w_dst = drm_rect_width(&src_composer->dst); 107a4e7e98eSRodrigo Siqueira 108a4e7e98eSRodrigo Siqueira int y_limit = y_src + h_dst; 109a4e7e98eSRodrigo Siqueira int x_limit = x_src + w_dst; 110a4e7e98eSRodrigo Siqueira 111a4e7e98eSRodrigo Siqueira for (i = y_src, i_dst = y_dst; i < y_limit; ++i) { 112a4e7e98eSRodrigo Siqueira for (j = x_src, j_dst = x_dst; j < x_limit; ++j) { 11339cba5cfSMelissa Wen offset_dst = dst_composer->offset 11439cba5cfSMelissa Wen + (i_dst * dst_composer->pitch) 11539cba5cfSMelissa Wen + (j_dst++ * dst_composer->cpp); 116a4e7e98eSRodrigo Siqueira offset_src = src_composer->offset 117a4e7e98eSRodrigo Siqueira + (i * src_composer->pitch) 118a4e7e98eSRodrigo Siqueira + (j * src_composer->cpp); 119a4e7e98eSRodrigo Siqueira 12039cba5cfSMelissa Wen pixel_src = (u8 *)(vaddr_src + offset_src); 12139cba5cfSMelissa Wen pixel_dst = (u8 *)(vaddr_dst + offset_dst); 12239cba5cfSMelissa Wen alpha_blending(pixel_src, pixel_dst); 123a4e7e98eSRodrigo Siqueira } 124a4e7e98eSRodrigo Siqueira i_dst++; 125a4e7e98eSRodrigo Siqueira } 126a4e7e98eSRodrigo Siqueira } 127a4e7e98eSRodrigo Siqueira 128a4e7e98eSRodrigo Siqueira static void compose_cursor(struct vkms_composer *cursor_composer, 129a4e7e98eSRodrigo Siqueira struct vkms_composer *primary_composer, 130a4e7e98eSRodrigo Siqueira void *vaddr_out) 131a4e7e98eSRodrigo Siqueira { 132a4e7e98eSRodrigo Siqueira struct drm_gem_object *cursor_obj; 133*488c888aSDaniel Vetter struct drm_gem_shmem_object *cursor_shmem_obj; 134a4e7e98eSRodrigo Siqueira 135a4e7e98eSRodrigo Siqueira cursor_obj = drm_gem_fb_get_obj(&cursor_composer->fb, 0); 136*488c888aSDaniel Vetter cursor_shmem_obj = to_drm_gem_shmem_obj(cursor_obj); 137a4e7e98eSRodrigo Siqueira 138*488c888aSDaniel Vetter if (WARN_ON(!cursor_shmem_obj->vaddr)) 139a4e7e98eSRodrigo Siqueira return; 140a4e7e98eSRodrigo Siqueira 141*488c888aSDaniel Vetter blend(vaddr_out, cursor_shmem_obj->vaddr, 142a4e7e98eSRodrigo Siqueira primary_composer, cursor_composer); 143a4e7e98eSRodrigo Siqueira } 144a4e7e98eSRodrigo Siqueira 14595302576SRodrigo Siqueira static int compose_planes(void **vaddr_out, 14695302576SRodrigo Siqueira struct vkms_composer *primary_composer, 147a4e7e98eSRodrigo Siqueira struct vkms_composer *cursor_composer) 148a4e7e98eSRodrigo Siqueira { 149a4e7e98eSRodrigo Siqueira struct drm_framebuffer *fb = &primary_composer->fb; 150a4e7e98eSRodrigo Siqueira struct drm_gem_object *gem_obj = drm_gem_fb_get_obj(fb, 0); 151*488c888aSDaniel Vetter struct drm_gem_shmem_object *shmem_obj = to_drm_gem_shmem_obj(gem_obj); 152a4e7e98eSRodrigo Siqueira 15395302576SRodrigo Siqueira if (!*vaddr_out) { 154*488c888aSDaniel Vetter *vaddr_out = kzalloc(shmem_obj->base.size, GFP_KERNEL); 15595302576SRodrigo Siqueira if (!*vaddr_out) { 15695302576SRodrigo Siqueira DRM_ERROR("Cannot allocate memory for output frame."); 15795302576SRodrigo Siqueira return -ENOMEM; 15895302576SRodrigo Siqueira } 159a4e7e98eSRodrigo Siqueira } 160a4e7e98eSRodrigo Siqueira 161*488c888aSDaniel Vetter if (WARN_ON(!shmem_obj->vaddr)) 16295302576SRodrigo Siqueira return -EINVAL; 163a4e7e98eSRodrigo Siqueira 164*488c888aSDaniel Vetter memcpy(*vaddr_out, shmem_obj->vaddr, shmem_obj->base.size); 165a4e7e98eSRodrigo Siqueira 166a4e7e98eSRodrigo Siqueira if (cursor_composer) 16795302576SRodrigo Siqueira compose_cursor(cursor_composer, primary_composer, *vaddr_out); 168a4e7e98eSRodrigo Siqueira 16995302576SRodrigo Siqueira return 0; 170a4e7e98eSRodrigo Siqueira } 171a4e7e98eSRodrigo Siqueira 172a4e7e98eSRodrigo Siqueira /** 173a4e7e98eSRodrigo Siqueira * vkms_composer_worker - ordered work_struct to compute CRC 174a4e7e98eSRodrigo Siqueira * 175a4e7e98eSRodrigo Siqueira * @work: work_struct 176a4e7e98eSRodrigo Siqueira * 177a4e7e98eSRodrigo Siqueira * Work handler for composing and computing CRCs. work_struct scheduled in 178a4e7e98eSRodrigo Siqueira * an ordered workqueue that's periodically scheduled to run by 179a4e7e98eSRodrigo Siqueira * _vblank_handle() and flushed at vkms_atomic_crtc_destroy_state(). 180a4e7e98eSRodrigo Siqueira */ 181a4e7e98eSRodrigo Siqueira void vkms_composer_worker(struct work_struct *work) 182a4e7e98eSRodrigo Siqueira { 183a4e7e98eSRodrigo Siqueira struct vkms_crtc_state *crtc_state = container_of(work, 184a4e7e98eSRodrigo Siqueira struct vkms_crtc_state, 185a4e7e98eSRodrigo Siqueira composer_work); 186a4e7e98eSRodrigo Siqueira struct drm_crtc *crtc = crtc_state->base.crtc; 187a4e7e98eSRodrigo Siqueira struct vkms_output *out = drm_crtc_to_vkms_output(crtc); 188a4e7e98eSRodrigo Siqueira struct vkms_composer *primary_composer = NULL; 189a4e7e98eSRodrigo Siqueira struct vkms_composer *cursor_composer = NULL; 190dbd9d80cSRodrigo Siqueira bool crc_pending, wb_pending; 19195302576SRodrigo Siqueira void *vaddr_out = NULL; 192a4e7e98eSRodrigo Siqueira u32 crc32 = 0; 193a4e7e98eSRodrigo Siqueira u64 frame_start, frame_end; 19495302576SRodrigo Siqueira int ret; 195a4e7e98eSRodrigo Siqueira 196a4e7e98eSRodrigo Siqueira spin_lock_irq(&out->composer_lock); 197a4e7e98eSRodrigo Siqueira frame_start = crtc_state->frame_start; 198a4e7e98eSRodrigo Siqueira frame_end = crtc_state->frame_end; 199a4e7e98eSRodrigo Siqueira crc_pending = crtc_state->crc_pending; 200dbd9d80cSRodrigo Siqueira wb_pending = crtc_state->wb_pending; 201a4e7e98eSRodrigo Siqueira crtc_state->frame_start = 0; 202a4e7e98eSRodrigo Siqueira crtc_state->frame_end = 0; 203a4e7e98eSRodrigo Siqueira crtc_state->crc_pending = false; 204a4e7e98eSRodrigo Siqueira spin_unlock_irq(&out->composer_lock); 205a4e7e98eSRodrigo Siqueira 206a4e7e98eSRodrigo Siqueira /* 207a4e7e98eSRodrigo Siqueira * We raced with the vblank hrtimer and previous work already computed 208a4e7e98eSRodrigo Siqueira * the crc, nothing to do. 209a4e7e98eSRodrigo Siqueira */ 210a4e7e98eSRodrigo Siqueira if (!crc_pending) 211a4e7e98eSRodrigo Siqueira return; 212a4e7e98eSRodrigo Siqueira 213a4e7e98eSRodrigo Siqueira if (crtc_state->num_active_planes >= 1) 214a4e7e98eSRodrigo Siqueira primary_composer = crtc_state->active_planes[0]->composer; 215a4e7e98eSRodrigo Siqueira 216a4e7e98eSRodrigo Siqueira if (crtc_state->num_active_planes == 2) 217a4e7e98eSRodrigo Siqueira cursor_composer = crtc_state->active_planes[1]->composer; 218a4e7e98eSRodrigo Siqueira 21995302576SRodrigo Siqueira if (!primary_composer) 22095302576SRodrigo Siqueira return; 22195302576SRodrigo Siqueira 222dbd9d80cSRodrigo Siqueira if (wb_pending) 223dbd9d80cSRodrigo Siqueira vaddr_out = crtc_state->active_writeback; 224dbd9d80cSRodrigo Siqueira 22595302576SRodrigo Siqueira ret = compose_planes(&vaddr_out, primary_composer, cursor_composer); 22695302576SRodrigo Siqueira if (ret) { 227dbd9d80cSRodrigo Siqueira if (ret == -EINVAL && !wb_pending) 22895302576SRodrigo Siqueira kfree(vaddr_out); 22995302576SRodrigo Siqueira return; 23095302576SRodrigo Siqueira } 23195302576SRodrigo Siqueira 23295302576SRodrigo Siqueira crc32 = compute_crc(vaddr_out, primary_composer); 233a4e7e98eSRodrigo Siqueira 234dbd9d80cSRodrigo Siqueira if (wb_pending) { 235dbd9d80cSRodrigo Siqueira drm_writeback_signal_completion(&out->wb_connector, 0); 236dbd9d80cSRodrigo Siqueira spin_lock_irq(&out->composer_lock); 237dbd9d80cSRodrigo Siqueira crtc_state->wb_pending = false; 238dbd9d80cSRodrigo Siqueira spin_unlock_irq(&out->composer_lock); 239dbd9d80cSRodrigo Siqueira } else { 240dbd9d80cSRodrigo Siqueira kfree(vaddr_out); 241dbd9d80cSRodrigo Siqueira } 242dbd9d80cSRodrigo Siqueira 243a4e7e98eSRodrigo Siqueira /* 244a4e7e98eSRodrigo Siqueira * The worker can fall behind the vblank hrtimer, make sure we catch up. 245a4e7e98eSRodrigo Siqueira */ 246a4e7e98eSRodrigo Siqueira while (frame_start <= frame_end) 247a4e7e98eSRodrigo Siqueira drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32); 248a4e7e98eSRodrigo Siqueira } 249a4e7e98eSRodrigo Siqueira 250a4e7e98eSRodrigo Siqueira static const char * const pipe_crc_sources[] = {"auto"}; 251a4e7e98eSRodrigo Siqueira 252a4e7e98eSRodrigo Siqueira const char *const *vkms_get_crc_sources(struct drm_crtc *crtc, 253a4e7e98eSRodrigo Siqueira size_t *count) 254a4e7e98eSRodrigo Siqueira { 255a4e7e98eSRodrigo Siqueira *count = ARRAY_SIZE(pipe_crc_sources); 256a4e7e98eSRodrigo Siqueira return pipe_crc_sources; 257a4e7e98eSRodrigo Siqueira } 258a4e7e98eSRodrigo Siqueira 259a4e7e98eSRodrigo Siqueira static int vkms_crc_parse_source(const char *src_name, bool *enabled) 260a4e7e98eSRodrigo Siqueira { 261a4e7e98eSRodrigo Siqueira int ret = 0; 262a4e7e98eSRodrigo Siqueira 263a4e7e98eSRodrigo Siqueira if (!src_name) { 264a4e7e98eSRodrigo Siqueira *enabled = false; 265a4e7e98eSRodrigo Siqueira } else if (strcmp(src_name, "auto") == 0) { 266a4e7e98eSRodrigo Siqueira *enabled = true; 267a4e7e98eSRodrigo Siqueira } else { 268a4e7e98eSRodrigo Siqueira *enabled = false; 269a4e7e98eSRodrigo Siqueira ret = -EINVAL; 270a4e7e98eSRodrigo Siqueira } 271a4e7e98eSRodrigo Siqueira 272a4e7e98eSRodrigo Siqueira return ret; 273a4e7e98eSRodrigo Siqueira } 274a4e7e98eSRodrigo Siqueira 275a4e7e98eSRodrigo Siqueira int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name, 276a4e7e98eSRodrigo Siqueira size_t *values_cnt) 277a4e7e98eSRodrigo Siqueira { 278a4e7e98eSRodrigo Siqueira bool enabled; 279a4e7e98eSRodrigo Siqueira 280a4e7e98eSRodrigo Siqueira if (vkms_crc_parse_source(src_name, &enabled) < 0) { 281a4e7e98eSRodrigo Siqueira DRM_DEBUG_DRIVER("unknown source %s\n", src_name); 282a4e7e98eSRodrigo Siqueira return -EINVAL; 283a4e7e98eSRodrigo Siqueira } 284a4e7e98eSRodrigo Siqueira 285a4e7e98eSRodrigo Siqueira *values_cnt = 1; 286a4e7e98eSRodrigo Siqueira 287a4e7e98eSRodrigo Siqueira return 0; 288a4e7e98eSRodrigo Siqueira } 289a4e7e98eSRodrigo Siqueira 290dbd9d80cSRodrigo Siqueira void vkms_set_composer(struct vkms_output *out, bool enabled) 2915bd858d7SMelissa Wen { 2925bd858d7SMelissa Wen bool old_enabled; 2935bd858d7SMelissa Wen 2945bd858d7SMelissa Wen if (enabled) 2955bd858d7SMelissa Wen drm_crtc_vblank_get(&out->crtc); 2965bd858d7SMelissa Wen 2975bd858d7SMelissa Wen spin_lock_irq(&out->lock); 2985bd858d7SMelissa Wen old_enabled = out->composer_enabled; 2995bd858d7SMelissa Wen out->composer_enabled = enabled; 3005bd858d7SMelissa Wen spin_unlock_irq(&out->lock); 3015bd858d7SMelissa Wen 3025bd858d7SMelissa Wen if (old_enabled) 3035bd858d7SMelissa Wen drm_crtc_vblank_put(&out->crtc); 3045bd858d7SMelissa Wen } 3055bd858d7SMelissa Wen 306a4e7e98eSRodrigo Siqueira int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name) 307a4e7e98eSRodrigo Siqueira { 308a4e7e98eSRodrigo Siqueira struct vkms_output *out = drm_crtc_to_vkms_output(crtc); 309a4e7e98eSRodrigo Siqueira bool enabled = false; 310a4e7e98eSRodrigo Siqueira int ret = 0; 311a4e7e98eSRodrigo Siqueira 312a4e7e98eSRodrigo Siqueira ret = vkms_crc_parse_source(src_name, &enabled); 313a4e7e98eSRodrigo Siqueira 3145bd858d7SMelissa Wen vkms_set_composer(out, enabled); 315a4e7e98eSRodrigo Siqueira 316a4e7e98eSRodrigo Siqueira return ret; 317a4e7e98eSRodrigo Siqueira } 318