1a4e7e98eSRodrigo Siqueira // SPDX-License-Identifier: GPL-2.0+ 2a4e7e98eSRodrigo Siqueira 3a4e7e98eSRodrigo Siqueira #include <linux/crc32.h> 4ce672a1bSSam Ravnborg 5a4e7e98eSRodrigo Siqueira #include <drm/drm_atomic.h> 6a4e7e98eSRodrigo Siqueira #include <drm/drm_atomic_helper.h> 7*32a1648aSMelissa Wen #include <drm/drm_fourcc.h> 8a4e7e98eSRodrigo Siqueira #include <drm/drm_gem_framebuffer_helper.h> 9488c888aSDaniel Vetter #include <drm/drm_gem_shmem_helper.h> 10ce672a1bSSam Ravnborg #include <drm/drm_vblank.h> 11ce672a1bSSam Ravnborg 12ce672a1bSSam Ravnborg #include "vkms_drv.h" 13a4e7e98eSRodrigo Siqueira 1460cc2021SRodrigo Siqueira static u32 get_pixel_from_buffer(int x, int y, const u8 *buffer, 1560cc2021SRodrigo Siqueira const struct vkms_composer *composer) 1660cc2021SRodrigo Siqueira { 1760cc2021SRodrigo Siqueira u32 pixel; 1860cc2021SRodrigo Siqueira int src_offset = composer->offset + (y * composer->pitch) 1960cc2021SRodrigo Siqueira + (x * composer->cpp); 2060cc2021SRodrigo Siqueira 2160cc2021SRodrigo Siqueira pixel = *(u32 *)&buffer[src_offset]; 2260cc2021SRodrigo Siqueira 2360cc2021SRodrigo Siqueira return pixel; 2460cc2021SRodrigo Siqueira } 2560cc2021SRodrigo Siqueira 26a4e7e98eSRodrigo Siqueira /** 27a4e7e98eSRodrigo Siqueira * compute_crc - Compute CRC value on output frame 28a4e7e98eSRodrigo Siqueira * 2960cc2021SRodrigo Siqueira * @vaddr: address to final framebuffer 30a4e7e98eSRodrigo Siqueira * @composer: framebuffer's metadata 31a4e7e98eSRodrigo Siqueira * 32a4e7e98eSRodrigo Siqueira * returns CRC value computed using crc32 on the visible portion of 33a4e7e98eSRodrigo Siqueira * the final framebuffer at vaddr_out 34a4e7e98eSRodrigo Siqueira */ 3560cc2021SRodrigo Siqueira static uint32_t compute_crc(const u8 *vaddr, 3660cc2021SRodrigo Siqueira const struct vkms_composer *composer) 37a4e7e98eSRodrigo Siqueira { 3860cc2021SRodrigo Siqueira int x, y; 3960cc2021SRodrigo Siqueira u32 crc = 0, pixel = 0; 40a4e7e98eSRodrigo Siqueira int x_src = composer->src.x1 >> 16; 41a4e7e98eSRodrigo Siqueira int y_src = composer->src.y1 >> 16; 42a4e7e98eSRodrigo Siqueira int h_src = drm_rect_height(&composer->src) >> 16; 43a4e7e98eSRodrigo Siqueira int w_src = drm_rect_width(&composer->src) >> 16; 44a4e7e98eSRodrigo Siqueira 4560cc2021SRodrigo Siqueira for (y = y_src; y < y_src + h_src; ++y) { 4660cc2021SRodrigo Siqueira for (x = x_src; x < x_src + w_src; ++x) { 4760cc2021SRodrigo Siqueira pixel = get_pixel_from_buffer(x, y, vaddr, composer); 4860cc2021SRodrigo Siqueira crc = crc32_le(crc, (void *)&pixel, sizeof(u32)); 49a4e7e98eSRodrigo Siqueira } 50a4e7e98eSRodrigo Siqueira } 51a4e7e98eSRodrigo Siqueira 52a4e7e98eSRodrigo Siqueira return crc; 53a4e7e98eSRodrigo Siqueira } 54a4e7e98eSRodrigo Siqueira 5539cba5cfSMelissa Wen static u8 blend_channel(u8 src, u8 dst, u8 alpha) 5639cba5cfSMelissa Wen { 5739cba5cfSMelissa Wen u32 pre_blend; 5839cba5cfSMelissa Wen u8 new_color; 5939cba5cfSMelissa Wen 6039cba5cfSMelissa Wen pre_blend = (src * 255 + dst * (255 - alpha)); 6139cba5cfSMelissa Wen 6239cba5cfSMelissa Wen /* Faster div by 255 */ 6339cba5cfSMelissa Wen new_color = ((pre_blend + ((pre_blend + 257) >> 8)) >> 8); 6439cba5cfSMelissa Wen 6539cba5cfSMelissa Wen return new_color; 6639cba5cfSMelissa Wen } 6739cba5cfSMelissa Wen 68*32a1648aSMelissa Wen /** 69*32a1648aSMelissa Wen * alpha_blend - alpha blending equation 70*32a1648aSMelissa Wen * @argb_src: src pixel on premultiplied alpha mode 71*32a1648aSMelissa Wen * @argb_dst: dst pixel completely opaque 72*32a1648aSMelissa Wen * 73*32a1648aSMelissa Wen * blend pixels using premultiplied blend formula. The current DRM assumption 74*32a1648aSMelissa Wen * is that pixel color values have been already pre-multiplied with the alpha 75*32a1648aSMelissa Wen * channel values. See more drm_plane_create_blend_mode_property(). Also, this 76*32a1648aSMelissa Wen * formula assumes a completely opaque background. 77*32a1648aSMelissa Wen */ 78*32a1648aSMelissa Wen static void alpha_blend(const u8 *argb_src, u8 *argb_dst) 7939cba5cfSMelissa Wen { 8039cba5cfSMelissa Wen u8 alpha; 8139cba5cfSMelissa Wen 8239cba5cfSMelissa Wen alpha = argb_src[3]; 8339cba5cfSMelissa Wen argb_dst[0] = blend_channel(argb_src[0], argb_dst[0], alpha); 8439cba5cfSMelissa Wen argb_dst[1] = blend_channel(argb_src[1], argb_dst[1], alpha); 8539cba5cfSMelissa Wen argb_dst[2] = blend_channel(argb_src[2], argb_dst[2], alpha); 86*32a1648aSMelissa Wen } 87*32a1648aSMelissa Wen 88*32a1648aSMelissa Wen /** 89*32a1648aSMelissa Wen * x_blend - blending equation that ignores the pixel alpha 90*32a1648aSMelissa Wen * 91*32a1648aSMelissa Wen * overwrites RGB color value from src pixel to dst pixel. 92*32a1648aSMelissa Wen */ 93*32a1648aSMelissa Wen static void x_blend(const u8 *xrgb_src, u8 *xrgb_dst) 94*32a1648aSMelissa Wen { 95*32a1648aSMelissa Wen memcpy(xrgb_dst, xrgb_src, sizeof(u8) * 3); 9639cba5cfSMelissa Wen } 9739cba5cfSMelissa Wen 98a4e7e98eSRodrigo Siqueira /** 990530bbd0SGabriela Bittencourt * blend - blend value at vaddr_src with value at vaddr_dst 100a4e7e98eSRodrigo Siqueira * @vaddr_dst: destination address 101a4e7e98eSRodrigo Siqueira * @vaddr_src: source address 10239cba5cfSMelissa Wen * @dst_composer: destination framebuffer's metadata 103a4e7e98eSRodrigo Siqueira * @src_composer: source framebuffer's metadata 104*32a1648aSMelissa Wen * @pixel_blend: blending equation based on plane format 105a4e7e98eSRodrigo Siqueira * 106*32a1648aSMelissa Wen * Blend the vaddr_src value with the vaddr_dst value using a pixel blend 107*32a1648aSMelissa Wen * equation according to the supported plane formats DRM_FORMAT_(A/XRGB8888) 108*32a1648aSMelissa Wen * and clearing alpha channel to an completely opaque background. This function 109*32a1648aSMelissa Wen * uses buffer's metadata to locate the new composite values at vaddr_dst. 110*32a1648aSMelissa Wen * 111*32a1648aSMelissa Wen * TODO: completely clear the primary plane (a = 0xff) before starting to blend 112*32a1648aSMelissa Wen * pixel color values 113a4e7e98eSRodrigo Siqueira */ 114a4e7e98eSRodrigo Siqueira static void blend(void *vaddr_dst, void *vaddr_src, 11539cba5cfSMelissa Wen struct vkms_composer *dst_composer, 116*32a1648aSMelissa Wen struct vkms_composer *src_composer, 117*32a1648aSMelissa Wen void (*pixel_blend)(const u8 *, u8 *)) 118a4e7e98eSRodrigo Siqueira { 119a4e7e98eSRodrigo Siqueira int i, j, j_dst, i_dst; 120a4e7e98eSRodrigo Siqueira int offset_src, offset_dst; 12139cba5cfSMelissa Wen u8 *pixel_dst, *pixel_src; 122a4e7e98eSRodrigo Siqueira 123a4e7e98eSRodrigo Siqueira int x_src = src_composer->src.x1 >> 16; 124a4e7e98eSRodrigo Siqueira int y_src = src_composer->src.y1 >> 16; 125a4e7e98eSRodrigo Siqueira 126a4e7e98eSRodrigo Siqueira int x_dst = src_composer->dst.x1; 127a4e7e98eSRodrigo Siqueira int y_dst = src_composer->dst.y1; 128a4e7e98eSRodrigo Siqueira int h_dst = drm_rect_height(&src_composer->dst); 129a4e7e98eSRodrigo Siqueira int w_dst = drm_rect_width(&src_composer->dst); 130a4e7e98eSRodrigo Siqueira 131a4e7e98eSRodrigo Siqueira int y_limit = y_src + h_dst; 132a4e7e98eSRodrigo Siqueira int x_limit = x_src + w_dst; 133a4e7e98eSRodrigo Siqueira 134a4e7e98eSRodrigo Siqueira for (i = y_src, i_dst = y_dst; i < y_limit; ++i) { 135a4e7e98eSRodrigo Siqueira for (j = x_src, j_dst = x_dst; j < x_limit; ++j) { 13639cba5cfSMelissa Wen offset_dst = dst_composer->offset 13739cba5cfSMelissa Wen + (i_dst * dst_composer->pitch) 13839cba5cfSMelissa Wen + (j_dst++ * dst_composer->cpp); 139a4e7e98eSRodrigo Siqueira offset_src = src_composer->offset 140a4e7e98eSRodrigo Siqueira + (i * src_composer->pitch) 141a4e7e98eSRodrigo Siqueira + (j * src_composer->cpp); 142a4e7e98eSRodrigo Siqueira 14339cba5cfSMelissa Wen pixel_src = (u8 *)(vaddr_src + offset_src); 14439cba5cfSMelissa Wen pixel_dst = (u8 *)(vaddr_dst + offset_dst); 145*32a1648aSMelissa Wen pixel_blend(pixel_src, pixel_dst); 146*32a1648aSMelissa Wen /* clearing alpha channel (0xff)*/ 147*32a1648aSMelissa Wen pixel_dst[3] = 0xff; 148a4e7e98eSRodrigo Siqueira } 149a4e7e98eSRodrigo Siqueira i_dst++; 150a4e7e98eSRodrigo Siqueira } 151a4e7e98eSRodrigo Siqueira } 152a4e7e98eSRodrigo Siqueira 153cac80e71SMelissa Wen static void compose_plane(struct vkms_composer *primary_composer, 154cac80e71SMelissa Wen struct vkms_composer *plane_composer, 155a4e7e98eSRodrigo Siqueira void *vaddr_out) 156a4e7e98eSRodrigo Siqueira { 157cac80e71SMelissa Wen struct drm_gem_object *plane_obj; 158cac80e71SMelissa Wen struct drm_gem_shmem_object *plane_shmem_obj; 159*32a1648aSMelissa Wen struct drm_framebuffer *fb = &plane_composer->fb; 160*32a1648aSMelissa Wen void (*pixel_blend)(const u8 *p_src, u8 *p_dst); 161a4e7e98eSRodrigo Siqueira 162cac80e71SMelissa Wen plane_obj = drm_gem_fb_get_obj(&plane_composer->fb, 0); 163cac80e71SMelissa Wen plane_shmem_obj = to_drm_gem_shmem_obj(plane_obj); 164a4e7e98eSRodrigo Siqueira 165cac80e71SMelissa Wen if (WARN_ON(!plane_shmem_obj->vaddr)) 166a4e7e98eSRodrigo Siqueira return; 167a4e7e98eSRodrigo Siqueira 168*32a1648aSMelissa Wen if (fb->format->format == DRM_FORMAT_ARGB8888) 169*32a1648aSMelissa Wen pixel_blend = &alpha_blend; 170*32a1648aSMelissa Wen else 171*32a1648aSMelissa Wen pixel_blend = &x_blend; 172*32a1648aSMelissa Wen 173*32a1648aSMelissa Wen blend(vaddr_out, plane_shmem_obj->vaddr, primary_composer, 174*32a1648aSMelissa Wen plane_composer, pixel_blend); 175a4e7e98eSRodrigo Siqueira } 176a4e7e98eSRodrigo Siqueira 177cac80e71SMelissa Wen static int compose_active_planes(void **vaddr_out, 17895302576SRodrigo Siqueira struct vkms_composer *primary_composer, 179a4e7e98eSRodrigo Siqueira struct vkms_composer *cursor_composer) 180a4e7e98eSRodrigo Siqueira { 181a4e7e98eSRodrigo Siqueira struct drm_framebuffer *fb = &primary_composer->fb; 182a4e7e98eSRodrigo Siqueira struct drm_gem_object *gem_obj = drm_gem_fb_get_obj(fb, 0); 183488c888aSDaniel Vetter struct drm_gem_shmem_object *shmem_obj = to_drm_gem_shmem_obj(gem_obj); 184a4e7e98eSRodrigo Siqueira 18595302576SRodrigo Siqueira if (!*vaddr_out) { 186488c888aSDaniel Vetter *vaddr_out = kzalloc(shmem_obj->base.size, GFP_KERNEL); 18795302576SRodrigo Siqueira if (!*vaddr_out) { 18895302576SRodrigo Siqueira DRM_ERROR("Cannot allocate memory for output frame."); 18995302576SRodrigo Siqueira return -ENOMEM; 19095302576SRodrigo Siqueira } 191a4e7e98eSRodrigo Siqueira } 192a4e7e98eSRodrigo Siqueira 193488c888aSDaniel Vetter if (WARN_ON(!shmem_obj->vaddr)) 19495302576SRodrigo Siqueira return -EINVAL; 195a4e7e98eSRodrigo Siqueira 196488c888aSDaniel Vetter memcpy(*vaddr_out, shmem_obj->vaddr, shmem_obj->base.size); 197a4e7e98eSRodrigo Siqueira 198a4e7e98eSRodrigo Siqueira if (cursor_composer) 199cac80e71SMelissa Wen compose_plane(primary_composer, cursor_composer, *vaddr_out); 200a4e7e98eSRodrigo Siqueira 20195302576SRodrigo Siqueira return 0; 202a4e7e98eSRodrigo Siqueira } 203a4e7e98eSRodrigo Siqueira 204a4e7e98eSRodrigo Siqueira /** 205a4e7e98eSRodrigo Siqueira * vkms_composer_worker - ordered work_struct to compute CRC 206a4e7e98eSRodrigo Siqueira * 207a4e7e98eSRodrigo Siqueira * @work: work_struct 208a4e7e98eSRodrigo Siqueira * 209a4e7e98eSRodrigo Siqueira * Work handler for composing and computing CRCs. work_struct scheduled in 210a4e7e98eSRodrigo Siqueira * an ordered workqueue that's periodically scheduled to run by 211a4e7e98eSRodrigo Siqueira * _vblank_handle() and flushed at vkms_atomic_crtc_destroy_state(). 212a4e7e98eSRodrigo Siqueira */ 213a4e7e98eSRodrigo Siqueira void vkms_composer_worker(struct work_struct *work) 214a4e7e98eSRodrigo Siqueira { 215a4e7e98eSRodrigo Siqueira struct vkms_crtc_state *crtc_state = container_of(work, 216a4e7e98eSRodrigo Siqueira struct vkms_crtc_state, 217a4e7e98eSRodrigo Siqueira composer_work); 218a4e7e98eSRodrigo Siqueira struct drm_crtc *crtc = crtc_state->base.crtc; 219a4e7e98eSRodrigo Siqueira struct vkms_output *out = drm_crtc_to_vkms_output(crtc); 220a4e7e98eSRodrigo Siqueira struct vkms_composer *primary_composer = NULL; 221a4e7e98eSRodrigo Siqueira struct vkms_composer *cursor_composer = NULL; 222dbd9d80cSRodrigo Siqueira bool crc_pending, wb_pending; 22395302576SRodrigo Siqueira void *vaddr_out = NULL; 224a4e7e98eSRodrigo Siqueira u32 crc32 = 0; 225a4e7e98eSRodrigo Siqueira u64 frame_start, frame_end; 22695302576SRodrigo Siqueira int ret; 227a4e7e98eSRodrigo Siqueira 228a4e7e98eSRodrigo Siqueira spin_lock_irq(&out->composer_lock); 229a4e7e98eSRodrigo Siqueira frame_start = crtc_state->frame_start; 230a4e7e98eSRodrigo Siqueira frame_end = crtc_state->frame_end; 231a4e7e98eSRodrigo Siqueira crc_pending = crtc_state->crc_pending; 232dbd9d80cSRodrigo Siqueira wb_pending = crtc_state->wb_pending; 233a4e7e98eSRodrigo Siqueira crtc_state->frame_start = 0; 234a4e7e98eSRodrigo Siqueira crtc_state->frame_end = 0; 235a4e7e98eSRodrigo Siqueira crtc_state->crc_pending = false; 236a4e7e98eSRodrigo Siqueira spin_unlock_irq(&out->composer_lock); 237a4e7e98eSRodrigo Siqueira 238a4e7e98eSRodrigo Siqueira /* 239a4e7e98eSRodrigo Siqueira * We raced with the vblank hrtimer and previous work already computed 240a4e7e98eSRodrigo Siqueira * the crc, nothing to do. 241a4e7e98eSRodrigo Siqueira */ 242a4e7e98eSRodrigo Siqueira if (!crc_pending) 243a4e7e98eSRodrigo Siqueira return; 244a4e7e98eSRodrigo Siqueira 245a4e7e98eSRodrigo Siqueira if (crtc_state->num_active_planes >= 1) 246a4e7e98eSRodrigo Siqueira primary_composer = crtc_state->active_planes[0]->composer; 247a4e7e98eSRodrigo Siqueira 248a4e7e98eSRodrigo Siqueira if (crtc_state->num_active_planes == 2) 249a4e7e98eSRodrigo Siqueira cursor_composer = crtc_state->active_planes[1]->composer; 250a4e7e98eSRodrigo Siqueira 25195302576SRodrigo Siqueira if (!primary_composer) 25295302576SRodrigo Siqueira return; 25395302576SRodrigo Siqueira 254dbd9d80cSRodrigo Siqueira if (wb_pending) 255dbd9d80cSRodrigo Siqueira vaddr_out = crtc_state->active_writeback; 256dbd9d80cSRodrigo Siqueira 257cac80e71SMelissa Wen ret = compose_active_planes(&vaddr_out, primary_composer, 258cac80e71SMelissa Wen cursor_composer); 25995302576SRodrigo Siqueira if (ret) { 260dbd9d80cSRodrigo Siqueira if (ret == -EINVAL && !wb_pending) 26195302576SRodrigo Siqueira kfree(vaddr_out); 26295302576SRodrigo Siqueira return; 26395302576SRodrigo Siqueira } 26495302576SRodrigo Siqueira 26595302576SRodrigo Siqueira crc32 = compute_crc(vaddr_out, primary_composer); 266a4e7e98eSRodrigo Siqueira 267dbd9d80cSRodrigo Siqueira if (wb_pending) { 268dbd9d80cSRodrigo Siqueira drm_writeback_signal_completion(&out->wb_connector, 0); 269dbd9d80cSRodrigo Siqueira spin_lock_irq(&out->composer_lock); 270dbd9d80cSRodrigo Siqueira crtc_state->wb_pending = false; 271dbd9d80cSRodrigo Siqueira spin_unlock_irq(&out->composer_lock); 272dbd9d80cSRodrigo Siqueira } else { 273dbd9d80cSRodrigo Siqueira kfree(vaddr_out); 274dbd9d80cSRodrigo Siqueira } 275dbd9d80cSRodrigo Siqueira 276a4e7e98eSRodrigo Siqueira /* 277a4e7e98eSRodrigo Siqueira * The worker can fall behind the vblank hrtimer, make sure we catch up. 278a4e7e98eSRodrigo Siqueira */ 279a4e7e98eSRodrigo Siqueira while (frame_start <= frame_end) 280a4e7e98eSRodrigo Siqueira drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32); 281a4e7e98eSRodrigo Siqueira } 282a4e7e98eSRodrigo Siqueira 283a4e7e98eSRodrigo Siqueira static const char * const pipe_crc_sources[] = {"auto"}; 284a4e7e98eSRodrigo Siqueira 285a4e7e98eSRodrigo Siqueira const char *const *vkms_get_crc_sources(struct drm_crtc *crtc, 286a4e7e98eSRodrigo Siqueira size_t *count) 287a4e7e98eSRodrigo Siqueira { 288a4e7e98eSRodrigo Siqueira *count = ARRAY_SIZE(pipe_crc_sources); 289a4e7e98eSRodrigo Siqueira return pipe_crc_sources; 290a4e7e98eSRodrigo Siqueira } 291a4e7e98eSRodrigo Siqueira 292a4e7e98eSRodrigo Siqueira static int vkms_crc_parse_source(const char *src_name, bool *enabled) 293a4e7e98eSRodrigo Siqueira { 294a4e7e98eSRodrigo Siqueira int ret = 0; 295a4e7e98eSRodrigo Siqueira 296a4e7e98eSRodrigo Siqueira if (!src_name) { 297a4e7e98eSRodrigo Siqueira *enabled = false; 298a4e7e98eSRodrigo Siqueira } else if (strcmp(src_name, "auto") == 0) { 299a4e7e98eSRodrigo Siqueira *enabled = true; 300a4e7e98eSRodrigo Siqueira } else { 301a4e7e98eSRodrigo Siqueira *enabled = false; 302a4e7e98eSRodrigo Siqueira ret = -EINVAL; 303a4e7e98eSRodrigo Siqueira } 304a4e7e98eSRodrigo Siqueira 305a4e7e98eSRodrigo Siqueira return ret; 306a4e7e98eSRodrigo Siqueira } 307a4e7e98eSRodrigo Siqueira 308a4e7e98eSRodrigo Siqueira int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name, 309a4e7e98eSRodrigo Siqueira size_t *values_cnt) 310a4e7e98eSRodrigo Siqueira { 311a4e7e98eSRodrigo Siqueira bool enabled; 312a4e7e98eSRodrigo Siqueira 313a4e7e98eSRodrigo Siqueira if (vkms_crc_parse_source(src_name, &enabled) < 0) { 314a4e7e98eSRodrigo Siqueira DRM_DEBUG_DRIVER("unknown source %s\n", src_name); 315a4e7e98eSRodrigo Siqueira return -EINVAL; 316a4e7e98eSRodrigo Siqueira } 317a4e7e98eSRodrigo Siqueira 318a4e7e98eSRodrigo Siqueira *values_cnt = 1; 319a4e7e98eSRodrigo Siqueira 320a4e7e98eSRodrigo Siqueira return 0; 321a4e7e98eSRodrigo Siqueira } 322a4e7e98eSRodrigo Siqueira 323dbd9d80cSRodrigo Siqueira void vkms_set_composer(struct vkms_output *out, bool enabled) 3245bd858d7SMelissa Wen { 3255bd858d7SMelissa Wen bool old_enabled; 3265bd858d7SMelissa Wen 3275bd858d7SMelissa Wen if (enabled) 3285bd858d7SMelissa Wen drm_crtc_vblank_get(&out->crtc); 3295bd858d7SMelissa Wen 3305bd858d7SMelissa Wen spin_lock_irq(&out->lock); 3315bd858d7SMelissa Wen old_enabled = out->composer_enabled; 3325bd858d7SMelissa Wen out->composer_enabled = enabled; 3335bd858d7SMelissa Wen spin_unlock_irq(&out->lock); 3345bd858d7SMelissa Wen 3355bd858d7SMelissa Wen if (old_enabled) 3365bd858d7SMelissa Wen drm_crtc_vblank_put(&out->crtc); 3375bd858d7SMelissa Wen } 3385bd858d7SMelissa Wen 339a4e7e98eSRodrigo Siqueira int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name) 340a4e7e98eSRodrigo Siqueira { 341a4e7e98eSRodrigo Siqueira struct vkms_output *out = drm_crtc_to_vkms_output(crtc); 342a4e7e98eSRodrigo Siqueira bool enabled = false; 343a4e7e98eSRodrigo Siqueira int ret = 0; 344a4e7e98eSRodrigo Siqueira 345a4e7e98eSRodrigo Siqueira ret = vkms_crc_parse_source(src_name, &enabled); 346a4e7e98eSRodrigo Siqueira 3475bd858d7SMelissa Wen vkms_set_composer(out, enabled); 348a4e7e98eSRodrigo Siqueira 349a4e7e98eSRodrigo Siqueira return ret; 350a4e7e98eSRodrigo Siqueira } 351