xref: /openbmc/linux/drivers/gpu/drm/vkms/vkms_composer.c (revision 310e506c06e495b8fbe3502c70d896bc5b8b2502)
1a4e7e98eSRodrigo Siqueira // SPDX-License-Identifier: GPL-2.0+
2a4e7e98eSRodrigo Siqueira 
3a4e7e98eSRodrigo Siqueira #include <linux/crc32.h>
4ce672a1bSSam Ravnborg 
5a4e7e98eSRodrigo Siqueira #include <drm/drm_atomic.h>
6a4e7e98eSRodrigo Siqueira #include <drm/drm_atomic_helper.h>
732a1648aSMelissa Wen #include <drm/drm_fourcc.h>
8a4e7e98eSRodrigo Siqueira #include <drm/drm_gem_framebuffer_helper.h>
9488c888aSDaniel Vetter #include <drm/drm_gem_shmem_helper.h>
10ce672a1bSSam Ravnborg #include <drm/drm_vblank.h>
11ce672a1bSSam Ravnborg 
12ce672a1bSSam Ravnborg #include "vkms_drv.h"
13a4e7e98eSRodrigo Siqueira 
1460cc2021SRodrigo Siqueira static u32 get_pixel_from_buffer(int x, int y, const u8 *buffer,
1560cc2021SRodrigo Siqueira 				 const struct vkms_composer *composer)
1660cc2021SRodrigo Siqueira {
1760cc2021SRodrigo Siqueira 	u32 pixel;
1860cc2021SRodrigo Siqueira 	int src_offset = composer->offset + (y * composer->pitch)
1960cc2021SRodrigo Siqueira 				      + (x * composer->cpp);
2060cc2021SRodrigo Siqueira 
2160cc2021SRodrigo Siqueira 	pixel = *(u32 *)&buffer[src_offset];
2260cc2021SRodrigo Siqueira 
2360cc2021SRodrigo Siqueira 	return pixel;
2460cc2021SRodrigo Siqueira }
2560cc2021SRodrigo Siqueira 
26a4e7e98eSRodrigo Siqueira /**
27a4e7e98eSRodrigo Siqueira  * compute_crc - Compute CRC value on output frame
28a4e7e98eSRodrigo Siqueira  *
2960cc2021SRodrigo Siqueira  * @vaddr: address to final framebuffer
30a4e7e98eSRodrigo Siqueira  * @composer: framebuffer's metadata
31a4e7e98eSRodrigo Siqueira  *
32a4e7e98eSRodrigo Siqueira  * returns CRC value computed using crc32 on the visible portion of
33a4e7e98eSRodrigo Siqueira  * the final framebuffer at vaddr_out
34a4e7e98eSRodrigo Siqueira  */
3560cc2021SRodrigo Siqueira static uint32_t compute_crc(const u8 *vaddr,
3660cc2021SRodrigo Siqueira 			    const struct vkms_composer *composer)
37a4e7e98eSRodrigo Siqueira {
3860cc2021SRodrigo Siqueira 	int x, y;
3960cc2021SRodrigo Siqueira 	u32 crc = 0, pixel = 0;
40a4e7e98eSRodrigo Siqueira 	int x_src = composer->src.x1 >> 16;
41a4e7e98eSRodrigo Siqueira 	int y_src = composer->src.y1 >> 16;
42a4e7e98eSRodrigo Siqueira 	int h_src = drm_rect_height(&composer->src) >> 16;
43a4e7e98eSRodrigo Siqueira 	int w_src = drm_rect_width(&composer->src) >> 16;
44a4e7e98eSRodrigo Siqueira 
4560cc2021SRodrigo Siqueira 	for (y = y_src; y < y_src + h_src; ++y) {
4660cc2021SRodrigo Siqueira 		for (x = x_src; x < x_src + w_src; ++x) {
4760cc2021SRodrigo Siqueira 			pixel = get_pixel_from_buffer(x, y, vaddr, composer);
4860cc2021SRodrigo Siqueira 			crc = crc32_le(crc, (void *)&pixel, sizeof(u32));
49a4e7e98eSRodrigo Siqueira 		}
50a4e7e98eSRodrigo Siqueira 	}
51a4e7e98eSRodrigo Siqueira 
52a4e7e98eSRodrigo Siqueira 	return crc;
53a4e7e98eSRodrigo Siqueira }
54a4e7e98eSRodrigo Siqueira 
5539cba5cfSMelissa Wen static u8 blend_channel(u8 src, u8 dst, u8 alpha)
5639cba5cfSMelissa Wen {
5739cba5cfSMelissa Wen 	u32 pre_blend;
5839cba5cfSMelissa Wen 	u8 new_color;
5939cba5cfSMelissa Wen 
6039cba5cfSMelissa Wen 	pre_blend = (src * 255 + dst * (255 - alpha));
6139cba5cfSMelissa Wen 
6239cba5cfSMelissa Wen 	/* Faster div by 255 */
6339cba5cfSMelissa Wen 	new_color = ((pre_blend + ((pre_blend + 257) >> 8)) >> 8);
6439cba5cfSMelissa Wen 
6539cba5cfSMelissa Wen 	return new_color;
6639cba5cfSMelissa Wen }
6739cba5cfSMelissa Wen 
6832a1648aSMelissa Wen /**
6932a1648aSMelissa Wen  * alpha_blend - alpha blending equation
7032a1648aSMelissa Wen  * @argb_src: src pixel on premultiplied alpha mode
7132a1648aSMelissa Wen  * @argb_dst: dst pixel completely opaque
7232a1648aSMelissa Wen  *
7332a1648aSMelissa Wen  * blend pixels using premultiplied blend formula. The current DRM assumption
7432a1648aSMelissa Wen  * is that pixel color values have been already pre-multiplied with the alpha
7532a1648aSMelissa Wen  * channel values. See more drm_plane_create_blend_mode_property(). Also, this
7632a1648aSMelissa Wen  * formula assumes a completely opaque background.
7732a1648aSMelissa Wen  */
7832a1648aSMelissa Wen static void alpha_blend(const u8 *argb_src, u8 *argb_dst)
7939cba5cfSMelissa Wen {
8039cba5cfSMelissa Wen 	u8 alpha;
8139cba5cfSMelissa Wen 
8239cba5cfSMelissa Wen 	alpha = argb_src[3];
8339cba5cfSMelissa Wen 	argb_dst[0] = blend_channel(argb_src[0], argb_dst[0], alpha);
8439cba5cfSMelissa Wen 	argb_dst[1] = blend_channel(argb_src[1], argb_dst[1], alpha);
8539cba5cfSMelissa Wen 	argb_dst[2] = blend_channel(argb_src[2], argb_dst[2], alpha);
8632a1648aSMelissa Wen }
8732a1648aSMelissa Wen 
8832a1648aSMelissa Wen /**
8932a1648aSMelissa Wen  * x_blend - blending equation that ignores the pixel alpha
9032a1648aSMelissa Wen  *
9132a1648aSMelissa Wen  * overwrites RGB color value from src pixel to dst pixel.
9232a1648aSMelissa Wen  */
9332a1648aSMelissa Wen static void x_blend(const u8 *xrgb_src, u8 *xrgb_dst)
9432a1648aSMelissa Wen {
9532a1648aSMelissa Wen 	memcpy(xrgb_dst, xrgb_src, sizeof(u8) * 3);
9639cba5cfSMelissa Wen }
9739cba5cfSMelissa Wen 
98a4e7e98eSRodrigo Siqueira /**
990530bbd0SGabriela Bittencourt  * blend - blend value at vaddr_src with value at vaddr_dst
100a4e7e98eSRodrigo Siqueira  * @vaddr_dst: destination address
101a4e7e98eSRodrigo Siqueira  * @vaddr_src: source address
10239cba5cfSMelissa Wen  * @dst_composer: destination framebuffer's metadata
103a4e7e98eSRodrigo Siqueira  * @src_composer: source framebuffer's metadata
10432a1648aSMelissa Wen  * @pixel_blend: blending equation based on plane format
105a4e7e98eSRodrigo Siqueira  *
10632a1648aSMelissa Wen  * Blend the vaddr_src value with the vaddr_dst value using a pixel blend
10732a1648aSMelissa Wen  * equation according to the supported plane formats DRM_FORMAT_(A/XRGB8888)
10832a1648aSMelissa Wen  * and clearing alpha channel to an completely opaque background. This function
10932a1648aSMelissa Wen  * uses buffer's metadata to locate the new composite values at vaddr_dst.
11032a1648aSMelissa Wen  *
11132a1648aSMelissa Wen  * TODO: completely clear the primary plane (a = 0xff) before starting to blend
11232a1648aSMelissa Wen  * pixel color values
113a4e7e98eSRodrigo Siqueira  */
114a4e7e98eSRodrigo Siqueira static void blend(void *vaddr_dst, void *vaddr_src,
11539cba5cfSMelissa Wen 		  struct vkms_composer *dst_composer,
11632a1648aSMelissa Wen 		  struct vkms_composer *src_composer,
11732a1648aSMelissa Wen 		  void (*pixel_blend)(const u8 *, u8 *))
118a4e7e98eSRodrigo Siqueira {
119a4e7e98eSRodrigo Siqueira 	int i, j, j_dst, i_dst;
120a4e7e98eSRodrigo Siqueira 	int offset_src, offset_dst;
12139cba5cfSMelissa Wen 	u8 *pixel_dst, *pixel_src;
122a4e7e98eSRodrigo Siqueira 
123a4e7e98eSRodrigo Siqueira 	int x_src = src_composer->src.x1 >> 16;
124a4e7e98eSRodrigo Siqueira 	int y_src = src_composer->src.y1 >> 16;
125a4e7e98eSRodrigo Siqueira 
126a4e7e98eSRodrigo Siqueira 	int x_dst = src_composer->dst.x1;
127a4e7e98eSRodrigo Siqueira 	int y_dst = src_composer->dst.y1;
128a4e7e98eSRodrigo Siqueira 	int h_dst = drm_rect_height(&src_composer->dst);
129a4e7e98eSRodrigo Siqueira 	int w_dst = drm_rect_width(&src_composer->dst);
130a4e7e98eSRodrigo Siqueira 
131a4e7e98eSRodrigo Siqueira 	int y_limit = y_src + h_dst;
132a4e7e98eSRodrigo Siqueira 	int x_limit = x_src + w_dst;
133a4e7e98eSRodrigo Siqueira 
134a4e7e98eSRodrigo Siqueira 	for (i = y_src, i_dst = y_dst; i < y_limit; ++i) {
135a4e7e98eSRodrigo Siqueira 		for (j = x_src, j_dst = x_dst; j < x_limit; ++j) {
13639cba5cfSMelissa Wen 			offset_dst = dst_composer->offset
13739cba5cfSMelissa Wen 				     + (i_dst * dst_composer->pitch)
13839cba5cfSMelissa Wen 				     + (j_dst++ * dst_composer->cpp);
139a4e7e98eSRodrigo Siqueira 			offset_src = src_composer->offset
140a4e7e98eSRodrigo Siqueira 				     + (i * src_composer->pitch)
141a4e7e98eSRodrigo Siqueira 				     + (j * src_composer->cpp);
142a4e7e98eSRodrigo Siqueira 
14339cba5cfSMelissa Wen 			pixel_src = (u8 *)(vaddr_src + offset_src);
14439cba5cfSMelissa Wen 			pixel_dst = (u8 *)(vaddr_dst + offset_dst);
14532a1648aSMelissa Wen 			pixel_blend(pixel_src, pixel_dst);
14632a1648aSMelissa Wen 			/* clearing alpha channel (0xff)*/
14732a1648aSMelissa Wen 			pixel_dst[3] = 0xff;
148a4e7e98eSRodrigo Siqueira 		}
149a4e7e98eSRodrigo Siqueira 		i_dst++;
150a4e7e98eSRodrigo Siqueira 	}
151a4e7e98eSRodrigo Siqueira }
152a4e7e98eSRodrigo Siqueira 
153cac80e71SMelissa Wen static void compose_plane(struct vkms_composer *primary_composer,
154cac80e71SMelissa Wen 			  struct vkms_composer *plane_composer,
155a4e7e98eSRodrigo Siqueira 			  void *vaddr_out)
156a4e7e98eSRodrigo Siqueira {
157cac80e71SMelissa Wen 	struct drm_gem_object *plane_obj;
158cac80e71SMelissa Wen 	struct drm_gem_shmem_object *plane_shmem_obj;
15932a1648aSMelissa Wen 	struct drm_framebuffer *fb = &plane_composer->fb;
16032a1648aSMelissa Wen 	void (*pixel_blend)(const u8 *p_src, u8 *p_dst);
161a4e7e98eSRodrigo Siqueira 
162cac80e71SMelissa Wen 	plane_obj = drm_gem_fb_get_obj(&plane_composer->fb, 0);
163cac80e71SMelissa Wen 	plane_shmem_obj = to_drm_gem_shmem_obj(plane_obj);
164a4e7e98eSRodrigo Siqueira 
165cac80e71SMelissa Wen 	if (WARN_ON(!plane_shmem_obj->vaddr))
166a4e7e98eSRodrigo Siqueira 		return;
167a4e7e98eSRodrigo Siqueira 
16832a1648aSMelissa Wen 	if (fb->format->format == DRM_FORMAT_ARGB8888)
16932a1648aSMelissa Wen 		pixel_blend = &alpha_blend;
17032a1648aSMelissa Wen 	else
17132a1648aSMelissa Wen 		pixel_blend = &x_blend;
17232a1648aSMelissa Wen 
17332a1648aSMelissa Wen 	blend(vaddr_out, plane_shmem_obj->vaddr, primary_composer,
17432a1648aSMelissa Wen 	      plane_composer, pixel_blend);
175a4e7e98eSRodrigo Siqueira }
176a4e7e98eSRodrigo Siqueira 
177cac80e71SMelissa Wen static int compose_active_planes(void **vaddr_out,
17895302576SRodrigo Siqueira 				 struct vkms_composer *primary_composer,
179*310e506cSMelissa Wen 				 struct vkms_crtc_state *crtc_state)
180a4e7e98eSRodrigo Siqueira {
181a4e7e98eSRodrigo Siqueira 	struct drm_framebuffer *fb = &primary_composer->fb;
182a4e7e98eSRodrigo Siqueira 	struct drm_gem_object *gem_obj = drm_gem_fb_get_obj(fb, 0);
183488c888aSDaniel Vetter 	struct drm_gem_shmem_object *shmem_obj = to_drm_gem_shmem_obj(gem_obj);
184*310e506cSMelissa Wen 	int i;
185a4e7e98eSRodrigo Siqueira 
18695302576SRodrigo Siqueira 	if (!*vaddr_out) {
187488c888aSDaniel Vetter 		*vaddr_out = kzalloc(shmem_obj->base.size, GFP_KERNEL);
18895302576SRodrigo Siqueira 		if (!*vaddr_out) {
18995302576SRodrigo Siqueira 			DRM_ERROR("Cannot allocate memory for output frame.");
19095302576SRodrigo Siqueira 			return -ENOMEM;
19195302576SRodrigo Siqueira 		}
192a4e7e98eSRodrigo Siqueira 	}
193a4e7e98eSRodrigo Siqueira 
194488c888aSDaniel Vetter 	if (WARN_ON(!shmem_obj->vaddr))
19595302576SRodrigo Siqueira 		return -EINVAL;
196a4e7e98eSRodrigo Siqueira 
197488c888aSDaniel Vetter 	memcpy(*vaddr_out, shmem_obj->vaddr, shmem_obj->base.size);
198a4e7e98eSRodrigo Siqueira 
199*310e506cSMelissa Wen 	/* If there are other planes besides primary, we consider the active
200*310e506cSMelissa Wen 	 * planes should be in z-order and compose them associatively:
201*310e506cSMelissa Wen 	 * ((primary <- overlay) <- cursor)
202*310e506cSMelissa Wen 	 */
203*310e506cSMelissa Wen 	for (i = 1; i < crtc_state->num_active_planes; i++)
204*310e506cSMelissa Wen 		compose_plane(primary_composer,
205*310e506cSMelissa Wen 			      crtc_state->active_planes[i]->composer,
206*310e506cSMelissa Wen 			      *vaddr_out);
207a4e7e98eSRodrigo Siqueira 
20895302576SRodrigo Siqueira 	return 0;
209a4e7e98eSRodrigo Siqueira }
210a4e7e98eSRodrigo Siqueira 
211a4e7e98eSRodrigo Siqueira /**
212a4e7e98eSRodrigo Siqueira  * vkms_composer_worker - ordered work_struct to compute CRC
213a4e7e98eSRodrigo Siqueira  *
214a4e7e98eSRodrigo Siqueira  * @work: work_struct
215a4e7e98eSRodrigo Siqueira  *
216a4e7e98eSRodrigo Siqueira  * Work handler for composing and computing CRCs. work_struct scheduled in
217a4e7e98eSRodrigo Siqueira  * an ordered workqueue that's periodically scheduled to run by
218a4e7e98eSRodrigo Siqueira  * _vblank_handle() and flushed at vkms_atomic_crtc_destroy_state().
219a4e7e98eSRodrigo Siqueira  */
220a4e7e98eSRodrigo Siqueira void vkms_composer_worker(struct work_struct *work)
221a4e7e98eSRodrigo Siqueira {
222a4e7e98eSRodrigo Siqueira 	struct vkms_crtc_state *crtc_state = container_of(work,
223a4e7e98eSRodrigo Siqueira 						struct vkms_crtc_state,
224a4e7e98eSRodrigo Siqueira 						composer_work);
225a4e7e98eSRodrigo Siqueira 	struct drm_crtc *crtc = crtc_state->base.crtc;
226a4e7e98eSRodrigo Siqueira 	struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
227a4e7e98eSRodrigo Siqueira 	struct vkms_composer *primary_composer = NULL;
228*310e506cSMelissa Wen 	struct vkms_plane_state *act_plane = NULL;
229dbd9d80cSRodrigo Siqueira 	bool crc_pending, wb_pending;
23095302576SRodrigo Siqueira 	void *vaddr_out = NULL;
231a4e7e98eSRodrigo Siqueira 	u32 crc32 = 0;
232a4e7e98eSRodrigo Siqueira 	u64 frame_start, frame_end;
23395302576SRodrigo Siqueira 	int ret;
234a4e7e98eSRodrigo Siqueira 
235a4e7e98eSRodrigo Siqueira 	spin_lock_irq(&out->composer_lock);
236a4e7e98eSRodrigo Siqueira 	frame_start = crtc_state->frame_start;
237a4e7e98eSRodrigo Siqueira 	frame_end = crtc_state->frame_end;
238a4e7e98eSRodrigo Siqueira 	crc_pending = crtc_state->crc_pending;
239dbd9d80cSRodrigo Siqueira 	wb_pending = crtc_state->wb_pending;
240a4e7e98eSRodrigo Siqueira 	crtc_state->frame_start = 0;
241a4e7e98eSRodrigo Siqueira 	crtc_state->frame_end = 0;
242a4e7e98eSRodrigo Siqueira 	crtc_state->crc_pending = false;
243a4e7e98eSRodrigo Siqueira 	spin_unlock_irq(&out->composer_lock);
244a4e7e98eSRodrigo Siqueira 
245a4e7e98eSRodrigo Siqueira 	/*
246a4e7e98eSRodrigo Siqueira 	 * We raced with the vblank hrtimer and previous work already computed
247a4e7e98eSRodrigo Siqueira 	 * the crc, nothing to do.
248a4e7e98eSRodrigo Siqueira 	 */
249a4e7e98eSRodrigo Siqueira 	if (!crc_pending)
250a4e7e98eSRodrigo Siqueira 		return;
251a4e7e98eSRodrigo Siqueira 
252*310e506cSMelissa Wen 	if (crtc_state->num_active_planes >= 1) {
253*310e506cSMelissa Wen 		act_plane = crtc_state->active_planes[0];
254*310e506cSMelissa Wen 		if (act_plane->base.plane->type == DRM_PLANE_TYPE_PRIMARY)
255*310e506cSMelissa Wen 			primary_composer = act_plane->composer;
256*310e506cSMelissa Wen 	}
257a4e7e98eSRodrigo Siqueira 
25895302576SRodrigo Siqueira 	if (!primary_composer)
25995302576SRodrigo Siqueira 		return;
26095302576SRodrigo Siqueira 
261dbd9d80cSRodrigo Siqueira 	if (wb_pending)
262dbd9d80cSRodrigo Siqueira 		vaddr_out = crtc_state->active_writeback;
263dbd9d80cSRodrigo Siqueira 
264cac80e71SMelissa Wen 	ret = compose_active_planes(&vaddr_out, primary_composer,
265*310e506cSMelissa Wen 				    crtc_state);
26695302576SRodrigo Siqueira 	if (ret) {
267dbd9d80cSRodrigo Siqueira 		if (ret == -EINVAL && !wb_pending)
26895302576SRodrigo Siqueira 			kfree(vaddr_out);
26995302576SRodrigo Siqueira 		return;
27095302576SRodrigo Siqueira 	}
27195302576SRodrigo Siqueira 
27295302576SRodrigo Siqueira 	crc32 = compute_crc(vaddr_out, primary_composer);
273a4e7e98eSRodrigo Siqueira 
274dbd9d80cSRodrigo Siqueira 	if (wb_pending) {
275dbd9d80cSRodrigo Siqueira 		drm_writeback_signal_completion(&out->wb_connector, 0);
276dbd9d80cSRodrigo Siqueira 		spin_lock_irq(&out->composer_lock);
277dbd9d80cSRodrigo Siqueira 		crtc_state->wb_pending = false;
278dbd9d80cSRodrigo Siqueira 		spin_unlock_irq(&out->composer_lock);
279dbd9d80cSRodrigo Siqueira 	} else {
280dbd9d80cSRodrigo Siqueira 		kfree(vaddr_out);
281dbd9d80cSRodrigo Siqueira 	}
282dbd9d80cSRodrigo Siqueira 
283a4e7e98eSRodrigo Siqueira 	/*
284a4e7e98eSRodrigo Siqueira 	 * The worker can fall behind the vblank hrtimer, make sure we catch up.
285a4e7e98eSRodrigo Siqueira 	 */
286a4e7e98eSRodrigo Siqueira 	while (frame_start <= frame_end)
287a4e7e98eSRodrigo Siqueira 		drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32);
288a4e7e98eSRodrigo Siqueira }
289a4e7e98eSRodrigo Siqueira 
290a4e7e98eSRodrigo Siqueira static const char * const pipe_crc_sources[] = {"auto"};
291a4e7e98eSRodrigo Siqueira 
292a4e7e98eSRodrigo Siqueira const char *const *vkms_get_crc_sources(struct drm_crtc *crtc,
293a4e7e98eSRodrigo Siqueira 					size_t *count)
294a4e7e98eSRodrigo Siqueira {
295a4e7e98eSRodrigo Siqueira 	*count = ARRAY_SIZE(pipe_crc_sources);
296a4e7e98eSRodrigo Siqueira 	return pipe_crc_sources;
297a4e7e98eSRodrigo Siqueira }
298a4e7e98eSRodrigo Siqueira 
299a4e7e98eSRodrigo Siqueira static int vkms_crc_parse_source(const char *src_name, bool *enabled)
300a4e7e98eSRodrigo Siqueira {
301a4e7e98eSRodrigo Siqueira 	int ret = 0;
302a4e7e98eSRodrigo Siqueira 
303a4e7e98eSRodrigo Siqueira 	if (!src_name) {
304a4e7e98eSRodrigo Siqueira 		*enabled = false;
305a4e7e98eSRodrigo Siqueira 	} else if (strcmp(src_name, "auto") == 0) {
306a4e7e98eSRodrigo Siqueira 		*enabled = true;
307a4e7e98eSRodrigo Siqueira 	} else {
308a4e7e98eSRodrigo Siqueira 		*enabled = false;
309a4e7e98eSRodrigo Siqueira 		ret = -EINVAL;
310a4e7e98eSRodrigo Siqueira 	}
311a4e7e98eSRodrigo Siqueira 
312a4e7e98eSRodrigo Siqueira 	return ret;
313a4e7e98eSRodrigo Siqueira }
314a4e7e98eSRodrigo Siqueira 
315a4e7e98eSRodrigo Siqueira int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name,
316a4e7e98eSRodrigo Siqueira 			   size_t *values_cnt)
317a4e7e98eSRodrigo Siqueira {
318a4e7e98eSRodrigo Siqueira 	bool enabled;
319a4e7e98eSRodrigo Siqueira 
320a4e7e98eSRodrigo Siqueira 	if (vkms_crc_parse_source(src_name, &enabled) < 0) {
321a4e7e98eSRodrigo Siqueira 		DRM_DEBUG_DRIVER("unknown source %s\n", src_name);
322a4e7e98eSRodrigo Siqueira 		return -EINVAL;
323a4e7e98eSRodrigo Siqueira 	}
324a4e7e98eSRodrigo Siqueira 
325a4e7e98eSRodrigo Siqueira 	*values_cnt = 1;
326a4e7e98eSRodrigo Siqueira 
327a4e7e98eSRodrigo Siqueira 	return 0;
328a4e7e98eSRodrigo Siqueira }
329a4e7e98eSRodrigo Siqueira 
330dbd9d80cSRodrigo Siqueira void vkms_set_composer(struct vkms_output *out, bool enabled)
3315bd858d7SMelissa Wen {
3325bd858d7SMelissa Wen 	bool old_enabled;
3335bd858d7SMelissa Wen 
3345bd858d7SMelissa Wen 	if (enabled)
3355bd858d7SMelissa Wen 		drm_crtc_vblank_get(&out->crtc);
3365bd858d7SMelissa Wen 
3375bd858d7SMelissa Wen 	spin_lock_irq(&out->lock);
3385bd858d7SMelissa Wen 	old_enabled = out->composer_enabled;
3395bd858d7SMelissa Wen 	out->composer_enabled = enabled;
3405bd858d7SMelissa Wen 	spin_unlock_irq(&out->lock);
3415bd858d7SMelissa Wen 
3425bd858d7SMelissa Wen 	if (old_enabled)
3435bd858d7SMelissa Wen 		drm_crtc_vblank_put(&out->crtc);
3445bd858d7SMelissa Wen }
3455bd858d7SMelissa Wen 
346a4e7e98eSRodrigo Siqueira int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name)
347a4e7e98eSRodrigo Siqueira {
348a4e7e98eSRodrigo Siqueira 	struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
349a4e7e98eSRodrigo Siqueira 	bool enabled = false;
350a4e7e98eSRodrigo Siqueira 	int ret = 0;
351a4e7e98eSRodrigo Siqueira 
352a4e7e98eSRodrigo Siqueira 	ret = vkms_crc_parse_source(src_name, &enabled);
353a4e7e98eSRodrigo Siqueira 
3545bd858d7SMelissa Wen 	vkms_set_composer(out, enabled);
355a4e7e98eSRodrigo Siqueira 
356a4e7e98eSRodrigo Siqueira 	return ret;
357a4e7e98eSRodrigo Siqueira }
358