157692c94SEric Anholt // SPDX-License-Identifier: GPL-2.0+ 257692c94SEric Anholt /* Copyright (C) 2014-2018 Broadcom */ 357692c94SEric Anholt 4220989e7SSam Ravnborg #include <linux/device.h> 5220989e7SSam Ravnborg #include <linux/dma-mapping.h> 6220989e7SSam Ravnborg #include <linux/io.h> 757692c94SEric Anholt #include <linux/module.h> 857692c94SEric Anholt #include <linux/platform_device.h> 9eea9b97bSEric Anholt #include <linux/reset.h> 1057692c94SEric Anholt #include <linux/sched/signal.h> 11220989e7SSam Ravnborg #include <linux/uaccess.h> 1257692c94SEric Anholt 1391d502f6SMaíra Canal #include <drm/drm_managed.h> 14220989e7SSam Ravnborg #include <drm/drm_syncobj.h> 15220989e7SSam Ravnborg #include <uapi/drm/v3d_drm.h> 16220989e7SSam Ravnborg 1757692c94SEric Anholt #include "v3d_drv.h" 1857692c94SEric Anholt #include "v3d_regs.h" 1957692c94SEric Anholt #include "v3d_trace.h" 2057692c94SEric Anholt 2157692c94SEric Anholt static void 2257692c94SEric Anholt v3d_init_core(struct v3d_dev *v3d, int core) 2357692c94SEric Anholt { 2457692c94SEric Anholt /* Set OVRTMUOUT, which means that the texture sampler uniform 2557692c94SEric Anholt * configuration's tmu output type field is used, instead of 2657692c94SEric Anholt * using the hardware default behavior based on the texture 2757692c94SEric Anholt * type. If you want the default behavior, you can still put 2857692c94SEric Anholt * "2" in the indirect texture state's output_type field. 2957692c94SEric Anholt */ 30a7dde1b7SEric Anholt if (v3d->ver < 40) 3157692c94SEric Anholt V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT); 3257692c94SEric Anholt 3357692c94SEric Anholt /* Whenever we flush the L2T cache, we always want to flush 3457692c94SEric Anholt * the whole thing. 3557692c94SEric Anholt */ 3657692c94SEric Anholt V3D_CORE_WRITE(core, V3D_CTL_L2TFLSTA, 0); 3757692c94SEric Anholt V3D_CORE_WRITE(core, V3D_CTL_L2TFLEND, ~0); 3857692c94SEric Anholt } 3957692c94SEric Anholt 4057692c94SEric Anholt /* Sets invariant state for the HW. */ 4157692c94SEric Anholt static void 4257692c94SEric Anholt v3d_init_hw_state(struct v3d_dev *v3d) 4357692c94SEric Anholt { 4457692c94SEric Anholt v3d_init_core(v3d, 0); 4557692c94SEric Anholt } 4657692c94SEric Anholt 4757692c94SEric Anholt static void 4857692c94SEric Anholt v3d_idle_axi(struct v3d_dev *v3d, int core) 4957692c94SEric Anholt { 5057692c94SEric Anholt V3D_CORE_WRITE(core, V3D_GMP_CFG, V3D_GMP_CFG_STOP_REQ); 5157692c94SEric Anholt 5257692c94SEric Anholt if (wait_for((V3D_CORE_READ(core, V3D_GMP_STATUS) & 5357692c94SEric Anholt (V3D_GMP_STATUS_RD_COUNT_MASK | 5457692c94SEric Anholt V3D_GMP_STATUS_WR_COUNT_MASK | 5557692c94SEric Anholt V3D_GMP_STATUS_CFG_BUSY)) == 0, 100)) { 5657692c94SEric Anholt DRM_ERROR("Failed to wait for safe GMP shutdown\n"); 5757692c94SEric Anholt } 5857692c94SEric Anholt } 5957692c94SEric Anholt 6057692c94SEric Anholt static void 6157692c94SEric Anholt v3d_idle_gca(struct v3d_dev *v3d) 6257692c94SEric Anholt { 6357692c94SEric Anholt if (v3d->ver >= 41) 6457692c94SEric Anholt return; 6557692c94SEric Anholt 6657692c94SEric Anholt V3D_GCA_WRITE(V3D_GCA_SAFE_SHUTDOWN, V3D_GCA_SAFE_SHUTDOWN_EN); 6757692c94SEric Anholt 6857692c94SEric Anholt if (wait_for((V3D_GCA_READ(V3D_GCA_SAFE_SHUTDOWN_ACK) & 6957692c94SEric Anholt V3D_GCA_SAFE_SHUTDOWN_ACK_ACKED) == 7057692c94SEric Anholt V3D_GCA_SAFE_SHUTDOWN_ACK_ACKED, 100)) { 7157692c94SEric Anholt DRM_ERROR("Failed to wait for safe GCA shutdown\n"); 7257692c94SEric Anholt } 7357692c94SEric Anholt } 7457692c94SEric Anholt 7557692c94SEric Anholt static void 76eea9b97bSEric Anholt v3d_reset_by_bridge(struct v3d_dev *v3d) 7757692c94SEric Anholt { 7857692c94SEric Anholt int version = V3D_BRIDGE_READ(V3D_TOP_GR_BRIDGE_REVISION); 7957692c94SEric Anholt 8057692c94SEric Anholt if (V3D_GET_FIELD(version, V3D_TOP_GR_BRIDGE_MAJOR) == 2) { 8157692c94SEric Anholt V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_0, 8257692c94SEric Anholt V3D_TOP_GR_BRIDGE_SW_INIT_0_V3D_CLK_108_SW_INIT); 8357692c94SEric Anholt V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_0, 0); 8457692c94SEric Anholt 8557692c94SEric Anholt /* GFXH-1383: The SW_INIT may cause a stray write to address 0 8657692c94SEric Anholt * of the unit, so reset it to its power-on value here. 8757692c94SEric Anholt */ 8857692c94SEric Anholt V3D_WRITE(V3D_HUB_AXICFG, V3D_HUB_AXICFG_MAX_LEN_MASK); 8957692c94SEric Anholt } else { 9057692c94SEric Anholt WARN_ON_ONCE(V3D_GET_FIELD(version, 9157692c94SEric Anholt V3D_TOP_GR_BRIDGE_MAJOR) != 7); 9257692c94SEric Anholt V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1, 9357692c94SEric Anholt V3D_TOP_GR_BRIDGE_SW_INIT_1_V3D_CLK_108_SW_INIT); 9457692c94SEric Anholt V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1, 0); 9557692c94SEric Anholt } 96eea9b97bSEric Anholt } 97eea9b97bSEric Anholt 98eea9b97bSEric Anholt static void 99eea9b97bSEric Anholt v3d_reset_v3d(struct v3d_dev *v3d) 100eea9b97bSEric Anholt { 101eea9b97bSEric Anholt if (v3d->reset) 102eea9b97bSEric Anholt reset_control_reset(v3d->reset); 103eea9b97bSEric Anholt else 104eea9b97bSEric Anholt v3d_reset_by_bridge(v3d); 10557692c94SEric Anholt 10657692c94SEric Anholt v3d_init_hw_state(v3d); 10757692c94SEric Anholt } 10857692c94SEric Anholt 10957692c94SEric Anholt void 11057692c94SEric Anholt v3d_reset(struct v3d_dev *v3d) 11157692c94SEric Anholt { 11257692c94SEric Anholt struct drm_device *dev = &v3d->drm; 11357692c94SEric Anholt 1141ba9d7cbSEric Anholt DRM_DEV_ERROR(dev->dev, "Resetting GPU for hang.\n"); 1151ba9d7cbSEric Anholt DRM_DEV_ERROR(dev->dev, "V3D_ERR_STAT: 0x%08x\n", 1161ba9d7cbSEric Anholt V3D_CORE_READ(0, V3D_ERR_STAT)); 11757692c94SEric Anholt trace_v3d_reset_begin(dev); 11857692c94SEric Anholt 11957692c94SEric Anholt /* XXX: only needed for safe powerdown, not reset. */ 12057692c94SEric Anholt if (false) 12157692c94SEric Anholt v3d_idle_axi(v3d, 0); 12257692c94SEric Anholt 12357692c94SEric Anholt v3d_idle_gca(v3d); 12457692c94SEric Anholt v3d_reset_v3d(v3d); 12557692c94SEric Anholt 12657692c94SEric Anholt v3d_mmu_set_page_table(v3d); 12757692c94SEric Anholt v3d_irq_reset(v3d); 12857692c94SEric Anholt 12926a4dc29SJuan A. Suarez Romero v3d_perfmon_stop(v3d, v3d->active_perfmon, false); 13026a4dc29SJuan A. Suarez Romero 13157692c94SEric Anholt trace_v3d_reset_end(dev); 13257692c94SEric Anholt } 13357692c94SEric Anholt 13457692c94SEric Anholt static void 13557692c94SEric Anholt v3d_flush_l3(struct v3d_dev *v3d) 13657692c94SEric Anholt { 13757692c94SEric Anholt if (v3d->ver < 41) { 13857692c94SEric Anholt u32 gca_ctrl = V3D_GCA_READ(V3D_GCA_CACHE_CTRL); 13957692c94SEric Anholt 14057692c94SEric Anholt V3D_GCA_WRITE(V3D_GCA_CACHE_CTRL, 14157692c94SEric Anholt gca_ctrl | V3D_GCA_CACHE_CTRL_FLUSH); 14257692c94SEric Anholt 14357692c94SEric Anholt if (v3d->ver < 33) { 14457692c94SEric Anholt V3D_GCA_WRITE(V3D_GCA_CACHE_CTRL, 14557692c94SEric Anholt gca_ctrl & ~V3D_GCA_CACHE_CTRL_FLUSH); 14657692c94SEric Anholt } 14757692c94SEric Anholt } 14857692c94SEric Anholt } 14957692c94SEric Anholt 1507b9d2fe4SEric Anholt /* Invalidates the (read-only) L2C cache. This was the L2 cache for 1517b9d2fe4SEric Anholt * uniforms and instructions on V3D 3.2. 1527b9d2fe4SEric Anholt */ 15357692c94SEric Anholt static void 1547b9d2fe4SEric Anholt v3d_invalidate_l2c(struct v3d_dev *v3d, int core) 15557692c94SEric Anholt { 1567b9d2fe4SEric Anholt if (v3d->ver > 32) 1577b9d2fe4SEric Anholt return; 1587b9d2fe4SEric Anholt 15957692c94SEric Anholt V3D_CORE_WRITE(core, V3D_CTL_L2CACTL, 16057692c94SEric Anholt V3D_L2CACTL_L2CCLR | 16157692c94SEric Anholt V3D_L2CACTL_L2CENA); 16257692c94SEric Anholt } 16357692c94SEric Anholt 16457692c94SEric Anholt /* Invalidates texture L2 cachelines */ 16557692c94SEric Anholt static void 16657692c94SEric Anholt v3d_flush_l2t(struct v3d_dev *v3d, int core) 16757692c94SEric Anholt { 16851c1b6f9SEric Anholt /* While there is a busy bit (V3D_L2TCACTL_L2TFLS), we don't 16951c1b6f9SEric Anholt * need to wait for completion before dispatching the job -- 17051c1b6f9SEric Anholt * L2T accesses will be stalled until the flush has completed. 171d223f98fSEric Anholt * However, we do need to make sure we don't try to trigger a 172d223f98fSEric Anholt * new flush while the L2_CLEAN queue is trying to 173d223f98fSEric Anholt * synchronously clean after a job. 17451c1b6f9SEric Anholt */ 175d223f98fSEric Anholt mutex_lock(&v3d->cache_clean_lock); 17657692c94SEric Anholt V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, 17757692c94SEric Anholt V3D_L2TCACTL_L2TFLS | 17857692c94SEric Anholt V3D_SET_FIELD(V3D_L2TCACTL_FLM_FLUSH, V3D_L2TCACTL_FLM)); 179d223f98fSEric Anholt mutex_unlock(&v3d->cache_clean_lock); 180d223f98fSEric Anholt } 181d223f98fSEric Anholt 182d223f98fSEric Anholt /* Cleans texture L1 and L2 cachelines (writing back dirty data). 183d223f98fSEric Anholt * 184d223f98fSEric Anholt * For cleaning, which happens from the CACHE_CLEAN queue after CSD has 185d223f98fSEric Anholt * executed, we need to make sure that the clean is done before 186d223f98fSEric Anholt * signaling job completion. So, we synchronously wait before 187d223f98fSEric Anholt * returning, and we make sure that L2 invalidates don't happen in the 188d223f98fSEric Anholt * meantime to confuse our are-we-done checks. 189d223f98fSEric Anholt */ 190d223f98fSEric Anholt void 191d223f98fSEric Anholt v3d_clean_caches(struct v3d_dev *v3d) 192d223f98fSEric Anholt { 193d223f98fSEric Anholt struct drm_device *dev = &v3d->drm; 194d223f98fSEric Anholt int core = 0; 195d223f98fSEric Anholt 196d223f98fSEric Anholt trace_v3d_cache_clean_begin(dev); 197d223f98fSEric Anholt 198d223f98fSEric Anholt V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, V3D_L2TCACTL_TMUWCF); 199d223f98fSEric Anholt if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) & 200e4f86819SIago Toral Quiroga V3D_L2TCACTL_TMUWCF), 100)) { 201e4f86819SIago Toral Quiroga DRM_ERROR("Timeout waiting for TMU write combiner flush\n"); 202d223f98fSEric Anholt } 203d223f98fSEric Anholt 204d223f98fSEric Anholt mutex_lock(&v3d->cache_clean_lock); 205d223f98fSEric Anholt V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, 206d223f98fSEric Anholt V3D_L2TCACTL_L2TFLS | 207d223f98fSEric Anholt V3D_SET_FIELD(V3D_L2TCACTL_FLM_CLEAN, V3D_L2TCACTL_FLM)); 208d223f98fSEric Anholt 209d223f98fSEric Anholt if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) & 210d223f98fSEric Anholt V3D_L2TCACTL_L2TFLS), 100)) { 211d223f98fSEric Anholt DRM_ERROR("Timeout waiting for L2T clean\n"); 212d223f98fSEric Anholt } 213d223f98fSEric Anholt 214d223f98fSEric Anholt mutex_unlock(&v3d->cache_clean_lock); 215d223f98fSEric Anholt 216d223f98fSEric Anholt trace_v3d_cache_clean_end(dev); 21757692c94SEric Anholt } 21857692c94SEric Anholt 21957692c94SEric Anholt /* Invalidates the slice caches. These are read-only caches. */ 22057692c94SEric Anholt static void 22157692c94SEric Anholt v3d_invalidate_slices(struct v3d_dev *v3d, int core) 22257692c94SEric Anholt { 22357692c94SEric Anholt V3D_CORE_WRITE(core, V3D_CTL_SLCACTL, 22457692c94SEric Anholt V3D_SET_FIELD(0xf, V3D_SLCACTL_TVCCS) | 22557692c94SEric Anholt V3D_SET_FIELD(0xf, V3D_SLCACTL_TDCCS) | 22657692c94SEric Anholt V3D_SET_FIELD(0xf, V3D_SLCACTL_UCC) | 22757692c94SEric Anholt V3D_SET_FIELD(0xf, V3D_SLCACTL_ICC)); 22857692c94SEric Anholt } 22957692c94SEric Anholt 23057692c94SEric Anholt void 23157692c94SEric Anholt v3d_invalidate_caches(struct v3d_dev *v3d) 23257692c94SEric Anholt { 233aa5beec3SEric Anholt /* Invalidate the caches from the outside in. That way if 234aa5beec3SEric Anholt * another CL's concurrent use of nearby memory were to pull 235aa5beec3SEric Anholt * an invalidated cacheline back in, we wouldn't leave stale 236aa5beec3SEric Anholt * data in the inner cache. 237aa5beec3SEric Anholt */ 23857692c94SEric Anholt v3d_flush_l3(v3d); 2397b9d2fe4SEric Anholt v3d_invalidate_l2c(v3d, 0); 24057692c94SEric Anholt v3d_flush_l2t(v3d, 0); 241aa5beec3SEric Anholt v3d_invalidate_slices(v3d, 0); 24257692c94SEric Anholt } 24357692c94SEric Anholt 24457692c94SEric Anholt /* Takes the reservation lock on all the BOs being referenced, so that 24557692c94SEric Anholt * at queue submit time we can update the reservations. 24657692c94SEric Anholt * 24757692c94SEric Anholt * We don't lock the RCL the tile alloc/state BOs, or overflow memory 24857692c94SEric Anholt * (all of which are on exec->unref_list). They're entirely private 24957692c94SEric Anholt * to v3d, so we don't attach dma-buf fences to them. 25057692c94SEric Anholt */ 25157692c94SEric Anholt static int 252dffa9b7aSEric Anholt v3d_lock_bo_reservations(struct v3d_job *job, 25357692c94SEric Anholt struct ww_acquire_ctx *acquire_ctx) 25457692c94SEric Anholt { 25557692c94SEric Anholt int i, ret; 25657692c94SEric Anholt 257dffa9b7aSEric Anholt ret = drm_gem_lock_reservations(job->bo, job->bo_count, acquire_ctx); 258c2b3e61aSEric Anholt if (ret) 25957692c94SEric Anholt return ret; 26057692c94SEric Anholt 261dffa9b7aSEric Anholt for (i = 0; i < job->bo_count; i++) { 262c8d4c18bSChristian König ret = dma_resv_reserve_fences(job->bo[i]->resv, 1); 263c8d4c18bSChristian König if (ret) 264c8d4c18bSChristian König goto fail; 265c8d4c18bSChristian König 266da3208e8SDaniel Vetter ret = drm_sched_job_add_implicit_dependencies(&job->base, 267dffa9b7aSEric Anholt job->bo[i], true); 268c8d4c18bSChristian König if (ret) 269c8d4c18bSChristian König goto fail; 270dffa9b7aSEric Anholt } 271dffa9b7aSEric Anholt 27257692c94SEric Anholt return 0; 273c8d4c18bSChristian König 274c8d4c18bSChristian König fail: 275c8d4c18bSChristian König drm_gem_unlock_reservations(job->bo, job->bo_count, acquire_ctx); 276c8d4c18bSChristian König return ret; 27757692c94SEric Anholt } 27857692c94SEric Anholt 27957692c94SEric Anholt /** 280a783a09eSEric Anholt * v3d_lookup_bos() - Sets up job->bo[] with the GEM objects 28157692c94SEric Anholt * referenced by the job. 28257692c94SEric Anholt * @dev: DRM device 28357692c94SEric Anholt * @file_priv: DRM file for this fd 284a783a09eSEric Anholt * @job: V3D job being set up 285e226878eSLee Jones * @bo_handles: GEM handles 286e226878eSLee Jones * @bo_count: Number of GEM handles passed in 28757692c94SEric Anholt * 28857692c94SEric Anholt * The command validator needs to reference BOs by their index within 28957692c94SEric Anholt * the submitted job's BO list. This does the validation of the job's 29057692c94SEric Anholt * BO list and reference counting for the lifetime of the job. 29157692c94SEric Anholt * 29257692c94SEric Anholt * Note that this function doesn't need to unreference the BOs on 29357692c94SEric Anholt * failure, because that will happen at v3d_exec_cleanup() time. 29457692c94SEric Anholt */ 29557692c94SEric Anholt static int 296a783a09eSEric Anholt v3d_lookup_bos(struct drm_device *dev, 29757692c94SEric Anholt struct drm_file *file_priv, 298a783a09eSEric Anholt struct v3d_job *job, 299a783a09eSEric Anholt u64 bo_handles, 300a783a09eSEric Anholt u32 bo_count) 30157692c94SEric Anholt { 302a783a09eSEric Anholt job->bo_count = bo_count; 30357692c94SEric Anholt 304a783a09eSEric Anholt if (!job->bo_count) { 30557692c94SEric Anholt /* See comment on bo_index for why we have to check 30657692c94SEric Anholt * this. 30757692c94SEric Anholt */ 30857692c94SEric Anholt DRM_DEBUG("Rendering requires BOs\n"); 30957692c94SEric Anholt return -EINVAL; 31057692c94SEric Anholt } 31157692c94SEric Anholt 312*5d930605SMelissa Wen return drm_gem_objects_lookup(file_priv, 313a783a09eSEric Anholt (void __user *)(uintptr_t)bo_handles, 314*5d930605SMelissa Wen job->bo_count, &job->bo); 31557692c94SEric Anholt } 31657692c94SEric Anholt 31757692c94SEric Anholt static void 318a783a09eSEric Anholt v3d_job_free(struct kref *ref) 31957692c94SEric Anholt { 320a783a09eSEric Anholt struct v3d_job *job = container_of(ref, struct v3d_job, refcount); 321a783a09eSEric Anholt int i; 32257692c94SEric Anholt 323f98c5ec2SMelissa Wen if (job->bo) { 324f98c5ec2SMelissa Wen for (i = 0; i < job->bo_count; i++) 3252b86189eSEmil Velikov drm_gem_object_put(job->bo[i]); 326a783a09eSEric Anholt kvfree(job->bo); 327f98c5ec2SMelissa Wen } 3281584f16cSEric Anholt 329a783a09eSEric Anholt dma_fence_put(job->irq_fence); 330a783a09eSEric Anholt dma_fence_put(job->done_fence); 331a783a09eSEric Anholt 33226a4dc29SJuan A. Suarez Romero if (job->perfmon) 33326a4dc29SJuan A. Suarez Romero v3d_perfmon_put(job->perfmon); 33426a4dc29SJuan A. Suarez Romero 3351584f16cSEric Anholt kfree(job); 3361584f16cSEric Anholt } 3371584f16cSEric Anholt 338a783a09eSEric Anholt static void 339a783a09eSEric Anholt v3d_render_job_free(struct kref *ref) 3401584f16cSEric Anholt { 341a783a09eSEric Anholt struct v3d_render_job *job = container_of(ref, struct v3d_render_job, 342a783a09eSEric Anholt base.refcount); 343a783a09eSEric Anholt struct v3d_bo *bo, *save; 344a783a09eSEric Anholt 345a783a09eSEric Anholt list_for_each_entry_safe(bo, save, &job->unref_list, unref_head) { 3462b86189eSEmil Velikov drm_gem_object_put(&bo->base.base); 347a783a09eSEric Anholt } 348a783a09eSEric Anholt 349a783a09eSEric Anholt v3d_job_free(ref); 350a783a09eSEric Anholt } 351a783a09eSEric Anholt 352916044faSDaniel Vetter void v3d_job_cleanup(struct v3d_job *job) 353916044faSDaniel Vetter { 35407c2a416SMelissa Wen if (!job) 35507c2a416SMelissa Wen return; 35607c2a416SMelissa Wen 357916044faSDaniel Vetter drm_sched_job_cleanup(&job->base); 358916044faSDaniel Vetter v3d_job_put(job); 359916044faSDaniel Vetter } 360916044faSDaniel Vetter 361a783a09eSEric Anholt void v3d_job_put(struct v3d_job *job) 362a783a09eSEric Anholt { 363a783a09eSEric Anholt kref_put(&job->refcount, job->free); 3641584f16cSEric Anholt } 3651584f16cSEric Anholt 36657692c94SEric Anholt int 36757692c94SEric Anholt v3d_wait_bo_ioctl(struct drm_device *dev, void *data, 36857692c94SEric Anholt struct drm_file *file_priv) 36957692c94SEric Anholt { 37057692c94SEric Anholt int ret; 37157692c94SEric Anholt struct drm_v3d_wait_bo *args = data; 37257692c94SEric Anholt ktime_t start = ktime_get(); 37357692c94SEric Anholt u64 delta_ns; 37457692c94SEric Anholt unsigned long timeout_jiffies = 37557692c94SEric Anholt nsecs_to_jiffies_timeout(args->timeout_ns); 37657692c94SEric Anholt 37757692c94SEric Anholt if (args->pad != 0) 37857692c94SEric Anholt return -EINVAL; 37957692c94SEric Anholt 38052791eeeSChristian König ret = drm_gem_dma_resv_wait(file_priv, args->handle, 3818d668309SRob Herring true, timeout_jiffies); 38257692c94SEric Anholt 38357692c94SEric Anholt /* Decrement the user's timeout, in case we got interrupted 38457692c94SEric Anholt * such that the ioctl will be restarted. 38557692c94SEric Anholt */ 38657692c94SEric Anholt delta_ns = ktime_to_ns(ktime_sub(ktime_get(), start)); 38757692c94SEric Anholt if (delta_ns < args->timeout_ns) 38857692c94SEric Anholt args->timeout_ns -= delta_ns; 38957692c94SEric Anholt else 39057692c94SEric Anholt args->timeout_ns = 0; 39157692c94SEric Anholt 39257692c94SEric Anholt /* Asked to wait beyond the jiffie/scheduler precision? */ 39357692c94SEric Anholt if (ret == -ETIME && args->timeout_ns) 39457692c94SEric Anholt ret = -EAGAIN; 39557692c94SEric Anholt 39657692c94SEric Anholt return ret; 39757692c94SEric Anholt } 39857692c94SEric Anholt 399a783a09eSEric Anholt static int 400223583ddSMelissa Wen v3d_job_add_deps(struct drm_file *file_priv, struct v3d_job *job, 401223583ddSMelissa Wen u32 in_sync, u32 point) 402223583ddSMelissa Wen { 403223583ddSMelissa Wen struct dma_fence *in_fence = NULL; 404223583ddSMelissa Wen int ret; 405223583ddSMelissa Wen 406223583ddSMelissa Wen ret = drm_syncobj_find_fence(file_priv, in_sync, point, 0, &in_fence); 407223583ddSMelissa Wen if (ret == -EINVAL) 408223583ddSMelissa Wen return ret; 409223583ddSMelissa Wen 410223583ddSMelissa Wen return drm_sched_job_add_dependency(&job->base, in_fence); 411223583ddSMelissa Wen } 412223583ddSMelissa Wen 413223583ddSMelissa Wen static int 414a783a09eSEric Anholt v3d_job_init(struct v3d_dev *v3d, struct drm_file *file_priv, 41507c2a416SMelissa Wen void **container, size_t size, void (*free)(struct kref *ref), 416e4165ae8SMelissa Wen u32 in_sync, struct v3d_submit_ext *se, enum v3d_queue queue) 417a783a09eSEric Anholt { 418916044faSDaniel Vetter struct v3d_file_priv *v3d_priv = file_priv->driver_priv; 41907c2a416SMelissa Wen struct v3d_job *job; 420e4165ae8SMelissa Wen bool has_multisync = se && (se->flags & DRM_V3D_EXT_ID_MULTI_SYNC); 421e4165ae8SMelissa Wen int ret, i; 422a783a09eSEric Anholt 42307c2a416SMelissa Wen *container = kcalloc(1, size, GFP_KERNEL); 42407c2a416SMelissa Wen if (!*container) { 42507c2a416SMelissa Wen DRM_ERROR("Cannot allocate memory for v3d job."); 42607c2a416SMelissa Wen return -ENOMEM; 42707c2a416SMelissa Wen } 42807c2a416SMelissa Wen 42907c2a416SMelissa Wen job = *container; 430a783a09eSEric Anholt job->v3d = v3d; 431a783a09eSEric Anholt job->free = free; 432a783a09eSEric Anholt 433916044faSDaniel Vetter ret = drm_sched_job_init(&job->base, &v3d_priv->sched_entity[queue], 434916044faSDaniel Vetter v3d_priv); 435916044faSDaniel Vetter if (ret) 43690a64adbSPeter Robinson goto fail; 437dffa9b7aSEric Anholt 438e4165ae8SMelissa Wen if (has_multisync) { 439e4165ae8SMelissa Wen if (se->in_sync_count && se->wait_stage == queue) { 440e4165ae8SMelissa Wen struct drm_v3d_sem __user *handle = u64_to_user_ptr(se->in_syncs); 441e4165ae8SMelissa Wen 442e4165ae8SMelissa Wen for (i = 0; i < se->in_sync_count; i++) { 443e4165ae8SMelissa Wen struct drm_v3d_sem in; 444e4165ae8SMelissa Wen 445ee30840bSDan Carpenter if (copy_from_user(&in, handle++, sizeof(in))) { 446ee30840bSDan Carpenter ret = -EFAULT; 447e4165ae8SMelissa Wen DRM_DEBUG("Failed to copy wait dep handle.\n"); 448e4165ae8SMelissa Wen goto fail_deps; 449e4165ae8SMelissa Wen } 450e4165ae8SMelissa Wen ret = v3d_job_add_deps(file_priv, job, in.handle, 0); 451e4165ae8SMelissa Wen if (ret) 452e4165ae8SMelissa Wen goto fail_deps; 453e4165ae8SMelissa Wen } 454e4165ae8SMelissa Wen } 455e4165ae8SMelissa Wen } else { 456223583ddSMelissa Wen ret = v3d_job_add_deps(file_priv, job, in_sync, 0); 457dffa9b7aSEric Anholt if (ret) 45807c2a416SMelissa Wen goto fail_deps; 459e4165ae8SMelissa Wen } 460a783a09eSEric Anholt 461a783a09eSEric Anholt kref_init(&job->refcount); 462a783a09eSEric Anholt 463a783a09eSEric Anholt return 0; 46407c2a416SMelissa Wen 46507c2a416SMelissa Wen fail_deps: 466916044faSDaniel Vetter drm_sched_job_cleanup(&job->base); 46707c2a416SMelissa Wen fail: 46807c2a416SMelissa Wen kfree(*container); 46907c2a416SMelissa Wen *container = NULL; 47007c2a416SMelissa Wen 471dffa9b7aSEric Anholt return ret; 472a783a09eSEric Anholt } 473a783a09eSEric Anholt 474916044faSDaniel Vetter static void 475916044faSDaniel Vetter v3d_push_job(struct v3d_job *job) 476a783a09eSEric Anholt { 477dbe48d03SDaniel Vetter drm_sched_job_arm(&job->base); 478dbe48d03SDaniel Vetter 479a783a09eSEric Anholt job->done_fence = dma_fence_get(&job->base.s_fence->finished); 480a783a09eSEric Anholt 481a783a09eSEric Anholt /* put by scheduler job completion */ 482a783a09eSEric Anholt kref_get(&job->refcount); 483a783a09eSEric Anholt 4840e10e9a1SDaniel Vetter drm_sched_entity_push_job(&job->base); 485a783a09eSEric Anholt } 486a783a09eSEric Anholt 487a783a09eSEric Anholt static void 488a783a09eSEric Anholt v3d_attach_fences_and_unlock_reservation(struct drm_file *file_priv, 489a783a09eSEric Anholt struct v3d_job *job, 490a783a09eSEric Anholt struct ww_acquire_ctx *acquire_ctx, 491d223f98fSEric Anholt u32 out_sync, 492e4165ae8SMelissa Wen struct v3d_submit_ext *se, 493d223f98fSEric Anholt struct dma_fence *done_fence) 494a783a09eSEric Anholt { 495a783a09eSEric Anholt struct drm_syncobj *sync_out; 496e4165ae8SMelissa Wen bool has_multisync = se && (se->flags & DRM_V3D_EXT_ID_MULTI_SYNC); 497a783a09eSEric Anholt int i; 498a783a09eSEric Anholt 499a783a09eSEric Anholt for (i = 0; i < job->bo_count; i++) { 500a783a09eSEric Anholt /* XXX: Use shared fences for read-only objects. */ 50173511edfSChristian König dma_resv_add_fence(job->bo[i]->resv, job->done_fence, 50273511edfSChristian König DMA_RESV_USAGE_WRITE); 503a783a09eSEric Anholt } 504a783a09eSEric Anholt 505a783a09eSEric Anholt drm_gem_unlock_reservations(job->bo, job->bo_count, acquire_ctx); 506a783a09eSEric Anholt 507a783a09eSEric Anholt /* Update the return sync object for the job */ 508e4165ae8SMelissa Wen /* If it only supports a single signal semaphore*/ 509e4165ae8SMelissa Wen if (!has_multisync) { 510a783a09eSEric Anholt sync_out = drm_syncobj_find(file_priv, out_sync); 511a783a09eSEric Anholt if (sync_out) { 512d223f98fSEric Anholt drm_syncobj_replace_fence(sync_out, done_fence); 513a783a09eSEric Anholt drm_syncobj_put(sync_out); 514a783a09eSEric Anholt } 515e4165ae8SMelissa Wen return; 516e4165ae8SMelissa Wen } 517e4165ae8SMelissa Wen 518e4165ae8SMelissa Wen /* If multiple semaphores extension is supported */ 519e4165ae8SMelissa Wen if (se->out_sync_count) { 520e4165ae8SMelissa Wen for (i = 0; i < se->out_sync_count; i++) { 521e4165ae8SMelissa Wen drm_syncobj_replace_fence(se->out_syncs[i].syncobj, 522e4165ae8SMelissa Wen done_fence); 523e4165ae8SMelissa Wen drm_syncobj_put(se->out_syncs[i].syncobj); 524e4165ae8SMelissa Wen } 525e4165ae8SMelissa Wen kvfree(se->out_syncs); 526e4165ae8SMelissa Wen } 527e4165ae8SMelissa Wen } 528e4165ae8SMelissa Wen 529e4165ae8SMelissa Wen static void 530e4165ae8SMelissa Wen v3d_put_multisync_post_deps(struct v3d_submit_ext *se) 531e4165ae8SMelissa Wen { 532e4165ae8SMelissa Wen unsigned int i; 533e4165ae8SMelissa Wen 534e4165ae8SMelissa Wen if (!(se && se->out_sync_count)) 535e4165ae8SMelissa Wen return; 536e4165ae8SMelissa Wen 537e4165ae8SMelissa Wen for (i = 0; i < se->out_sync_count; i++) 538e4165ae8SMelissa Wen drm_syncobj_put(se->out_syncs[i].syncobj); 539e4165ae8SMelissa Wen kvfree(se->out_syncs); 540e4165ae8SMelissa Wen } 541e4165ae8SMelissa Wen 542e4165ae8SMelissa Wen static int 543e4165ae8SMelissa Wen v3d_get_multisync_post_deps(struct drm_file *file_priv, 544e4165ae8SMelissa Wen struct v3d_submit_ext *se, 545e4165ae8SMelissa Wen u32 count, u64 handles) 546e4165ae8SMelissa Wen { 547e4165ae8SMelissa Wen struct drm_v3d_sem __user *post_deps; 548e4165ae8SMelissa Wen int i, ret; 549e4165ae8SMelissa Wen 550e4165ae8SMelissa Wen if (!count) 551e4165ae8SMelissa Wen return 0; 552e4165ae8SMelissa Wen 553e4165ae8SMelissa Wen se->out_syncs = (struct v3d_submit_outsync *) 554e4165ae8SMelissa Wen kvmalloc_array(count, 555e4165ae8SMelissa Wen sizeof(struct v3d_submit_outsync), 556e4165ae8SMelissa Wen GFP_KERNEL); 557e4165ae8SMelissa Wen if (!se->out_syncs) 558e4165ae8SMelissa Wen return -ENOMEM; 559e4165ae8SMelissa Wen 560e4165ae8SMelissa Wen post_deps = u64_to_user_ptr(handles); 561e4165ae8SMelissa Wen 562e4165ae8SMelissa Wen for (i = 0; i < count; i++) { 563e4165ae8SMelissa Wen struct drm_v3d_sem out; 564e4165ae8SMelissa Wen 565ee30840bSDan Carpenter if (copy_from_user(&out, post_deps++, sizeof(out))) { 566ee30840bSDan Carpenter ret = -EFAULT; 567e4165ae8SMelissa Wen DRM_DEBUG("Failed to copy post dep handles\n"); 568e4165ae8SMelissa Wen goto fail; 569e4165ae8SMelissa Wen } 570e4165ae8SMelissa Wen 571e4165ae8SMelissa Wen se->out_syncs[i].syncobj = drm_syncobj_find(file_priv, 572e4165ae8SMelissa Wen out.handle); 573e4165ae8SMelissa Wen if (!se->out_syncs[i].syncobj) { 574e4165ae8SMelissa Wen ret = -EINVAL; 575e4165ae8SMelissa Wen goto fail; 576e4165ae8SMelissa Wen } 577e4165ae8SMelissa Wen } 578e4165ae8SMelissa Wen se->out_sync_count = count; 579e4165ae8SMelissa Wen 580e4165ae8SMelissa Wen return 0; 581e4165ae8SMelissa Wen 582e4165ae8SMelissa Wen fail: 583e4165ae8SMelissa Wen for (i--; i >= 0; i--) 584e4165ae8SMelissa Wen drm_syncobj_put(se->out_syncs[i].syncobj); 585e4165ae8SMelissa Wen kvfree(se->out_syncs); 586e4165ae8SMelissa Wen 587e4165ae8SMelissa Wen return ret; 588e4165ae8SMelissa Wen } 589e4165ae8SMelissa Wen 590e4165ae8SMelissa Wen /* Get data for multiple binary semaphores synchronization. Parse syncobj 591e4165ae8SMelissa Wen * to be signaled when job completes (out_sync). 592e4165ae8SMelissa Wen */ 593e4165ae8SMelissa Wen static int 594e4165ae8SMelissa Wen v3d_get_multisync_submit_deps(struct drm_file *file_priv, 595e4165ae8SMelissa Wen struct drm_v3d_extension __user *ext, 596e4165ae8SMelissa Wen void *data) 597e4165ae8SMelissa Wen { 598e4165ae8SMelissa Wen struct drm_v3d_multi_sync multisync; 599e4165ae8SMelissa Wen struct v3d_submit_ext *se = data; 600e4165ae8SMelissa Wen int ret; 601e4165ae8SMelissa Wen 602ee30840bSDan Carpenter if (copy_from_user(&multisync, ext, sizeof(multisync))) 603ee30840bSDan Carpenter return -EFAULT; 604e4165ae8SMelissa Wen 605e4165ae8SMelissa Wen if (multisync.pad) 606e4165ae8SMelissa Wen return -EINVAL; 607e4165ae8SMelissa Wen 608e4165ae8SMelissa Wen ret = v3d_get_multisync_post_deps(file_priv, data, multisync.out_sync_count, 609e4165ae8SMelissa Wen multisync.out_syncs); 610e4165ae8SMelissa Wen if (ret) 611e4165ae8SMelissa Wen return ret; 612e4165ae8SMelissa Wen 613e4165ae8SMelissa Wen se->in_sync_count = multisync.in_sync_count; 614e4165ae8SMelissa Wen se->in_syncs = multisync.in_syncs; 615e4165ae8SMelissa Wen se->flags |= DRM_V3D_EXT_ID_MULTI_SYNC; 616e4165ae8SMelissa Wen se->wait_stage = multisync.wait_stage; 617e4165ae8SMelissa Wen 618e4165ae8SMelissa Wen return 0; 619a783a09eSEric Anholt } 620a783a09eSEric Anholt 621bb3425efSMelissa Wen /* Whenever userspace sets ioctl extensions, v3d_get_extensions parses data 622bb3425efSMelissa Wen * according to the extension id (name). 623bb3425efSMelissa Wen */ 624bb3425efSMelissa Wen static int 625e4165ae8SMelissa Wen v3d_get_extensions(struct drm_file *file_priv, 626e4165ae8SMelissa Wen u64 ext_handles, 627e4165ae8SMelissa Wen void *data) 628bb3425efSMelissa Wen { 629bb3425efSMelissa Wen struct drm_v3d_extension __user *user_ext; 630e4165ae8SMelissa Wen int ret; 631bb3425efSMelissa Wen 632bb3425efSMelissa Wen user_ext = u64_to_user_ptr(ext_handles); 633bb3425efSMelissa Wen while (user_ext) { 634bb3425efSMelissa Wen struct drm_v3d_extension ext; 635bb3425efSMelissa Wen 636bb3425efSMelissa Wen if (copy_from_user(&ext, user_ext, sizeof(ext))) { 637bb3425efSMelissa Wen DRM_DEBUG("Failed to copy submit extension\n"); 638bb3425efSMelissa Wen return -EFAULT; 639bb3425efSMelissa Wen } 640bb3425efSMelissa Wen 641bb3425efSMelissa Wen switch (ext.id) { 642e4165ae8SMelissa Wen case DRM_V3D_EXT_ID_MULTI_SYNC: 643e4165ae8SMelissa Wen ret = v3d_get_multisync_submit_deps(file_priv, user_ext, data); 644e4165ae8SMelissa Wen if (ret) 645e4165ae8SMelissa Wen return ret; 646e4165ae8SMelissa Wen break; 647bb3425efSMelissa Wen default: 648bb3425efSMelissa Wen DRM_DEBUG_DRIVER("Unknown extension id: %d\n", ext.id); 649bb3425efSMelissa Wen return -EINVAL; 650bb3425efSMelissa Wen } 651bb3425efSMelissa Wen 652bb3425efSMelissa Wen user_ext = u64_to_user_ptr(ext.next); 653bb3425efSMelissa Wen } 654bb3425efSMelissa Wen 655bb3425efSMelissa Wen return 0; 656bb3425efSMelissa Wen } 657bb3425efSMelissa Wen 65857692c94SEric Anholt /** 65957692c94SEric Anholt * v3d_submit_cl_ioctl() - Submits a job (frame) to the V3D. 66057692c94SEric Anholt * @dev: DRM device 66157692c94SEric Anholt * @data: ioctl argument 66257692c94SEric Anholt * @file_priv: DRM file for this fd 66357692c94SEric Anholt * 66457692c94SEric Anholt * This is the main entrypoint for userspace to submit a 3D frame to 66557692c94SEric Anholt * the GPU. Userspace provides the binner command list (if 66657692c94SEric Anholt * applicable), and the kernel sets up the render command list to draw 66757692c94SEric Anholt * to the framebuffer described in the ioctl, using the command lists 66857692c94SEric Anholt * that the 3D engine's binner will produce. 66957692c94SEric Anholt */ 67057692c94SEric Anholt int 67157692c94SEric Anholt v3d_submit_cl_ioctl(struct drm_device *dev, void *data, 67257692c94SEric Anholt struct drm_file *file_priv) 67357692c94SEric Anholt { 67457692c94SEric Anholt struct v3d_dev *v3d = to_v3d_dev(dev); 67557692c94SEric Anholt struct v3d_file_priv *v3d_priv = file_priv->driver_priv; 67657692c94SEric Anholt struct drm_v3d_submit_cl *args = data; 677e4165ae8SMelissa Wen struct v3d_submit_ext se = {0}; 678a783a09eSEric Anholt struct v3d_bin_job *bin = NULL; 67907c2a416SMelissa Wen struct v3d_render_job *render = NULL; 680455d56ceSIago Toral Quiroga struct v3d_job *clean_job = NULL; 681455d56ceSIago Toral Quiroga struct v3d_job *last_job; 68257692c94SEric Anholt struct ww_acquire_ctx acquire_ctx; 68357692c94SEric Anholt int ret = 0; 68457692c94SEric Anholt 68555a9b748SEric Anholt trace_v3d_submit_cl_ioctl(&v3d->drm, args->rcl_start, args->rcl_end); 68655a9b748SEric Anholt 687bb3425efSMelissa Wen if (args->pad) 68826a4dc29SJuan A. Suarez Romero return -EINVAL; 68926a4dc29SJuan A. Suarez Romero 690bb3425efSMelissa Wen if (args->flags && 691bb3425efSMelissa Wen args->flags & ~(DRM_V3D_SUBMIT_CL_FLUSH_CACHE | 692bb3425efSMelissa Wen DRM_V3D_SUBMIT_EXTENSION)) { 693455d56ceSIago Toral Quiroga DRM_INFO("invalid flags: %d\n", args->flags); 69457692c94SEric Anholt return -EINVAL; 69557692c94SEric Anholt } 69657692c94SEric Anholt 697bb3425efSMelissa Wen if (args->flags & DRM_V3D_SUBMIT_EXTENSION) { 698e4165ae8SMelissa Wen ret = v3d_get_extensions(file_priv, args->extensions, &se); 699bb3425efSMelissa Wen if (ret) { 700bb3425efSMelissa Wen DRM_DEBUG("Failed to get extensions.\n"); 701bb3425efSMelissa Wen return ret; 702bb3425efSMelissa Wen } 703bb3425efSMelissa Wen } 704bb3425efSMelissa Wen 70507c2a416SMelissa Wen ret = v3d_job_init(v3d, file_priv, (void *)&render, sizeof(*render), 706e4165ae8SMelissa Wen v3d_render_job_free, args->in_sync_rcl, &se, V3D_RENDER); 70707c2a416SMelissa Wen if (ret) 70807c2a416SMelissa Wen goto fail; 70957692c94SEric Anholt 710a783a09eSEric Anholt render->start = args->rcl_start; 711a783a09eSEric Anholt render->end = args->rcl_end; 712a783a09eSEric Anholt INIT_LIST_HEAD(&render->unref_list); 713a783a09eSEric Anholt 714a783a09eSEric Anholt if (args->bcl_start != args->bcl_end) { 71507c2a416SMelissa Wen ret = v3d_job_init(v3d, file_priv, (void *)&bin, sizeof(*bin), 716e4165ae8SMelissa Wen v3d_job_free, args->in_sync_bcl, &se, V3D_BIN); 71707c2a416SMelissa Wen if (ret) 71807c2a416SMelissa Wen goto fail; 71957692c94SEric Anholt 720a783a09eSEric Anholt bin->start = args->bcl_start; 721a783a09eSEric Anholt bin->end = args->bcl_end; 722a783a09eSEric Anholt bin->qma = args->qma; 723a783a09eSEric Anholt bin->qms = args->qms; 724a783a09eSEric Anholt bin->qts = args->qts; 725a783a09eSEric Anholt bin->render = render; 726a783a09eSEric Anholt } 72757692c94SEric Anholt 728455d56ceSIago Toral Quiroga if (args->flags & DRM_V3D_SUBMIT_CL_FLUSH_CACHE) { 72907c2a416SMelissa Wen ret = v3d_job_init(v3d, file_priv, (void *)&clean_job, sizeof(*clean_job), 73075ad021fSYang Li v3d_job_free, 0, NULL, V3D_CACHE_CLEAN); 73107c2a416SMelissa Wen if (ret) 732455d56ceSIago Toral Quiroga goto fail; 733455d56ceSIago Toral Quiroga 734455d56ceSIago Toral Quiroga last_job = clean_job; 735455d56ceSIago Toral Quiroga } else { 736455d56ceSIago Toral Quiroga last_job = &render->base; 737455d56ceSIago Toral Quiroga } 738455d56ceSIago Toral Quiroga 739455d56ceSIago Toral Quiroga ret = v3d_lookup_bos(dev, file_priv, last_job, 740a783a09eSEric Anholt args->bo_handles, args->bo_handle_count); 74157692c94SEric Anholt if (ret) 74257692c94SEric Anholt goto fail; 74357692c94SEric Anholt 744455d56ceSIago Toral Quiroga ret = v3d_lock_bo_reservations(last_job, &acquire_ctx); 74557692c94SEric Anholt if (ret) 74657692c94SEric Anholt goto fail; 74757692c94SEric Anholt 74826a4dc29SJuan A. Suarez Romero if (args->perfmon_id) { 74926a4dc29SJuan A. Suarez Romero render->base.perfmon = v3d_perfmon_find(v3d_priv, 75026a4dc29SJuan A. Suarez Romero args->perfmon_id); 75126a4dc29SJuan A. Suarez Romero 75226a4dc29SJuan A. Suarez Romero if (!render->base.perfmon) { 75326a4dc29SJuan A. Suarez Romero ret = -ENOENT; 754e57c1a3bSYongzhi Liu goto fail_perfmon; 75526a4dc29SJuan A. Suarez Romero } 75626a4dc29SJuan A. Suarez Romero } 75726a4dc29SJuan A. Suarez Romero 7587122b68bSEric Anholt mutex_lock(&v3d->sched_lock); 759a783a09eSEric Anholt if (bin) { 76026a4dc29SJuan A. Suarez Romero bin->base.perfmon = render->base.perfmon; 76126a4dc29SJuan A. Suarez Romero v3d_perfmon_get(bin->base.perfmon); 762916044faSDaniel Vetter v3d_push_job(&bin->base); 76357692c94SEric Anholt 764da3208e8SDaniel Vetter ret = drm_sched_job_add_dependency(&render->base.base, 765dffa9b7aSEric Anholt dma_fence_get(bin->base.done_fence)); 766dffa9b7aSEric Anholt if (ret) 767dffa9b7aSEric Anholt goto fail_unreserve; 76857692c94SEric Anholt } 76957692c94SEric Anholt 770916044faSDaniel Vetter v3d_push_job(&render->base); 771455d56ceSIago Toral Quiroga 772455d56ceSIago Toral Quiroga if (clean_job) { 773455d56ceSIago Toral Quiroga struct dma_fence *render_fence = 774455d56ceSIago Toral Quiroga dma_fence_get(render->base.done_fence); 775da3208e8SDaniel Vetter ret = drm_sched_job_add_dependency(&clean_job->base, 776da3208e8SDaniel Vetter render_fence); 777455d56ceSIago Toral Quiroga if (ret) 778455d56ceSIago Toral Quiroga goto fail_unreserve; 77926a4dc29SJuan A. Suarez Romero clean_job->perfmon = render->base.perfmon; 78026a4dc29SJuan A. Suarez Romero v3d_perfmon_get(clean_job->perfmon); 781916044faSDaniel Vetter v3d_push_job(clean_job); 782455d56ceSIago Toral Quiroga } 783455d56ceSIago Toral Quiroga 7847122b68bSEric Anholt mutex_unlock(&v3d->sched_lock); 78557692c94SEric Anholt 786a783a09eSEric Anholt v3d_attach_fences_and_unlock_reservation(file_priv, 787455d56ceSIago Toral Quiroga last_job, 788d223f98fSEric Anholt &acquire_ctx, 789d223f98fSEric Anholt args->out_sync, 790e4165ae8SMelissa Wen &se, 791455d56ceSIago Toral Quiroga last_job->done_fence); 79257692c94SEric Anholt 793a783a09eSEric Anholt if (bin) 794a783a09eSEric Anholt v3d_job_put(&bin->base); 795a783a09eSEric Anholt v3d_job_put(&render->base); 796455d56ceSIago Toral Quiroga if (clean_job) 797455d56ceSIago Toral Quiroga v3d_job_put(clean_job); 79857692c94SEric Anholt 79957692c94SEric Anholt return 0; 80057692c94SEric Anholt 80157692c94SEric Anholt fail_unreserve: 8027122b68bSEric Anholt mutex_unlock(&v3d->sched_lock); 803e57c1a3bSYongzhi Liu fail_perfmon: 804455d56ceSIago Toral Quiroga drm_gem_unlock_reservations(last_job->bo, 805455d56ceSIago Toral Quiroga last_job->bo_count, &acquire_ctx); 80657692c94SEric Anholt fail: 80707c2a416SMelissa Wen v3d_job_cleanup((void *)bin); 80807c2a416SMelissa Wen v3d_job_cleanup((void *)render); 809916044faSDaniel Vetter v3d_job_cleanup(clean_job); 810e4165ae8SMelissa Wen v3d_put_multisync_post_deps(&se); 81157692c94SEric Anholt 81257692c94SEric Anholt return ret; 81357692c94SEric Anholt } 81457692c94SEric Anholt 8151584f16cSEric Anholt /** 8161584f16cSEric Anholt * v3d_submit_tfu_ioctl() - Submits a TFU (texture formatting) job to the V3D. 8171584f16cSEric Anholt * @dev: DRM device 8181584f16cSEric Anholt * @data: ioctl argument 8191584f16cSEric Anholt * @file_priv: DRM file for this fd 8201584f16cSEric Anholt * 8211584f16cSEric Anholt * Userspace provides the register setup for the TFU, which we don't 8221584f16cSEric Anholt * need to validate since the TFU is behind the MMU. 8231584f16cSEric Anholt */ 8241584f16cSEric Anholt int 8251584f16cSEric Anholt v3d_submit_tfu_ioctl(struct drm_device *dev, void *data, 8261584f16cSEric Anholt struct drm_file *file_priv) 8271584f16cSEric Anholt { 8281584f16cSEric Anholt struct v3d_dev *v3d = to_v3d_dev(dev); 8291584f16cSEric Anholt struct drm_v3d_submit_tfu *args = data; 830e4165ae8SMelissa Wen struct v3d_submit_ext se = {0}; 83107c2a416SMelissa Wen struct v3d_tfu_job *job = NULL; 8321584f16cSEric Anholt struct ww_acquire_ctx acquire_ctx; 8331584f16cSEric Anholt int ret = 0; 8341584f16cSEric Anholt 83555a9b748SEric Anholt trace_v3d_submit_tfu_ioctl(&v3d->drm, args->iia); 83655a9b748SEric Anholt 837bb3425efSMelissa Wen if (args->flags && !(args->flags & DRM_V3D_SUBMIT_EXTENSION)) { 838bb3425efSMelissa Wen DRM_DEBUG("invalid flags: %d\n", args->flags); 839bb3425efSMelissa Wen return -EINVAL; 840bb3425efSMelissa Wen } 841bb3425efSMelissa Wen 842bb3425efSMelissa Wen if (args->flags & DRM_V3D_SUBMIT_EXTENSION) { 843e4165ae8SMelissa Wen ret = v3d_get_extensions(file_priv, args->extensions, &se); 844bb3425efSMelissa Wen if (ret) { 845bb3425efSMelissa Wen DRM_DEBUG("Failed to get extensions.\n"); 846bb3425efSMelissa Wen return ret; 847bb3425efSMelissa Wen } 848bb3425efSMelissa Wen } 849bb3425efSMelissa Wen 85007c2a416SMelissa Wen ret = v3d_job_init(v3d, file_priv, (void *)&job, sizeof(*job), 851e4165ae8SMelissa Wen v3d_job_free, args->in_sync, &se, V3D_TFU); 85207c2a416SMelissa Wen if (ret) 85307c2a416SMelissa Wen goto fail; 8541584f16cSEric Anholt 855a783a09eSEric Anholt job->base.bo = kcalloc(ARRAY_SIZE(args->bo_handles), 856a783a09eSEric Anholt sizeof(*job->base.bo), GFP_KERNEL); 857a783a09eSEric Anholt if (!job->base.bo) { 85807c2a416SMelissa Wen ret = -ENOMEM; 85907c2a416SMelissa Wen goto fail; 860a783a09eSEric Anholt } 8611584f16cSEric Anholt 8621584f16cSEric Anholt job->args = *args; 8631584f16cSEric Anholt 8641584f16cSEric Anholt spin_lock(&file_priv->table_lock); 865a783a09eSEric Anholt for (job->base.bo_count = 0; 866a783a09eSEric Anholt job->base.bo_count < ARRAY_SIZE(args->bo_handles); 867a783a09eSEric Anholt job->base.bo_count++) { 8681584f16cSEric Anholt struct drm_gem_object *bo; 8691584f16cSEric Anholt 870a783a09eSEric Anholt if (!args->bo_handles[job->base.bo_count]) 8711584f16cSEric Anholt break; 8721584f16cSEric Anholt 8731584f16cSEric Anholt bo = idr_find(&file_priv->object_idr, 874a783a09eSEric Anholt args->bo_handles[job->base.bo_count]); 8751584f16cSEric Anholt if (!bo) { 8761584f16cSEric Anholt DRM_DEBUG("Failed to look up GEM BO %d: %d\n", 877a783a09eSEric Anholt job->base.bo_count, 878a783a09eSEric Anholt args->bo_handles[job->base.bo_count]); 8791584f16cSEric Anholt ret = -ENOENT; 8801584f16cSEric Anholt spin_unlock(&file_priv->table_lock); 8811584f16cSEric Anholt goto fail; 8821584f16cSEric Anholt } 8831584f16cSEric Anholt drm_gem_object_get(bo); 884a783a09eSEric Anholt job->base.bo[job->base.bo_count] = bo; 8851584f16cSEric Anholt } 8861584f16cSEric Anholt spin_unlock(&file_priv->table_lock); 8871584f16cSEric Anholt 888dffa9b7aSEric Anholt ret = v3d_lock_bo_reservations(&job->base, &acquire_ctx); 8891584f16cSEric Anholt if (ret) 8901584f16cSEric Anholt goto fail; 8911584f16cSEric Anholt 8921584f16cSEric Anholt mutex_lock(&v3d->sched_lock); 893916044faSDaniel Vetter v3d_push_job(&job->base); 8941584f16cSEric Anholt mutex_unlock(&v3d->sched_lock); 8951584f16cSEric Anholt 896a783a09eSEric Anholt v3d_attach_fences_and_unlock_reservation(file_priv, 897a783a09eSEric Anholt &job->base, &acquire_ctx, 898d223f98fSEric Anholt args->out_sync, 899e4165ae8SMelissa Wen &se, 900d223f98fSEric Anholt job->base.done_fence); 9011584f16cSEric Anholt 902a783a09eSEric Anholt v3d_job_put(&job->base); 9031584f16cSEric Anholt 9041584f16cSEric Anholt return 0; 9051584f16cSEric Anholt 9061584f16cSEric Anholt fail: 90707c2a416SMelissa Wen v3d_job_cleanup((void *)job); 908e4165ae8SMelissa Wen v3d_put_multisync_post_deps(&se); 9091584f16cSEric Anholt 9101584f16cSEric Anholt return ret; 9111584f16cSEric Anholt } 9121584f16cSEric Anholt 913d223f98fSEric Anholt /** 914d223f98fSEric Anholt * v3d_submit_csd_ioctl() - Submits a CSD (texture formatting) job to the V3D. 915d223f98fSEric Anholt * @dev: DRM device 916d223f98fSEric Anholt * @data: ioctl argument 917d223f98fSEric Anholt * @file_priv: DRM file for this fd 918d223f98fSEric Anholt * 919d223f98fSEric Anholt * Userspace provides the register setup for the CSD, which we don't 920d223f98fSEric Anholt * need to validate since the CSD is behind the MMU. 921d223f98fSEric Anholt */ 922d223f98fSEric Anholt int 923d223f98fSEric Anholt v3d_submit_csd_ioctl(struct drm_device *dev, void *data, 924d223f98fSEric Anholt struct drm_file *file_priv) 925d223f98fSEric Anholt { 926d223f98fSEric Anholt struct v3d_dev *v3d = to_v3d_dev(dev); 927d223f98fSEric Anholt struct v3d_file_priv *v3d_priv = file_priv->driver_priv; 928d223f98fSEric Anholt struct drm_v3d_submit_csd *args = data; 929e4165ae8SMelissa Wen struct v3d_submit_ext se = {0}; 93007c2a416SMelissa Wen struct v3d_csd_job *job = NULL; 93107c2a416SMelissa Wen struct v3d_job *clean_job = NULL; 932d223f98fSEric Anholt struct ww_acquire_ctx acquire_ctx; 933d223f98fSEric Anholt int ret; 934d223f98fSEric Anholt 935d223f98fSEric Anholt trace_v3d_submit_csd_ioctl(&v3d->drm, args->cfg[5], args->cfg[6]); 936d223f98fSEric Anholt 937bb3425efSMelissa Wen if (args->pad) 938bb3425efSMelissa Wen return -EINVAL; 939bb3425efSMelissa Wen 940d223f98fSEric Anholt if (!v3d_has_csd(v3d)) { 941d223f98fSEric Anholt DRM_DEBUG("Attempting CSD submit on non-CSD hardware\n"); 942d223f98fSEric Anholt return -EINVAL; 943d223f98fSEric Anholt } 944d223f98fSEric Anholt 945bb3425efSMelissa Wen if (args->flags && !(args->flags & DRM_V3D_SUBMIT_EXTENSION)) { 946bb3425efSMelissa Wen DRM_INFO("invalid flags: %d\n", args->flags); 947bb3425efSMelissa Wen return -EINVAL; 948bb3425efSMelissa Wen } 949bb3425efSMelissa Wen 950bb3425efSMelissa Wen if (args->flags & DRM_V3D_SUBMIT_EXTENSION) { 951e4165ae8SMelissa Wen ret = v3d_get_extensions(file_priv, args->extensions, &se); 952bb3425efSMelissa Wen if (ret) { 953bb3425efSMelissa Wen DRM_DEBUG("Failed to get extensions.\n"); 954bb3425efSMelissa Wen return ret; 955bb3425efSMelissa Wen } 956bb3425efSMelissa Wen } 957bb3425efSMelissa Wen 95807c2a416SMelissa Wen ret = v3d_job_init(v3d, file_priv, (void *)&job, sizeof(*job), 959e4165ae8SMelissa Wen v3d_job_free, args->in_sync, &se, V3D_CSD); 96007c2a416SMelissa Wen if (ret) 96107c2a416SMelissa Wen goto fail; 962d223f98fSEric Anholt 96307c2a416SMelissa Wen ret = v3d_job_init(v3d, file_priv, (void *)&clean_job, sizeof(*clean_job), 96475ad021fSYang Li v3d_job_free, 0, NULL, V3D_CACHE_CLEAN); 96507c2a416SMelissa Wen if (ret) 96607c2a416SMelissa Wen goto fail; 967d223f98fSEric Anholt 968d223f98fSEric Anholt job->args = *args; 969d223f98fSEric Anholt 970d223f98fSEric Anholt ret = v3d_lookup_bos(dev, file_priv, clean_job, 971d223f98fSEric Anholt args->bo_handles, args->bo_handle_count); 972d223f98fSEric Anholt if (ret) 973d223f98fSEric Anholt goto fail; 974d223f98fSEric Anholt 975dffa9b7aSEric Anholt ret = v3d_lock_bo_reservations(clean_job, &acquire_ctx); 976d223f98fSEric Anholt if (ret) 977d223f98fSEric Anholt goto fail; 978d223f98fSEric Anholt 97926a4dc29SJuan A. Suarez Romero if (args->perfmon_id) { 98026a4dc29SJuan A. Suarez Romero job->base.perfmon = v3d_perfmon_find(v3d_priv, 98126a4dc29SJuan A. Suarez Romero args->perfmon_id); 98226a4dc29SJuan A. Suarez Romero if (!job->base.perfmon) { 98326a4dc29SJuan A. Suarez Romero ret = -ENOENT; 984e57c1a3bSYongzhi Liu goto fail_perfmon; 98526a4dc29SJuan A. Suarez Romero } 98626a4dc29SJuan A. Suarez Romero } 98726a4dc29SJuan A. Suarez Romero 988d223f98fSEric Anholt mutex_lock(&v3d->sched_lock); 989916044faSDaniel Vetter v3d_push_job(&job->base); 990d223f98fSEric Anholt 991da3208e8SDaniel Vetter ret = drm_sched_job_add_dependency(&clean_job->base, 992dffa9b7aSEric Anholt dma_fence_get(job->base.done_fence)); 993dffa9b7aSEric Anholt if (ret) 994dffa9b7aSEric Anholt goto fail_unreserve; 995dffa9b7aSEric Anholt 996916044faSDaniel Vetter v3d_push_job(clean_job); 997d223f98fSEric Anholt mutex_unlock(&v3d->sched_lock); 998d223f98fSEric Anholt 999d223f98fSEric Anholt v3d_attach_fences_and_unlock_reservation(file_priv, 1000d223f98fSEric Anholt clean_job, 1001d223f98fSEric Anholt &acquire_ctx, 1002d223f98fSEric Anholt args->out_sync, 1003e4165ae8SMelissa Wen &se, 1004d223f98fSEric Anholt clean_job->done_fence); 1005d223f98fSEric Anholt 1006d223f98fSEric Anholt v3d_job_put(&job->base); 1007d223f98fSEric Anholt v3d_job_put(clean_job); 1008d223f98fSEric Anholt 1009d223f98fSEric Anholt return 0; 1010d223f98fSEric Anholt 1011d223f98fSEric Anholt fail_unreserve: 1012d223f98fSEric Anholt mutex_unlock(&v3d->sched_lock); 1013e57c1a3bSYongzhi Liu fail_perfmon: 1014d223f98fSEric Anholt drm_gem_unlock_reservations(clean_job->bo, clean_job->bo_count, 1015d223f98fSEric Anholt &acquire_ctx); 1016d223f98fSEric Anholt fail: 101707c2a416SMelissa Wen v3d_job_cleanup((void *)job); 1018916044faSDaniel Vetter v3d_job_cleanup(clean_job); 1019e4165ae8SMelissa Wen v3d_put_multisync_post_deps(&se); 1020d223f98fSEric Anholt 1021d223f98fSEric Anholt return ret; 1022d223f98fSEric Anholt } 1023d223f98fSEric Anholt 102457692c94SEric Anholt int 102557692c94SEric Anholt v3d_gem_init(struct drm_device *dev) 102657692c94SEric Anholt { 102757692c94SEric Anholt struct v3d_dev *v3d = to_v3d_dev(dev); 102857692c94SEric Anholt u32 pt_size = 4096 * 1024; 102957692c94SEric Anholt int ret, i; 103057692c94SEric Anholt 103157692c94SEric Anholt for (i = 0; i < V3D_MAX_QUEUES; i++) 103257692c94SEric Anholt v3d->queue[i].fence_context = dma_fence_context_alloc(1); 103357692c94SEric Anholt 103457692c94SEric Anholt spin_lock_init(&v3d->mm_lock); 103557692c94SEric Anholt spin_lock_init(&v3d->job_lock); 103691d502f6SMaíra Canal ret = drmm_mutex_init(dev, &v3d->bo_lock); 103791d502f6SMaíra Canal if (ret) 103891d502f6SMaíra Canal return ret; 103991d502f6SMaíra Canal ret = drmm_mutex_init(dev, &v3d->reset_lock); 104091d502f6SMaíra Canal if (ret) 104191d502f6SMaíra Canal return ret; 104291d502f6SMaíra Canal ret = drmm_mutex_init(dev, &v3d->sched_lock); 104391d502f6SMaíra Canal if (ret) 104491d502f6SMaíra Canal return ret; 104591d502f6SMaíra Canal ret = drmm_mutex_init(dev, &v3d->cache_clean_lock); 104691d502f6SMaíra Canal if (ret) 104791d502f6SMaíra Canal return ret; 104857692c94SEric Anholt 104957692c94SEric Anholt /* Note: We don't allocate address 0. Various bits of HW 105057692c94SEric Anholt * treat 0 as special, such as the occlusion query counters 105157692c94SEric Anholt * where 0 means "disabled". 105257692c94SEric Anholt */ 105357692c94SEric Anholt drm_mm_init(&v3d->mm, 1, pt_size / sizeof(u32) - 1); 105457692c94SEric Anholt 1055bc662528SDaniel Vetter v3d->pt = dma_alloc_wc(v3d->drm.dev, pt_size, 105657692c94SEric Anholt &v3d->pt_paddr, 105757692c94SEric Anholt GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO); 105857692c94SEric Anholt if (!v3d->pt) { 105957692c94SEric Anholt drm_mm_takedown(&v3d->mm); 1060bc662528SDaniel Vetter dev_err(v3d->drm.dev, 10614a83c26aSDanilo Krummrich "Failed to allocate page tables. Please ensure you have DMA enabled.\n"); 106257692c94SEric Anholt return -ENOMEM; 106357692c94SEric Anholt } 106457692c94SEric Anholt 106557692c94SEric Anholt v3d_init_hw_state(v3d); 106657692c94SEric Anholt v3d_mmu_set_page_table(v3d); 106757692c94SEric Anholt 106857692c94SEric Anholt ret = v3d_sched_init(v3d); 106957692c94SEric Anholt if (ret) { 107057692c94SEric Anholt drm_mm_takedown(&v3d->mm); 1071bc662528SDaniel Vetter dma_free_coherent(v3d->drm.dev, 4096 * 1024, (void *)v3d->pt, 107257692c94SEric Anholt v3d->pt_paddr); 107357692c94SEric Anholt } 107457692c94SEric Anholt 107557692c94SEric Anholt return 0; 107657692c94SEric Anholt } 107757692c94SEric Anholt 107857692c94SEric Anholt void 107957692c94SEric Anholt v3d_gem_destroy(struct drm_device *dev) 108057692c94SEric Anholt { 108157692c94SEric Anholt struct v3d_dev *v3d = to_v3d_dev(dev); 108257692c94SEric Anholt 108357692c94SEric Anholt v3d_sched_fini(v3d); 108457692c94SEric Anholt 1085a783a09eSEric Anholt /* Waiting for jobs to finish would need to be done before 108657692c94SEric Anholt * unregistering V3D. 108757692c94SEric Anholt */ 108814d1d190SEric Anholt WARN_ON(v3d->bin_job); 108914d1d190SEric Anholt WARN_ON(v3d->render_job); 109057692c94SEric Anholt 109157692c94SEric Anholt drm_mm_takedown(&v3d->mm); 109257692c94SEric Anholt 1093bc662528SDaniel Vetter dma_free_coherent(v3d->drm.dev, 4096 * 1024, (void *)v3d->pt, 1094bc662528SDaniel Vetter v3d->pt_paddr); 109557692c94SEric Anholt } 1096