xref: /openbmc/linux/drivers/gpu/drm/v3d/v3d_drv.c (revision fc22771547e7e8a63679f0218e943d72b107de65)
157692c94SEric Anholt // SPDX-License-Identifier: GPL-2.0+
257692c94SEric Anholt /* Copyright (C) 2014-2018 Broadcom */
357692c94SEric Anholt 
457692c94SEric Anholt /**
557692c94SEric Anholt  * DOC: Broadcom V3D Graphics Driver
657692c94SEric Anholt  *
757692c94SEric Anholt  * This driver supports the Broadcom V3D 3.3 and 4.1 OpenGL ES GPUs.
857692c94SEric Anholt  * For V3D 2.x support, see the VC4 driver.
957692c94SEric Anholt  *
10fd347df1SEric Anholt  * Currently only single-core rendering using the binner and renderer,
11fd347df1SEric Anholt  * along with TFU (texture formatting unit) rendering is supported.
12fd347df1SEric Anholt  * V3D 4.x's CSD (compute shader dispatch) is not yet supported.
1357692c94SEric Anholt  */
1457692c94SEric Anholt 
1557692c94SEric Anholt #include <linux/clk.h>
1657692c94SEric Anholt #include <linux/device.h>
1757692c94SEric Anholt #include <linux/io.h>
1857692c94SEric Anholt #include <linux/module.h>
1957692c94SEric Anholt #include <linux/of_platform.h>
2057692c94SEric Anholt #include <linux/platform_device.h>
2157692c94SEric Anholt #include <linux/pm_runtime.h>
2257692c94SEric Anholt #include <drm/drm_fb_cma_helper.h>
2357692c94SEric Anholt #include <drm/drm_fb_helper.h>
2457692c94SEric Anholt 
2557692c94SEric Anholt #include "uapi/drm/v3d_drm.h"
2657692c94SEric Anholt #include "v3d_drv.h"
2757692c94SEric Anholt #include "v3d_regs.h"
2857692c94SEric Anholt 
2957692c94SEric Anholt #define DRIVER_NAME "v3d"
3057692c94SEric Anholt #define DRIVER_DESC "Broadcom V3D graphics"
3157692c94SEric Anholt #define DRIVER_DATE "20180419"
3257692c94SEric Anholt #define DRIVER_MAJOR 1
3357692c94SEric Anholt #define DRIVER_MINOR 0
3457692c94SEric Anholt #define DRIVER_PATCHLEVEL 0
3557692c94SEric Anholt 
3657692c94SEric Anholt #ifdef CONFIG_PM
3757692c94SEric Anholt static int v3d_runtime_suspend(struct device *dev)
3857692c94SEric Anholt {
3957692c94SEric Anholt 	struct drm_device *drm = dev_get_drvdata(dev);
4057692c94SEric Anholt 	struct v3d_dev *v3d = to_v3d_dev(drm);
4157692c94SEric Anholt 
4257692c94SEric Anholt 	v3d_irq_disable(v3d);
4357692c94SEric Anholt 
4457692c94SEric Anholt 	clk_disable_unprepare(v3d->clk);
4557692c94SEric Anholt 
4657692c94SEric Anholt 	return 0;
4757692c94SEric Anholt }
4857692c94SEric Anholt 
4957692c94SEric Anholt static int v3d_runtime_resume(struct device *dev)
5057692c94SEric Anholt {
5157692c94SEric Anholt 	struct drm_device *drm = dev_get_drvdata(dev);
5257692c94SEric Anholt 	struct v3d_dev *v3d = to_v3d_dev(drm);
5357692c94SEric Anholt 	int ret;
5457692c94SEric Anholt 
5557692c94SEric Anholt 	ret = clk_prepare_enable(v3d->clk);
5657692c94SEric Anholt 	if (ret != 0)
5757692c94SEric Anholt 		return ret;
5857692c94SEric Anholt 
5957692c94SEric Anholt 	/* XXX: VPM base */
6057692c94SEric Anholt 
6157692c94SEric Anholt 	v3d_mmu_set_page_table(v3d);
6257692c94SEric Anholt 	v3d_irq_enable(v3d);
6357692c94SEric Anholt 
6457692c94SEric Anholt 	return 0;
6557692c94SEric Anholt }
6657692c94SEric Anholt #endif
6757692c94SEric Anholt 
6857692c94SEric Anholt static const struct dev_pm_ops v3d_v3d_pm_ops = {
6957692c94SEric Anholt 	SET_RUNTIME_PM_OPS(v3d_runtime_suspend, v3d_runtime_resume, NULL)
7057692c94SEric Anholt };
7157692c94SEric Anholt 
7257692c94SEric Anholt static int v3d_get_param_ioctl(struct drm_device *dev, void *data,
7357692c94SEric Anholt 			       struct drm_file *file_priv)
7457692c94SEric Anholt {
7557692c94SEric Anholt 	struct v3d_dev *v3d = to_v3d_dev(dev);
7657692c94SEric Anholt 	struct drm_v3d_get_param *args = data;
7757692c94SEric Anholt 	int ret;
7857692c94SEric Anholt 	static const u32 reg_map[] = {
7957692c94SEric Anholt 		[DRM_V3D_PARAM_V3D_UIFCFG] = V3D_HUB_UIFCFG,
8057692c94SEric Anholt 		[DRM_V3D_PARAM_V3D_HUB_IDENT1] = V3D_HUB_IDENT1,
8157692c94SEric Anholt 		[DRM_V3D_PARAM_V3D_HUB_IDENT2] = V3D_HUB_IDENT2,
8257692c94SEric Anholt 		[DRM_V3D_PARAM_V3D_HUB_IDENT3] = V3D_HUB_IDENT3,
8357692c94SEric Anholt 		[DRM_V3D_PARAM_V3D_CORE0_IDENT0] = V3D_CTL_IDENT0,
8457692c94SEric Anholt 		[DRM_V3D_PARAM_V3D_CORE0_IDENT1] = V3D_CTL_IDENT1,
8557692c94SEric Anholt 		[DRM_V3D_PARAM_V3D_CORE0_IDENT2] = V3D_CTL_IDENT2,
8657692c94SEric Anholt 	};
8757692c94SEric Anholt 
8857692c94SEric Anholt 	if (args->pad != 0)
8957692c94SEric Anholt 		return -EINVAL;
9057692c94SEric Anholt 
9157692c94SEric Anholt 	/* Note that DRM_V3D_PARAM_V3D_CORE0_IDENT0 is 0, so we need
9257692c94SEric Anholt 	 * to explicitly allow it in the "the register in our
9357692c94SEric Anholt 	 * parameter map" check.
9457692c94SEric Anholt 	 */
9557692c94SEric Anholt 	if (args->param < ARRAY_SIZE(reg_map) &&
9657692c94SEric Anholt 	    (reg_map[args->param] ||
9757692c94SEric Anholt 	     args->param == DRM_V3D_PARAM_V3D_CORE0_IDENT0)) {
9857692c94SEric Anholt 		u32 offset = reg_map[args->param];
9957692c94SEric Anholt 
10057692c94SEric Anholt 		if (args->value != 0)
10157692c94SEric Anholt 			return -EINVAL;
10257692c94SEric Anholt 
10357692c94SEric Anholt 		ret = pm_runtime_get_sync(v3d->dev);
10457692c94SEric Anholt 		if (args->param >= DRM_V3D_PARAM_V3D_CORE0_IDENT0 &&
10557692c94SEric Anholt 		    args->param <= DRM_V3D_PARAM_V3D_CORE0_IDENT2) {
10657692c94SEric Anholt 			args->value = V3D_CORE_READ(0, offset);
10757692c94SEric Anholt 		} else {
10857692c94SEric Anholt 			args->value = V3D_READ(offset);
10957692c94SEric Anholt 		}
11057692c94SEric Anholt 		pm_runtime_mark_last_busy(v3d->dev);
11157692c94SEric Anholt 		pm_runtime_put_autosuspend(v3d->dev);
11257692c94SEric Anholt 		return 0;
11357692c94SEric Anholt 	}
11457692c94SEric Anholt 
11557692c94SEric Anholt 
1161584f16cSEric Anholt 	switch (args->param) {
1171584f16cSEric Anholt 	case DRM_V3D_PARAM_SUPPORTS_TFU:
1181584f16cSEric Anholt 		args->value = 1;
1191584f16cSEric Anholt 		return 0;
1201584f16cSEric Anholt 	default:
12157692c94SEric Anholt 		DRM_DEBUG("Unknown parameter %d\n", args->param);
12257692c94SEric Anholt 		return -EINVAL;
12357692c94SEric Anholt 	}
1241584f16cSEric Anholt }
12557692c94SEric Anholt 
12657692c94SEric Anholt static int
12757692c94SEric Anholt v3d_open(struct drm_device *dev, struct drm_file *file)
12857692c94SEric Anholt {
12957692c94SEric Anholt 	struct v3d_dev *v3d = to_v3d_dev(dev);
13057692c94SEric Anholt 	struct v3d_file_priv *v3d_priv;
131aa16b6c6SNayan Deshmukh 	struct drm_sched_rq *rq;
13257692c94SEric Anholt 	int i;
13357692c94SEric Anholt 
13457692c94SEric Anholt 	v3d_priv = kzalloc(sizeof(*v3d_priv), GFP_KERNEL);
13557692c94SEric Anholt 	if (!v3d_priv)
13657692c94SEric Anholt 		return -ENOMEM;
13757692c94SEric Anholt 
13857692c94SEric Anholt 	v3d_priv->v3d = v3d;
13957692c94SEric Anholt 
14057692c94SEric Anholt 	for (i = 0; i < V3D_MAX_QUEUES; i++) {
141aa16b6c6SNayan Deshmukh 		rq = &v3d->queue[i].sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
142aa16b6c6SNayan Deshmukh 		drm_sched_entity_init(&v3d_priv->sched_entity[i], &rq, 1, NULL);
14357692c94SEric Anholt 	}
14457692c94SEric Anholt 
14557692c94SEric Anholt 	file->driver_priv = v3d_priv;
14657692c94SEric Anholt 
14757692c94SEric Anholt 	return 0;
14857692c94SEric Anholt }
14957692c94SEric Anholt 
15057692c94SEric Anholt static void
15157692c94SEric Anholt v3d_postclose(struct drm_device *dev, struct drm_file *file)
15257692c94SEric Anholt {
15357692c94SEric Anholt 	struct v3d_file_priv *v3d_priv = file->driver_priv;
15457692c94SEric Anholt 	enum v3d_queue q;
15557692c94SEric Anholt 
15657692c94SEric Anholt 	for (q = 0; q < V3D_MAX_QUEUES; q++) {
157cdc50176SNayan Deshmukh 		drm_sched_entity_destroy(&v3d_priv->sched_entity[q]);
15857692c94SEric Anholt 	}
15957692c94SEric Anholt 
16057692c94SEric Anholt 	kfree(v3d_priv);
16157692c94SEric Anholt }
16257692c94SEric Anholt 
16357692c94SEric Anholt static const struct file_operations v3d_drm_fops = {
16457692c94SEric Anholt 	.owner = THIS_MODULE,
16557692c94SEric Anholt 	.open = drm_open,
16657692c94SEric Anholt 	.release = drm_release,
16757692c94SEric Anholt 	.unlocked_ioctl = drm_ioctl,
16857692c94SEric Anholt 	.mmap = v3d_mmap,
16957692c94SEric Anholt 	.poll = drm_poll,
17057692c94SEric Anholt 	.read = drm_read,
17157692c94SEric Anholt 	.compat_ioctl = drm_compat_ioctl,
17257692c94SEric Anholt 	.llseek = noop_llseek,
17357692c94SEric Anholt };
17457692c94SEric Anholt 
17557692c94SEric Anholt /* DRM_AUTH is required on SUBMIT_CL for now, while we don't have GMP
17657692c94SEric Anholt  * protection between clients.  Note that render nodes would be be
17757692c94SEric Anholt  * able to submit CLs that could access BOs from clients authenticated
1781584f16cSEric Anholt  * with the master node.  The TFU doesn't use the GMP, so it would
1791584f16cSEric Anholt  * need to stay DRM_AUTH until we do buffer size/offset validation.
18057692c94SEric Anholt  */
18157692c94SEric Anholt static const struct drm_ioctl_desc v3d_drm_ioctls[] = {
18257692c94SEric Anholt 	DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CL, v3d_submit_cl_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
18357692c94SEric Anholt 	DRM_IOCTL_DEF_DRV(V3D_WAIT_BO, v3d_wait_bo_ioctl, DRM_RENDER_ALLOW),
18457692c94SEric Anholt 	DRM_IOCTL_DEF_DRV(V3D_CREATE_BO, v3d_create_bo_ioctl, DRM_RENDER_ALLOW),
18557692c94SEric Anholt 	DRM_IOCTL_DEF_DRV(V3D_MMAP_BO, v3d_mmap_bo_ioctl, DRM_RENDER_ALLOW),
18657692c94SEric Anholt 	DRM_IOCTL_DEF_DRV(V3D_GET_PARAM, v3d_get_param_ioctl, DRM_RENDER_ALLOW),
18757692c94SEric Anholt 	DRM_IOCTL_DEF_DRV(V3D_GET_BO_OFFSET, v3d_get_bo_offset_ioctl, DRM_RENDER_ALLOW),
1881584f16cSEric Anholt 	DRM_IOCTL_DEF_DRV(V3D_SUBMIT_TFU, v3d_submit_tfu_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
18957692c94SEric Anholt };
19057692c94SEric Anholt 
19157692c94SEric Anholt static const struct vm_operations_struct v3d_vm_ops = {
19257692c94SEric Anholt 	.fault = v3d_gem_fault,
19357692c94SEric Anholt 	.open = drm_gem_vm_open,
19457692c94SEric Anholt 	.close = drm_gem_vm_close,
19557692c94SEric Anholt };
19657692c94SEric Anholt 
19757692c94SEric Anholt static struct drm_driver v3d_drm_driver = {
19857692c94SEric Anholt 	.driver_features = (DRIVER_GEM |
19957692c94SEric Anholt 			    DRIVER_RENDER |
20057692c94SEric Anholt 			    DRIVER_PRIME |
20157692c94SEric Anholt 			    DRIVER_SYNCOBJ),
20257692c94SEric Anholt 
20357692c94SEric Anholt 	.open = v3d_open,
20457692c94SEric Anholt 	.postclose = v3d_postclose,
20557692c94SEric Anholt 
20657692c94SEric Anholt #if defined(CONFIG_DEBUG_FS)
20757692c94SEric Anholt 	.debugfs_init = v3d_debugfs_init,
20857692c94SEric Anholt #endif
20957692c94SEric Anholt 
21057692c94SEric Anholt 	.gem_free_object_unlocked = v3d_free_object,
21157692c94SEric Anholt 	.gem_vm_ops = &v3d_vm_ops,
21257692c94SEric Anholt 
21357692c94SEric Anholt 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
21457692c94SEric Anholt 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
21557692c94SEric Anholt 	.gem_prime_import = drm_gem_prime_import,
21657692c94SEric Anholt 	.gem_prime_export = drm_gem_prime_export,
21757692c94SEric Anholt 	.gem_prime_get_sg_table	= v3d_prime_get_sg_table,
21857692c94SEric Anholt 	.gem_prime_import_sg_table = v3d_prime_import_sg_table,
21957692c94SEric Anholt 	.gem_prime_mmap = v3d_prime_mmap,
22057692c94SEric Anholt 
22157692c94SEric Anholt 	.ioctls = v3d_drm_ioctls,
22257692c94SEric Anholt 	.num_ioctls = ARRAY_SIZE(v3d_drm_ioctls),
22357692c94SEric Anholt 	.fops = &v3d_drm_fops,
22457692c94SEric Anholt 
22557692c94SEric Anholt 	.name = DRIVER_NAME,
22657692c94SEric Anholt 	.desc = DRIVER_DESC,
22757692c94SEric Anholt 	.date = DRIVER_DATE,
22857692c94SEric Anholt 	.major = DRIVER_MAJOR,
22957692c94SEric Anholt 	.minor = DRIVER_MINOR,
23057692c94SEric Anholt 	.patchlevel = DRIVER_PATCHLEVEL,
23157692c94SEric Anholt };
23257692c94SEric Anholt 
23357692c94SEric Anholt static const struct of_device_id v3d_of_match[] = {
23457692c94SEric Anholt 	{ .compatible = "brcm,7268-v3d" },
23557692c94SEric Anholt 	{ .compatible = "brcm,7278-v3d" },
23657692c94SEric Anholt 	{},
23757692c94SEric Anholt };
23857692c94SEric Anholt MODULE_DEVICE_TABLE(of, v3d_of_match);
23957692c94SEric Anholt 
24057692c94SEric Anholt static int
24157692c94SEric Anholt map_regs(struct v3d_dev *v3d, void __iomem **regs, const char *name)
24257692c94SEric Anholt {
24357692c94SEric Anholt 	struct resource *res =
24457692c94SEric Anholt 		platform_get_resource_byname(v3d->pdev, IORESOURCE_MEM, name);
24557692c94SEric Anholt 
24657692c94SEric Anholt 	*regs = devm_ioremap_resource(v3d->dev, res);
24757692c94SEric Anholt 	return PTR_ERR_OR_ZERO(*regs);
24857692c94SEric Anholt }
24957692c94SEric Anholt 
25057692c94SEric Anholt static int v3d_platform_drm_probe(struct platform_device *pdev)
25157692c94SEric Anholt {
25257692c94SEric Anholt 	struct device *dev = &pdev->dev;
25357692c94SEric Anholt 	struct drm_device *drm;
25457692c94SEric Anholt 	struct v3d_dev *v3d;
25557692c94SEric Anholt 	int ret;
25657692c94SEric Anholt 	u32 ident1;
25757692c94SEric Anholt 
25857692c94SEric Anholt 	dev->coherent_dma_mask = DMA_BIT_MASK(36);
25957692c94SEric Anholt 
26057692c94SEric Anholt 	v3d = kzalloc(sizeof(*v3d), GFP_KERNEL);
26157692c94SEric Anholt 	if (!v3d)
26257692c94SEric Anholt 		return -ENOMEM;
26357692c94SEric Anholt 	v3d->dev = dev;
26457692c94SEric Anholt 	v3d->pdev = pdev;
26557692c94SEric Anholt 	drm = &v3d->drm;
26657692c94SEric Anholt 
26757692c94SEric Anholt 	ret = map_regs(v3d, &v3d->bridge_regs, "bridge");
26857692c94SEric Anholt 	if (ret)
26957692c94SEric Anholt 		goto dev_free;
27057692c94SEric Anholt 
27157692c94SEric Anholt 	ret = map_regs(v3d, &v3d->hub_regs, "hub");
27257692c94SEric Anholt 	if (ret)
27357692c94SEric Anholt 		goto dev_free;
27457692c94SEric Anholt 
27557692c94SEric Anholt 	ret = map_regs(v3d, &v3d->core_regs[0], "core0");
27657692c94SEric Anholt 	if (ret)
27757692c94SEric Anholt 		goto dev_free;
27857692c94SEric Anholt 
27957692c94SEric Anholt 	ident1 = V3D_READ(V3D_HUB_IDENT1);
28057692c94SEric Anholt 	v3d->ver = (V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_TVER) * 10 +
28157692c94SEric Anholt 		    V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_REV));
28257692c94SEric Anholt 	v3d->cores = V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_NCORES);
28357692c94SEric Anholt 	WARN_ON(v3d->cores > 1); /* multicore not yet implemented */
28457692c94SEric Anholt 
28557692c94SEric Anholt 	if (v3d->ver < 41) {
28657692c94SEric Anholt 		ret = map_regs(v3d, &v3d->gca_regs, "gca");
28757692c94SEric Anholt 		if (ret)
28857692c94SEric Anholt 			goto dev_free;
28957692c94SEric Anholt 	}
29057692c94SEric Anholt 
29157692c94SEric Anholt 	v3d->mmu_scratch = dma_alloc_wc(dev, 4096, &v3d->mmu_scratch_paddr,
29257692c94SEric Anholt 					GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
29357692c94SEric Anholt 	if (!v3d->mmu_scratch) {
29457692c94SEric Anholt 		dev_err(dev, "Failed to allocate MMU scratch page\n");
29557692c94SEric Anholt 		ret = -ENOMEM;
29657692c94SEric Anholt 		goto dev_free;
29757692c94SEric Anholt 	}
29857692c94SEric Anholt 
29957692c94SEric Anholt 	pm_runtime_use_autosuspend(dev);
30057692c94SEric Anholt 	pm_runtime_set_autosuspend_delay(dev, 50);
30157692c94SEric Anholt 	pm_runtime_enable(dev);
30257692c94SEric Anholt 
30357692c94SEric Anholt 	ret = drm_dev_init(&v3d->drm, &v3d_drm_driver, dev);
30457692c94SEric Anholt 	if (ret)
30557692c94SEric Anholt 		goto dma_free;
30657692c94SEric Anholt 
30757692c94SEric Anholt 	platform_set_drvdata(pdev, drm);
30857692c94SEric Anholt 	drm->dev_private = v3d;
30957692c94SEric Anholt 
31057692c94SEric Anholt 	ret = v3d_gem_init(drm);
31157692c94SEric Anholt 	if (ret)
31257692c94SEric Anholt 		goto dev_destroy;
31357692c94SEric Anholt 
314*fc227715SEric Anholt 	ret = v3d_irq_init(v3d);
31557692c94SEric Anholt 	if (ret)
31657692c94SEric Anholt 		goto gem_destroy;
31757692c94SEric Anholt 
318*fc227715SEric Anholt 	ret = drm_dev_register(drm, 0);
319*fc227715SEric Anholt 	if (ret)
320*fc227715SEric Anholt 		goto irq_disable;
321*fc227715SEric Anholt 
32257692c94SEric Anholt 	return 0;
32357692c94SEric Anholt 
324*fc227715SEric Anholt irq_disable:
325*fc227715SEric Anholt 	v3d_irq_disable(v3d);
32657692c94SEric Anholt gem_destroy:
32757692c94SEric Anholt 	v3d_gem_destroy(drm);
32857692c94SEric Anholt dev_destroy:
32957692c94SEric Anholt 	drm_dev_put(drm);
33057692c94SEric Anholt dma_free:
33157692c94SEric Anholt 	dma_free_wc(dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
33257692c94SEric Anholt dev_free:
33357692c94SEric Anholt 	kfree(v3d);
33457692c94SEric Anholt 	return ret;
33557692c94SEric Anholt }
33657692c94SEric Anholt 
33757692c94SEric Anholt static int v3d_platform_drm_remove(struct platform_device *pdev)
33857692c94SEric Anholt {
33957692c94SEric Anholt 	struct drm_device *drm = platform_get_drvdata(pdev);
34057692c94SEric Anholt 	struct v3d_dev *v3d = to_v3d_dev(drm);
34157692c94SEric Anholt 
34257692c94SEric Anholt 	drm_dev_unregister(drm);
34357692c94SEric Anholt 
34457692c94SEric Anholt 	v3d_gem_destroy(drm);
34557692c94SEric Anholt 
34657692c94SEric Anholt 	drm_dev_put(drm);
34757692c94SEric Anholt 
34857692c94SEric Anholt 	dma_free_wc(v3d->dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
34957692c94SEric Anholt 
35057692c94SEric Anholt 	return 0;
35157692c94SEric Anholt }
35257692c94SEric Anholt 
35357692c94SEric Anholt static struct platform_driver v3d_platform_driver = {
35457692c94SEric Anholt 	.probe		= v3d_platform_drm_probe,
35557692c94SEric Anholt 	.remove		= v3d_platform_drm_remove,
35657692c94SEric Anholt 	.driver		= {
35757692c94SEric Anholt 		.name	= "v3d",
35857692c94SEric Anholt 		.of_match_table = v3d_of_match,
35957692c94SEric Anholt 	},
36057692c94SEric Anholt };
36157692c94SEric Anholt 
36257692c94SEric Anholt static int __init v3d_drm_register(void)
36357692c94SEric Anholt {
36457692c94SEric Anholt 	return platform_driver_register(&v3d_platform_driver);
36557692c94SEric Anholt }
36657692c94SEric Anholt 
36757692c94SEric Anholt static void __exit v3d_drm_unregister(void)
36857692c94SEric Anholt {
36957692c94SEric Anholt 	platform_driver_unregister(&v3d_platform_driver);
37057692c94SEric Anholt }
37157692c94SEric Anholt 
37257692c94SEric Anholt module_init(v3d_drm_register);
37357692c94SEric Anholt module_exit(v3d_drm_unregister);
37457692c94SEric Anholt 
37557692c94SEric Anholt MODULE_ALIAS("platform:v3d-drm");
37657692c94SEric Anholt MODULE_DESCRIPTION("Broadcom V3D DRM Driver");
37757692c94SEric Anholt MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
37857692c94SEric Anholt MODULE_LICENSE("GPL v2");
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