1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2b961c48bSJyri Sarha /* 3b961c48bSJyri Sarha * Copyright (C) 2015 Texas Instruments 4b961c48bSJyri Sarha * Author: Jyri Sarha <jsarha@ti.com> 5b961c48bSJyri Sarha */ 6b961c48bSJyri Sarha 7b961c48bSJyri Sarha #include <drm/drm_atomic.h> 8b961c48bSJyri Sarha #include <drm/drm_plane_helper.h> 9b961c48bSJyri Sarha #include <drm/drm_atomic_helper.h> 10fcb57664SSam Ravnborg #include <drm/drm_fourcc.h> 11b961c48bSJyri Sarha 12b961c48bSJyri Sarha #include "tilcdc_drv.h" 13b961c48bSJyri Sarha 14fba3baa8SNishka Dasgupta static const struct drm_plane_funcs tilcdc_plane_funcs = { 15b961c48bSJyri Sarha .update_plane = drm_atomic_helper_update_plane, 16b961c48bSJyri Sarha .disable_plane = drm_atomic_helper_disable_plane, 17b961c48bSJyri Sarha .destroy = drm_plane_cleanup, 18b961c48bSJyri Sarha .reset = drm_atomic_helper_plane_reset, 19b961c48bSJyri Sarha .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 20b961c48bSJyri Sarha .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 21b961c48bSJyri Sarha }; 22b961c48bSJyri Sarha 23b961c48bSJyri Sarha static int tilcdc_plane_atomic_check(struct drm_plane *plane, 247c11b99aSMaxime Ripard struct drm_atomic_state *state) 25b961c48bSJyri Sarha { 267c11b99aSMaxime Ripard struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, 277c11b99aSMaxime Ripard plane); 28b961c48bSJyri Sarha struct drm_crtc_state *crtc_state; 29b961c48bSJyri Sarha struct drm_plane_state *old_state = plane->state; 3059f11a43SLaurent Pinchart unsigned int pitch; 31b961c48bSJyri Sarha 32ba5c1649SMaxime Ripard if (!new_state->crtc) 33b961c48bSJyri Sarha return 0; 34b961c48bSJyri Sarha 35ba5c1649SMaxime Ripard if (WARN_ON(!new_state->fb)) 36b961c48bSJyri Sarha return -EINVAL; 37b961c48bSJyri Sarha 38ba5c1649SMaxime Ripard if (new_state->crtc_x || new_state->crtc_y) { 39b961c48bSJyri Sarha dev_err(plane->dev->dev, "%s: crtc position must be zero.", 40b961c48bSJyri Sarha __func__); 41b961c48bSJyri Sarha return -EINVAL; 42b961c48bSJyri Sarha } 43b961c48bSJyri Sarha 44*dec92020SMaxime Ripard crtc_state = drm_atomic_get_existing_crtc_state(state, 45ba5c1649SMaxime Ripard new_state->crtc); 46b961c48bSJyri Sarha /* we should have a crtc state if the plane is attached to a crtc */ 47b961c48bSJyri Sarha if (WARN_ON(!crtc_state)) 48b961c48bSJyri Sarha return 0; 49b961c48bSJyri Sarha 50ba5c1649SMaxime Ripard if (crtc_state->mode.hdisplay != new_state->crtc_w || 51ba5c1649SMaxime Ripard crtc_state->mode.vdisplay != new_state->crtc_h) { 52b961c48bSJyri Sarha dev_err(plane->dev->dev, 53b961c48bSJyri Sarha "%s: Size must match mode (%dx%d == %dx%d)", __func__, 54b961c48bSJyri Sarha crtc_state->mode.hdisplay, crtc_state->mode.vdisplay, 55ba5c1649SMaxime Ripard new_state->crtc_w, new_state->crtc_h); 56b961c48bSJyri Sarha return -EINVAL; 57b961c48bSJyri Sarha } 58b961c48bSJyri Sarha 5959f11a43SLaurent Pinchart pitch = crtc_state->mode.hdisplay * 60ba5c1649SMaxime Ripard new_state->fb->format->cpp[0]; 61ba5c1649SMaxime Ripard if (new_state->fb->pitches[0] != pitch) { 62b961c48bSJyri Sarha dev_err(plane->dev->dev, 63b961c48bSJyri Sarha "Invalid pitch: fb and crtc widths must be the same"); 64b961c48bSJyri Sarha return -EINVAL; 65b961c48bSJyri Sarha } 66b961c48bSJyri Sarha 67ba5c1649SMaxime Ripard if (old_state->fb && new_state->fb->format != old_state->fb->format) { 68b961c48bSJyri Sarha dev_dbg(plane->dev->dev, 69b961c48bSJyri Sarha "%s(): pixel format change requires mode_change\n", 70b961c48bSJyri Sarha __func__); 71b961c48bSJyri Sarha crtc_state->mode_changed = true; 72b961c48bSJyri Sarha } 73b961c48bSJyri Sarha 74b961c48bSJyri Sarha return 0; 75b961c48bSJyri Sarha } 76b961c48bSJyri Sarha 77b961c48bSJyri Sarha static void tilcdc_plane_atomic_update(struct drm_plane *plane, 78b961c48bSJyri Sarha struct drm_plane_state *old_state) 79b961c48bSJyri Sarha { 80b961c48bSJyri Sarha struct drm_plane_state *state = plane->state; 81b961c48bSJyri Sarha 82b961c48bSJyri Sarha if (!state->crtc) 83b961c48bSJyri Sarha return; 84b961c48bSJyri Sarha 85b961c48bSJyri Sarha if (WARN_ON(!state->fb || !state->crtc->state)) 86b961c48bSJyri Sarha return; 87b961c48bSJyri Sarha 88cb345decSDaniel Vetter if (tilcdc_crtc_update_fb(state->crtc, 89b961c48bSJyri Sarha state->fb, 90cb345decSDaniel Vetter state->crtc->state->event) == 0) { 91cb345decSDaniel Vetter state->crtc->state->event = NULL; 92cb345decSDaniel Vetter } 93b961c48bSJyri Sarha } 94b961c48bSJyri Sarha 95b961c48bSJyri Sarha static const struct drm_plane_helper_funcs plane_helper_funcs = { 96b961c48bSJyri Sarha .atomic_check = tilcdc_plane_atomic_check, 97b961c48bSJyri Sarha .atomic_update = tilcdc_plane_atomic_update, 98b961c48bSJyri Sarha }; 99b961c48bSJyri Sarha 100b961c48bSJyri Sarha int tilcdc_plane_init(struct drm_device *dev, 101b961c48bSJyri Sarha struct drm_plane *plane) 102b961c48bSJyri Sarha { 103bcc5a6f5SJyri Sarha struct tilcdc_drm_private *priv = dev->dev_private; 104b961c48bSJyri Sarha int ret; 105b961c48bSJyri Sarha 106b961c48bSJyri Sarha ret = drm_plane_init(dev, plane, 1, 107b961c48bSJyri Sarha &tilcdc_plane_funcs, 108bcc5a6f5SJyri Sarha priv->pixelformats, 109bcc5a6f5SJyri Sarha priv->num_pixelformats, 110b961c48bSJyri Sarha true); 111b961c48bSJyri Sarha if (ret) { 112b961c48bSJyri Sarha dev_err(dev->dev, "Failed to initialize plane: %d\n", ret); 113b961c48bSJyri Sarha return ret; 114b961c48bSJyri Sarha } 115b961c48bSJyri Sarha 116b961c48bSJyri Sarha drm_plane_helper_add(plane, &plane_helper_funcs); 117b961c48bSJyri Sarha 118b961c48bSJyri Sarha return 0; 119b961c48bSJyri Sarha } 120