xref: /openbmc/linux/drivers/gpu/drm/tilcdc/tilcdc_plane.c (revision caab277b1de0a22b675c4c95fc7b285ec2eb5bf5)
1*caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2b961c48bSJyri Sarha /*
3b961c48bSJyri Sarha  * Copyright (C) 2015 Texas Instruments
4b961c48bSJyri Sarha  * Author: Jyri Sarha <jsarha@ti.com>
5b961c48bSJyri Sarha  */
6b961c48bSJyri Sarha 
7b961c48bSJyri Sarha #include <drm/drmP.h>
8b961c48bSJyri Sarha 
9b961c48bSJyri Sarha #include <drm/drm_atomic.h>
10b961c48bSJyri Sarha #include <drm/drm_plane_helper.h>
11b961c48bSJyri Sarha #include <drm/drm_atomic_helper.h>
12b961c48bSJyri Sarha #include <uapi/drm/drm_fourcc.h>
13b961c48bSJyri Sarha 
14b961c48bSJyri Sarha #include "tilcdc_drv.h"
15b961c48bSJyri Sarha 
16b961c48bSJyri Sarha static struct drm_plane_funcs tilcdc_plane_funcs = {
17b961c48bSJyri Sarha 	.update_plane	= drm_atomic_helper_update_plane,
18b961c48bSJyri Sarha 	.disable_plane	= drm_atomic_helper_disable_plane,
19b961c48bSJyri Sarha 	.destroy	= drm_plane_cleanup,
20b961c48bSJyri Sarha 	.reset		= drm_atomic_helper_plane_reset,
21b961c48bSJyri Sarha 	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
22b961c48bSJyri Sarha 	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
23b961c48bSJyri Sarha };
24b961c48bSJyri Sarha 
25b961c48bSJyri Sarha static int tilcdc_plane_atomic_check(struct drm_plane *plane,
26b961c48bSJyri Sarha 				     struct drm_plane_state *state)
27b961c48bSJyri Sarha {
28b961c48bSJyri Sarha 	struct drm_crtc_state *crtc_state;
29b961c48bSJyri Sarha 	struct drm_plane_state *old_state = plane->state;
3059f11a43SLaurent Pinchart 	unsigned int pitch;
31b961c48bSJyri Sarha 
32b961c48bSJyri Sarha 	if (!state->crtc)
33b961c48bSJyri Sarha 		return 0;
34b961c48bSJyri Sarha 
35b961c48bSJyri Sarha 	if (WARN_ON(!state->fb))
36b961c48bSJyri Sarha 		return -EINVAL;
37b961c48bSJyri Sarha 
38b961c48bSJyri Sarha 	if (state->crtc_x || state->crtc_y) {
39b961c48bSJyri Sarha 		dev_err(plane->dev->dev, "%s: crtc position must be zero.",
40b961c48bSJyri Sarha 			__func__);
41b961c48bSJyri Sarha 		return -EINVAL;
42b961c48bSJyri Sarha 	}
43b961c48bSJyri Sarha 
44b961c48bSJyri Sarha 	crtc_state = drm_atomic_get_existing_crtc_state(state->state,
45b961c48bSJyri Sarha 							state->crtc);
46b961c48bSJyri Sarha 	/* we should have a crtc state if the plane is attached to a crtc */
47b961c48bSJyri Sarha 	if (WARN_ON(!crtc_state))
48b961c48bSJyri Sarha 		return 0;
49b961c48bSJyri Sarha 
50b961c48bSJyri Sarha 	if (crtc_state->mode.hdisplay != state->crtc_w ||
51b961c48bSJyri Sarha 	    crtc_state->mode.vdisplay != state->crtc_h) {
52b961c48bSJyri Sarha 		dev_err(plane->dev->dev,
53b961c48bSJyri Sarha 			"%s: Size must match mode (%dx%d == %dx%d)", __func__,
54b961c48bSJyri Sarha 			crtc_state->mode.hdisplay, crtc_state->mode.vdisplay,
55b961c48bSJyri Sarha 			state->crtc_w, state->crtc_h);
56b961c48bSJyri Sarha 		return -EINVAL;
57b961c48bSJyri Sarha 	}
58b961c48bSJyri Sarha 
5959f11a43SLaurent Pinchart 	pitch = crtc_state->mode.hdisplay *
60353c8598SVille Syrjälä 		state->fb->format->cpp[0];
6159f11a43SLaurent Pinchart 	if (state->fb->pitches[0] != pitch) {
62b961c48bSJyri Sarha 		dev_err(plane->dev->dev,
63b961c48bSJyri Sarha 			"Invalid pitch: fb and crtc widths must be the same");
64b961c48bSJyri Sarha 		return -EINVAL;
65b961c48bSJyri Sarha 	}
66b961c48bSJyri Sarha 
67b961c48bSJyri Sarha 	if (state->fb && old_state->fb &&
68dbd4d576SVille Syrjälä 	    state->fb->format != old_state->fb->format) {
69b961c48bSJyri Sarha 		dev_dbg(plane->dev->dev,
70b961c48bSJyri Sarha 			"%s(): pixel format change requires mode_change\n",
71b961c48bSJyri Sarha 			__func__);
72b961c48bSJyri Sarha 		crtc_state->mode_changed = true;
73b961c48bSJyri Sarha 	}
74b961c48bSJyri Sarha 
75b961c48bSJyri Sarha 	return 0;
76b961c48bSJyri Sarha }
77b961c48bSJyri Sarha 
78b961c48bSJyri Sarha static void tilcdc_plane_atomic_update(struct drm_plane *plane,
79b961c48bSJyri Sarha 				       struct drm_plane_state *old_state)
80b961c48bSJyri Sarha {
81b961c48bSJyri Sarha 	struct drm_plane_state *state = plane->state;
82b961c48bSJyri Sarha 
83b961c48bSJyri Sarha 	if (!state->crtc)
84b961c48bSJyri Sarha 		return;
85b961c48bSJyri Sarha 
86b961c48bSJyri Sarha 	if (WARN_ON(!state->fb || !state->crtc->state))
87b961c48bSJyri Sarha 		return;
88b961c48bSJyri Sarha 
89e0e344e6SJyri Sarha 	tilcdc_crtc_update_fb(state->crtc,
90b961c48bSJyri Sarha 			      state->fb,
91e0e344e6SJyri Sarha 			      state->crtc->state->event);
92b961c48bSJyri Sarha }
93b961c48bSJyri Sarha 
94b961c48bSJyri Sarha static const struct drm_plane_helper_funcs plane_helper_funcs = {
95b961c48bSJyri Sarha 	.atomic_check = tilcdc_plane_atomic_check,
96b961c48bSJyri Sarha 	.atomic_update = tilcdc_plane_atomic_update,
97b961c48bSJyri Sarha };
98b961c48bSJyri Sarha 
99b961c48bSJyri Sarha int tilcdc_plane_init(struct drm_device *dev,
100b961c48bSJyri Sarha 		      struct drm_plane *plane)
101b961c48bSJyri Sarha {
102bcc5a6f5SJyri Sarha 	struct tilcdc_drm_private *priv = dev->dev_private;
103b961c48bSJyri Sarha 	int ret;
104b961c48bSJyri Sarha 
105b961c48bSJyri Sarha 	ret = drm_plane_init(dev, plane, 1,
106b961c48bSJyri Sarha 			     &tilcdc_plane_funcs,
107bcc5a6f5SJyri Sarha 			     priv->pixelformats,
108bcc5a6f5SJyri Sarha 			     priv->num_pixelformats,
109b961c48bSJyri Sarha 			     true);
110b961c48bSJyri Sarha 	if (ret) {
111b961c48bSJyri Sarha 		dev_err(dev->dev, "Failed to initialize plane: %d\n", ret);
112b961c48bSJyri Sarha 		return ret;
113b961c48bSJyri Sarha 	}
114b961c48bSJyri Sarha 
115b961c48bSJyri Sarha 	drm_plane_helper_add(plane, &plane_helper_funcs);
116b961c48bSJyri Sarha 
117b961c48bSJyri Sarha 	return 0;
118b961c48bSJyri Sarha }
119