xref: /openbmc/linux/drivers/gpu/drm/tidss/tidss_crtc.h (revision 4b4193256c8d3bc3a5397b5cd9494c2ad386317d)
132a1795fSJyri Sarha /* SPDX-License-Identifier: GPL-2.0 */
232a1795fSJyri Sarha /*
3*9410113fSAlexander A. Klimov  * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
432a1795fSJyri Sarha  * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
532a1795fSJyri Sarha  */
632a1795fSJyri Sarha 
732a1795fSJyri Sarha #ifndef __TIDSS_CRTC_H__
832a1795fSJyri Sarha #define __TIDSS_CRTC_H__
932a1795fSJyri Sarha 
1032a1795fSJyri Sarha #include <linux/completion.h>
1132a1795fSJyri Sarha #include <linux/wait.h>
1232a1795fSJyri Sarha 
1332a1795fSJyri Sarha #include <drm/drm_crtc.h>
1432a1795fSJyri Sarha 
1532a1795fSJyri Sarha #define to_tidss_crtc(c) container_of((c), struct tidss_crtc, crtc)
1632a1795fSJyri Sarha 
1732a1795fSJyri Sarha struct tidss_device;
1832a1795fSJyri Sarha 
1932a1795fSJyri Sarha struct tidss_crtc {
2032a1795fSJyri Sarha 	struct drm_crtc crtc;
2132a1795fSJyri Sarha 
2232a1795fSJyri Sarha 	u32 hw_videoport;
2332a1795fSJyri Sarha 
2432a1795fSJyri Sarha 	struct drm_pending_vblank_event *event;
2532a1795fSJyri Sarha 
2632a1795fSJyri Sarha 	struct completion framedone_completion;
2732a1795fSJyri Sarha };
2832a1795fSJyri Sarha 
2932a1795fSJyri Sarha #define to_tidss_crtc_state(x) container_of(x, struct tidss_crtc_state, base)
3032a1795fSJyri Sarha 
3132a1795fSJyri Sarha struct tidss_crtc_state {
3232a1795fSJyri Sarha 	/* Must be first. */
3332a1795fSJyri Sarha 	struct drm_crtc_state base;
3432a1795fSJyri Sarha 
35b33b5474SJyri Sarha 	bool plane_pos_changed;
36b33b5474SJyri Sarha 
3732a1795fSJyri Sarha 	u32 bus_format;
3832a1795fSJyri Sarha 	u32 bus_flags;
3932a1795fSJyri Sarha };
4032a1795fSJyri Sarha 
4132a1795fSJyri Sarha void tidss_crtc_vblank_irq(struct drm_crtc *crtc);
4232a1795fSJyri Sarha void tidss_crtc_framedone_irq(struct drm_crtc *crtc);
4332a1795fSJyri Sarha void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus);
4432a1795fSJyri Sarha 
4532a1795fSJyri Sarha struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss,
4632a1795fSJyri Sarha 				     u32 hw_videoport,
4732a1795fSJyri Sarha 				     struct drm_plane *primary);
4832a1795fSJyri Sarha #endif
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