xref: /openbmc/linux/drivers/gpu/drm/tegra/rgb.c (revision 7602fa1d29f5c4e92d6a36e79000a0f55c317a32)
1dee8268fSThierry Reding /*
2dee8268fSThierry Reding  * Copyright (C) 2012 Avionic Design GmbH
3dee8268fSThierry Reding  * Copyright (C) 2012 NVIDIA CORPORATION.  All rights reserved.
4dee8268fSThierry Reding  *
5dee8268fSThierry Reding  * This program is free software; you can redistribute it and/or modify
6dee8268fSThierry Reding  * it under the terms of the GNU General Public License version 2 as
7dee8268fSThierry Reding  * published by the Free Software Foundation.
8dee8268fSThierry Reding  */
9dee8268fSThierry Reding 
10dee8268fSThierry Reding #include <linux/clk.h>
11dee8268fSThierry Reding 
12dee8268fSThierry Reding #include "drm.h"
13dee8268fSThierry Reding #include "dc.h"
14dee8268fSThierry Reding 
15dee8268fSThierry Reding struct tegra_rgb {
16dee8268fSThierry Reding 	struct tegra_output output;
17*7602fa1dSThierry Reding 	struct tegra_dc *dc;
18*7602fa1dSThierry Reding 
19dee8268fSThierry Reding 	struct clk *clk_parent;
20dee8268fSThierry Reding 	struct clk *clk;
21dee8268fSThierry Reding };
22dee8268fSThierry Reding 
23dee8268fSThierry Reding static inline struct tegra_rgb *to_rgb(struct tegra_output *output)
24dee8268fSThierry Reding {
25dee8268fSThierry Reding 	return container_of(output, struct tegra_rgb, output);
26dee8268fSThierry Reding }
27dee8268fSThierry Reding 
28dee8268fSThierry Reding struct reg_entry {
29dee8268fSThierry Reding 	unsigned long offset;
30dee8268fSThierry Reding 	unsigned long value;
31dee8268fSThierry Reding };
32dee8268fSThierry Reding 
33dee8268fSThierry Reding static const struct reg_entry rgb_enable[] = {
34dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_ENABLE(0),   0x00000000 },
35dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_ENABLE(1),   0x00000000 },
36dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_ENABLE(2),   0x00000000 },
37dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_ENABLE(3),   0x00000000 },
38dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_POLARITY(0), 0x00000000 },
39dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_POLARITY(1), 0x01000000 },
40dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_POLARITY(2), 0x00000000 },
41dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_POLARITY(3), 0x00000000 },
42dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_DATA(0),     0x00000000 },
43dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_DATA(1),     0x00000000 },
44dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_DATA(2),     0x00000000 },
45dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_DATA(3),     0x00000000 },
46dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(0),   0x00000000 },
47dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(1),   0x00000000 },
48dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(2),   0x00000000 },
49dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(3),   0x00000000 },
50dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(4),   0x00210222 },
51dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(5),   0x00002200 },
52dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(6),   0x00020000 },
53dee8268fSThierry Reding };
54dee8268fSThierry Reding 
55dee8268fSThierry Reding static const struct reg_entry rgb_disable[] = {
56dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(6),   0x00000000 },
57dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(5),   0x00000000 },
58dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(4),   0x00000000 },
59dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(3),   0x00000000 },
60dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(2),   0x00000000 },
61dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(1),   0x00000000 },
62dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_SELECT(0),   0x00000000 },
63dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_DATA(3),     0xaaaaaaaa },
64dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_DATA(2),     0xaaaaaaaa },
65dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_DATA(1),     0xaaaaaaaa },
66dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_DATA(0),     0xaaaaaaaa },
67dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_POLARITY(3), 0x00000000 },
68dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_POLARITY(2), 0x00000000 },
69dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_POLARITY(1), 0x00000000 },
70dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_POLARITY(0), 0x00000000 },
71dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_ENABLE(3),   0x55555555 },
72dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_ENABLE(2),   0x55555555 },
73dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_ENABLE(1),   0x55150005 },
74dee8268fSThierry Reding 	{ DC_COM_PIN_OUTPUT_ENABLE(0),   0x55555555 },
75dee8268fSThierry Reding };
76dee8268fSThierry Reding 
77dee8268fSThierry Reding static void tegra_dc_write_regs(struct tegra_dc *dc,
78dee8268fSThierry Reding 				const struct reg_entry *table,
79dee8268fSThierry Reding 				unsigned int num)
80dee8268fSThierry Reding {
81dee8268fSThierry Reding 	unsigned int i;
82dee8268fSThierry Reding 
83dee8268fSThierry Reding 	for (i = 0; i < num; i++)
84dee8268fSThierry Reding 		tegra_dc_writel(dc, table[i].value, table[i].offset);
85dee8268fSThierry Reding }
86dee8268fSThierry Reding 
87dee8268fSThierry Reding static int tegra_output_rgb_enable(struct tegra_output *output)
88dee8268fSThierry Reding {
89*7602fa1dSThierry Reding 	struct tegra_rgb *rgb = to_rgb(output);
90dee8268fSThierry Reding 
91*7602fa1dSThierry Reding 	tegra_dc_write_regs(rgb->dc, rgb_enable, ARRAY_SIZE(rgb_enable));
92dee8268fSThierry Reding 
93dee8268fSThierry Reding 	return 0;
94dee8268fSThierry Reding }
95dee8268fSThierry Reding 
96dee8268fSThierry Reding static int tegra_output_rgb_disable(struct tegra_output *output)
97dee8268fSThierry Reding {
98*7602fa1dSThierry Reding 	struct tegra_rgb *rgb = to_rgb(output);
99dee8268fSThierry Reding 
100*7602fa1dSThierry Reding 	tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable));
101dee8268fSThierry Reding 
102dee8268fSThierry Reding 	return 0;
103dee8268fSThierry Reding }
104dee8268fSThierry Reding 
105dee8268fSThierry Reding static int tegra_output_rgb_setup_clock(struct tegra_output *output,
106dee8268fSThierry Reding 					struct clk *clk, unsigned long pclk)
107dee8268fSThierry Reding {
108dee8268fSThierry Reding 	struct tegra_rgb *rgb = to_rgb(output);
109dee8268fSThierry Reding 
110dee8268fSThierry Reding 	return clk_set_parent(clk, rgb->clk_parent);
111dee8268fSThierry Reding }
112dee8268fSThierry Reding 
113dee8268fSThierry Reding static int tegra_output_rgb_check_mode(struct tegra_output *output,
114dee8268fSThierry Reding 				       struct drm_display_mode *mode,
115dee8268fSThierry Reding 				       enum drm_mode_status *status)
116dee8268fSThierry Reding {
117dee8268fSThierry Reding 	/*
118dee8268fSThierry Reding 	 * FIXME: For now, always assume that the mode is okay. There are
119dee8268fSThierry Reding 	 * unresolved issues with clk_round_rate(), which doesn't always
120dee8268fSThierry Reding 	 * reliably report whether a frequency can be set or not.
121dee8268fSThierry Reding 	 */
122dee8268fSThierry Reding 
123dee8268fSThierry Reding 	*status = MODE_OK;
124dee8268fSThierry Reding 
125dee8268fSThierry Reding 	return 0;
126dee8268fSThierry Reding }
127dee8268fSThierry Reding 
128dee8268fSThierry Reding static const struct tegra_output_ops rgb_ops = {
129dee8268fSThierry Reding 	.enable = tegra_output_rgb_enable,
130dee8268fSThierry Reding 	.disable = tegra_output_rgb_disable,
131dee8268fSThierry Reding 	.setup_clock = tegra_output_rgb_setup_clock,
132dee8268fSThierry Reding 	.check_mode = tegra_output_rgb_check_mode,
133dee8268fSThierry Reding };
134dee8268fSThierry Reding 
135dee8268fSThierry Reding int tegra_dc_rgb_probe(struct tegra_dc *dc)
136dee8268fSThierry Reding {
137dee8268fSThierry Reding 	struct device_node *np;
138dee8268fSThierry Reding 	struct tegra_rgb *rgb;
139dee8268fSThierry Reding 	int err;
140dee8268fSThierry Reding 
141dee8268fSThierry Reding 	np = of_get_child_by_name(dc->dev->of_node, "rgb");
142dee8268fSThierry Reding 	if (!np || !of_device_is_available(np))
143dee8268fSThierry Reding 		return -ENODEV;
144dee8268fSThierry Reding 
145dee8268fSThierry Reding 	rgb = devm_kzalloc(dc->dev, sizeof(*rgb), GFP_KERNEL);
146dee8268fSThierry Reding 	if (!rgb)
147dee8268fSThierry Reding 		return -ENOMEM;
148dee8268fSThierry Reding 
149dee8268fSThierry Reding 	rgb->output.dev = dc->dev;
150dee8268fSThierry Reding 	rgb->output.of_node = np;
151*7602fa1dSThierry Reding 	rgb->dc = dc;
152dee8268fSThierry Reding 
15359d29c0eSThierry Reding 	err = tegra_output_probe(&rgb->output);
154dee8268fSThierry Reding 	if (err < 0)
155dee8268fSThierry Reding 		return err;
156dee8268fSThierry Reding 
157dee8268fSThierry Reding 	rgb->clk = devm_clk_get(dc->dev, NULL);
158dee8268fSThierry Reding 	if (IS_ERR(rgb->clk)) {
159dee8268fSThierry Reding 		dev_err(dc->dev, "failed to get clock\n");
160dee8268fSThierry Reding 		return PTR_ERR(rgb->clk);
161dee8268fSThierry Reding 	}
162dee8268fSThierry Reding 
163dee8268fSThierry Reding 	rgb->clk_parent = devm_clk_get(dc->dev, "parent");
164dee8268fSThierry Reding 	if (IS_ERR(rgb->clk_parent)) {
165dee8268fSThierry Reding 		dev_err(dc->dev, "failed to get parent clock\n");
166dee8268fSThierry Reding 		return PTR_ERR(rgb->clk_parent);
167dee8268fSThierry Reding 	}
168dee8268fSThierry Reding 
169dee8268fSThierry Reding 	err = clk_set_parent(rgb->clk, rgb->clk_parent);
170dee8268fSThierry Reding 	if (err < 0) {
171dee8268fSThierry Reding 		dev_err(dc->dev, "failed to set parent clock: %d\n", err);
172dee8268fSThierry Reding 		return err;
173dee8268fSThierry Reding 	}
174dee8268fSThierry Reding 
175dee8268fSThierry Reding 	dc->rgb = &rgb->output;
176dee8268fSThierry Reding 
177dee8268fSThierry Reding 	return 0;
178dee8268fSThierry Reding }
179dee8268fSThierry Reding 
18059d29c0eSThierry Reding int tegra_dc_rgb_remove(struct tegra_dc *dc)
18159d29c0eSThierry Reding {
18259d29c0eSThierry Reding 	int err;
18359d29c0eSThierry Reding 
18459d29c0eSThierry Reding 	if (!dc->rgb)
18559d29c0eSThierry Reding 		return 0;
18659d29c0eSThierry Reding 
18759d29c0eSThierry Reding 	err = tegra_output_remove(dc->rgb);
18859d29c0eSThierry Reding 	if (err < 0)
18959d29c0eSThierry Reding 		return err;
19059d29c0eSThierry Reding 
19159d29c0eSThierry Reding 	return 0;
19259d29c0eSThierry Reding }
19359d29c0eSThierry Reding 
194dee8268fSThierry Reding int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc)
195dee8268fSThierry Reding {
196dee8268fSThierry Reding 	struct tegra_rgb *rgb = to_rgb(dc->rgb);
197dee8268fSThierry Reding 	int err;
198dee8268fSThierry Reding 
199dee8268fSThierry Reding 	if (!dc->rgb)
200dee8268fSThierry Reding 		return -ENODEV;
201dee8268fSThierry Reding 
202dee8268fSThierry Reding 	rgb->output.type = TEGRA_OUTPUT_RGB;
203dee8268fSThierry Reding 	rgb->output.ops = &rgb_ops;
204dee8268fSThierry Reding 
205dee8268fSThierry Reding 	err = tegra_output_init(dc->base.dev, &rgb->output);
206dee8268fSThierry Reding 	if (err < 0) {
207dee8268fSThierry Reding 		dev_err(dc->dev, "output setup failed: %d\n", err);
208dee8268fSThierry Reding 		return err;
209dee8268fSThierry Reding 	}
210dee8268fSThierry Reding 
211dee8268fSThierry Reding 	/*
212dee8268fSThierry Reding 	 * By default, outputs can be associated with each display controller.
213dee8268fSThierry Reding 	 * RGB outputs are an exception, so we make sure they can be attached
214dee8268fSThierry Reding 	 * to only their parent display controller.
215dee8268fSThierry Reding 	 */
216dee8268fSThierry Reding 	rgb->output.encoder.possible_crtcs = 1 << dc->pipe;
217dee8268fSThierry Reding 
218dee8268fSThierry Reding 	return 0;
219dee8268fSThierry Reding }
220dee8268fSThierry Reding 
221dee8268fSThierry Reding int tegra_dc_rgb_exit(struct tegra_dc *dc)
222dee8268fSThierry Reding {
223dee8268fSThierry Reding 	if (dc->rgb) {
224dee8268fSThierry Reding 		int err;
225dee8268fSThierry Reding 
226dee8268fSThierry Reding 		err = tegra_output_disable(dc->rgb);
227dee8268fSThierry Reding 		if (err < 0) {
228dee8268fSThierry Reding 			dev_err(dc->dev, "output failed to disable: %d\n", err);
229dee8268fSThierry Reding 			return err;
230dee8268fSThierry Reding 		}
231dee8268fSThierry Reding 
232dee8268fSThierry Reding 		err = tegra_output_exit(dc->rgb);
233dee8268fSThierry Reding 		if (err < 0) {
234dee8268fSThierry Reding 			dev_err(dc->dev, "output cleanup failed: %d\n", err);
235dee8268fSThierry Reding 			return err;
236dee8268fSThierry Reding 		}
237dee8268fSThierry Reding 
238dee8268fSThierry Reding 		dc->rgb = NULL;
239dee8268fSThierry Reding 	}
240dee8268fSThierry Reding 
241dee8268fSThierry Reding 	return 0;
242dee8268fSThierry Reding }
243