1*cdfbff78SBenjamin Gaignard /* 2*cdfbff78SBenjamin Gaignard * Copyright (C) STMicroelectronics SA 2014 3*cdfbff78SBenjamin Gaignard * Authors: Benjamin Gaignard <benjamin.gaignard@st.com> 4*cdfbff78SBenjamin Gaignard * Vincent Abriou <vincent.abriou@st.com> 5*cdfbff78SBenjamin Gaignard * for STMicroelectronics. 6*cdfbff78SBenjamin Gaignard * License terms: GNU General Public License (GPL), version 2 7*cdfbff78SBenjamin Gaignard */ 8*cdfbff78SBenjamin Gaignard 9*cdfbff78SBenjamin Gaignard #include <linux/clk.h> 10*cdfbff78SBenjamin Gaignard #include <linux/component.h> 11*cdfbff78SBenjamin Gaignard #include <linux/module.h> 12*cdfbff78SBenjamin Gaignard #include <linux/of_platform.h> 13*cdfbff78SBenjamin Gaignard #include <linux/platform_device.h> 14*cdfbff78SBenjamin Gaignard #include <linux/reset.h> 15*cdfbff78SBenjamin Gaignard 16*cdfbff78SBenjamin Gaignard #include <drm/drmP.h> 17*cdfbff78SBenjamin Gaignard #include <drm/drm_crtc_helper.h> 18*cdfbff78SBenjamin Gaignard 19*cdfbff78SBenjamin Gaignard /* glue registers */ 20*cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M0 0x000 21*cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M1 0x004 22*cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M2 0x008 23*cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M3 0x00c 24*cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M4 0x010 25*cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M5 0x014 26*cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M6 0x018 27*cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M7 0x01c 28*cdfbff78SBenjamin Gaignard #define TVO_MAIN_IN_VID_FORMAT 0x030 29*cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M0 0x100 30*cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M1 0x104 31*cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M2 0x108 32*cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M3 0x10c 33*cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M4 0x110 34*cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M5 0x114 35*cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M6 0x118 36*cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M7 0x11c 37*cdfbff78SBenjamin Gaignard #define TVO_AUX_IN_VID_FORMAT 0x130 38*cdfbff78SBenjamin Gaignard #define TVO_VIP_HDF 0x400 39*cdfbff78SBenjamin Gaignard #define TVO_HD_SYNC_SEL 0x418 40*cdfbff78SBenjamin Gaignard #define TVO_HD_DAC_CFG_OFF 0x420 41*cdfbff78SBenjamin Gaignard #define TVO_VIP_HDMI 0x500 42*cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_0 0x504 43*cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_1 0x508 44*cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_B_CB 0x50c 45*cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_Y_G 0x510 46*cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_R_CR 0x514 47*cdfbff78SBenjamin Gaignard #define TVO_HDMI_SYNC_SEL 0x518 48*cdfbff78SBenjamin Gaignard #define TVO_HDMI_DFV_OBS 0x540 49*cdfbff78SBenjamin Gaignard 50*cdfbff78SBenjamin Gaignard #define TVO_IN_FMT_SIGNED BIT(0) 51*cdfbff78SBenjamin Gaignard #define TVO_SYNC_EXT BIT(4) 52*cdfbff78SBenjamin Gaignard 53*cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_R_SHIFT 24 54*cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_G_SHIFT 20 55*cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_B_SHIFT 16 56*cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_MASK 0x3 57*cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_Y_G_SEL 0 58*cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CB_B_SEL 1 59*cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CR_R_SEL 2 60*cdfbff78SBenjamin Gaignard 61*cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_SHIFT 8 62*cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_MASK 0x7 63*cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_DISABLED 0 64*cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_EAV_SAV 1 65*cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y 2 66*cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_CB_CR 3 67*cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_PROG_RANGE 4 68*cdfbff78SBenjamin Gaignard 69*cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_SHIFT 4 70*cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_MASK 0x3 71*cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_8BIT_ROUNDED 0 72*cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_10BIT_ROUNDED 1 73*cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_12BIT_ROUNDED 2 74*cdfbff78SBenjamin Gaignard 75*cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MASK 0xf 76*cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MAIN 0x0 77*cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_AUX 0x8 78*cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_FORCE_COLOR 0xf 79*cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASS_MASK 0x1 80*cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASSED 1 81*cdfbff78SBenjamin Gaignard 82*cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_REF 0x00 83*cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_1 0x01 84*cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_2 0x02 85*cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_3 0x03 86*cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_4 0x04 87*cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_5 0x05 88*cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_6 0x06 89*cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_REF 0x10 90*cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_1 0x11 91*cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_2 0x12 92*cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_3 0x13 93*cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_4 0x14 94*cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_5 0x15 95*cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_6 0x16 96*cdfbff78SBenjamin Gaignard 97*cdfbff78SBenjamin Gaignard #define TVO_SYNC_HD_DCS_SHIFT 8 98*cdfbff78SBenjamin Gaignard 99*cdfbff78SBenjamin Gaignard #define ENCODER_MAIN_CRTC_MASK BIT(0) 100*cdfbff78SBenjamin Gaignard 101*cdfbff78SBenjamin Gaignard /* enum listing the supported output data format */ 102*cdfbff78SBenjamin Gaignard enum sti_tvout_video_out_type { 103*cdfbff78SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_RGB, 104*cdfbff78SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_YUV, 105*cdfbff78SBenjamin Gaignard }; 106*cdfbff78SBenjamin Gaignard 107*cdfbff78SBenjamin Gaignard struct sti_tvout { 108*cdfbff78SBenjamin Gaignard struct device *dev; 109*cdfbff78SBenjamin Gaignard struct drm_device *drm_dev; 110*cdfbff78SBenjamin Gaignard void __iomem *regs; 111*cdfbff78SBenjamin Gaignard struct reset_control *reset; 112*cdfbff78SBenjamin Gaignard struct drm_encoder *hdmi; 113*cdfbff78SBenjamin Gaignard struct drm_encoder *hda; 114*cdfbff78SBenjamin Gaignard }; 115*cdfbff78SBenjamin Gaignard 116*cdfbff78SBenjamin Gaignard struct sti_tvout_encoder { 117*cdfbff78SBenjamin Gaignard struct drm_encoder encoder; 118*cdfbff78SBenjamin Gaignard struct sti_tvout *tvout; 119*cdfbff78SBenjamin Gaignard }; 120*cdfbff78SBenjamin Gaignard 121*cdfbff78SBenjamin Gaignard #define to_sti_tvout_encoder(x) \ 122*cdfbff78SBenjamin Gaignard container_of(x, struct sti_tvout_encoder, encoder) 123*cdfbff78SBenjamin Gaignard 124*cdfbff78SBenjamin Gaignard #define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout 125*cdfbff78SBenjamin Gaignard 126*cdfbff78SBenjamin Gaignard /* preformatter conversion matrix */ 127*cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_601[8] = { 128*cdfbff78SBenjamin Gaignard 0xF927082E, 0x04C9FEAB, 0x01D30964, 0xFA95FD3D, 129*cdfbff78SBenjamin Gaignard 0x0000082E, 0x00002000, 0x00002000, 0x00000000 130*cdfbff78SBenjamin Gaignard }; 131*cdfbff78SBenjamin Gaignard 132*cdfbff78SBenjamin Gaignard /* 709 RGB to YCbCr */ 133*cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_709[8] = { 134*cdfbff78SBenjamin Gaignard 0xF891082F, 0x0367FF40, 0x01280B71, 0xF9B1FE20, 135*cdfbff78SBenjamin Gaignard 0x0000082F, 0x00002000, 0x00002000, 0x00000000 136*cdfbff78SBenjamin Gaignard }; 137*cdfbff78SBenjamin Gaignard 138*cdfbff78SBenjamin Gaignard static u32 tvout_read(struct sti_tvout *tvout, int offset) 139*cdfbff78SBenjamin Gaignard { 140*cdfbff78SBenjamin Gaignard return readl(tvout->regs + offset); 141*cdfbff78SBenjamin Gaignard } 142*cdfbff78SBenjamin Gaignard 143*cdfbff78SBenjamin Gaignard static void tvout_write(struct sti_tvout *tvout, u32 val, int offset) 144*cdfbff78SBenjamin Gaignard { 145*cdfbff78SBenjamin Gaignard writel(val, tvout->regs + offset); 146*cdfbff78SBenjamin Gaignard } 147*cdfbff78SBenjamin Gaignard 148*cdfbff78SBenjamin Gaignard /** 149*cdfbff78SBenjamin Gaignard * Set the clipping mode of a VIP 150*cdfbff78SBenjamin Gaignard * 151*cdfbff78SBenjamin Gaignard * @tvout: tvout structure 152*cdfbff78SBenjamin Gaignard * @cr_r: 153*cdfbff78SBenjamin Gaignard * @y_g: 154*cdfbff78SBenjamin Gaignard * @cb_b: 155*cdfbff78SBenjamin Gaignard */ 156*cdfbff78SBenjamin Gaignard static void tvout_vip_set_color_order(struct sti_tvout *tvout, 157*cdfbff78SBenjamin Gaignard u32 cr_r, u32 y_g, u32 cb_b) 158*cdfbff78SBenjamin Gaignard { 159*cdfbff78SBenjamin Gaignard u32 val = tvout_read(tvout, TVO_VIP_HDMI); 160*cdfbff78SBenjamin Gaignard 161*cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT); 162*cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT); 163*cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT); 164*cdfbff78SBenjamin Gaignard val |= cr_r << TVO_VIP_REORDER_R_SHIFT; 165*cdfbff78SBenjamin Gaignard val |= y_g << TVO_VIP_REORDER_G_SHIFT; 166*cdfbff78SBenjamin Gaignard val |= cb_b << TVO_VIP_REORDER_B_SHIFT; 167*cdfbff78SBenjamin Gaignard 168*cdfbff78SBenjamin Gaignard tvout_write(tvout, val, TVO_VIP_HDMI); 169*cdfbff78SBenjamin Gaignard } 170*cdfbff78SBenjamin Gaignard 171*cdfbff78SBenjamin Gaignard /** 172*cdfbff78SBenjamin Gaignard * Set the clipping mode of a VIP 173*cdfbff78SBenjamin Gaignard * 174*cdfbff78SBenjamin Gaignard * @tvout: tvout structure 175*cdfbff78SBenjamin Gaignard * @range: clipping range 176*cdfbff78SBenjamin Gaignard */ 177*cdfbff78SBenjamin Gaignard static void tvout_vip_set_clip_mode(struct sti_tvout *tvout, u32 range) 178*cdfbff78SBenjamin Gaignard { 179*cdfbff78SBenjamin Gaignard u32 val = tvout_read(tvout, TVO_VIP_HDMI); 180*cdfbff78SBenjamin Gaignard 181*cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT); 182*cdfbff78SBenjamin Gaignard val |= range << TVO_VIP_CLIP_SHIFT; 183*cdfbff78SBenjamin Gaignard tvout_write(tvout, val, TVO_VIP_HDMI); 184*cdfbff78SBenjamin Gaignard } 185*cdfbff78SBenjamin Gaignard 186*cdfbff78SBenjamin Gaignard /** 187*cdfbff78SBenjamin Gaignard * Set the rounded value of a VIP 188*cdfbff78SBenjamin Gaignard * 189*cdfbff78SBenjamin Gaignard * @tvout: tvout structure 190*cdfbff78SBenjamin Gaignard * @rnd: rounded val per component 191*cdfbff78SBenjamin Gaignard */ 192*cdfbff78SBenjamin Gaignard static void tvout_vip_set_rnd(struct sti_tvout *tvout, u32 rnd) 193*cdfbff78SBenjamin Gaignard { 194*cdfbff78SBenjamin Gaignard u32 val = tvout_read(tvout, TVO_VIP_HDMI); 195*cdfbff78SBenjamin Gaignard 196*cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT); 197*cdfbff78SBenjamin Gaignard val |= rnd << TVO_VIP_RND_SHIFT; 198*cdfbff78SBenjamin Gaignard tvout_write(tvout, val, TVO_VIP_HDMI); 199*cdfbff78SBenjamin Gaignard } 200*cdfbff78SBenjamin Gaignard 201*cdfbff78SBenjamin Gaignard /** 202*cdfbff78SBenjamin Gaignard * Select the VIP input 203*cdfbff78SBenjamin Gaignard * 204*cdfbff78SBenjamin Gaignard * @tvout: tvout structure 205*cdfbff78SBenjamin Gaignard * @sel_input: selected_input (main/aux + conv) 206*cdfbff78SBenjamin Gaignard */ 207*cdfbff78SBenjamin Gaignard static void tvout_vip_set_sel_input(struct sti_tvout *tvout, 208*cdfbff78SBenjamin Gaignard bool main_path, 209*cdfbff78SBenjamin Gaignard bool sel_input_logic_inverted, 210*cdfbff78SBenjamin Gaignard enum sti_tvout_video_out_type video_out) 211*cdfbff78SBenjamin Gaignard { 212*cdfbff78SBenjamin Gaignard u32 sel_input; 213*cdfbff78SBenjamin Gaignard u32 val = tvout_read(tvout, TVO_VIP_HDMI); 214*cdfbff78SBenjamin Gaignard 215*cdfbff78SBenjamin Gaignard if (main_path) 216*cdfbff78SBenjamin Gaignard sel_input = TVO_VIP_SEL_INPUT_MAIN; 217*cdfbff78SBenjamin Gaignard else 218*cdfbff78SBenjamin Gaignard sel_input = TVO_VIP_SEL_INPUT_AUX; 219*cdfbff78SBenjamin Gaignard 220*cdfbff78SBenjamin Gaignard switch (video_out) { 221*cdfbff78SBenjamin Gaignard case STI_TVOUT_VIDEO_OUT_RGB: 222*cdfbff78SBenjamin Gaignard sel_input |= TVO_VIP_SEL_INPUT_BYPASSED; 223*cdfbff78SBenjamin Gaignard break; 224*cdfbff78SBenjamin Gaignard case STI_TVOUT_VIDEO_OUT_YUV: 225*cdfbff78SBenjamin Gaignard sel_input &= ~TVO_VIP_SEL_INPUT_BYPASSED; 226*cdfbff78SBenjamin Gaignard break; 227*cdfbff78SBenjamin Gaignard } 228*cdfbff78SBenjamin Gaignard 229*cdfbff78SBenjamin Gaignard /* on stih407 chip the sel_input bypass mode logic is inverted */ 230*cdfbff78SBenjamin Gaignard if (sel_input_logic_inverted) 231*cdfbff78SBenjamin Gaignard sel_input = sel_input ^ TVO_VIP_SEL_INPUT_BYPASS_MASK; 232*cdfbff78SBenjamin Gaignard 233*cdfbff78SBenjamin Gaignard val &= ~TVO_VIP_SEL_INPUT_MASK; 234*cdfbff78SBenjamin Gaignard val |= sel_input; 235*cdfbff78SBenjamin Gaignard tvout_write(tvout, val, TVO_VIP_HDMI); 236*cdfbff78SBenjamin Gaignard } 237*cdfbff78SBenjamin Gaignard 238*cdfbff78SBenjamin Gaignard /** 239*cdfbff78SBenjamin Gaignard * Select the input video signed or unsigned 240*cdfbff78SBenjamin Gaignard * 241*cdfbff78SBenjamin Gaignard * @tvout: tvout structure 242*cdfbff78SBenjamin Gaignard * @in_vid_signed: used video input format 243*cdfbff78SBenjamin Gaignard */ 244*cdfbff78SBenjamin Gaignard static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout, u32 in_vid_fmt) 245*cdfbff78SBenjamin Gaignard { 246*cdfbff78SBenjamin Gaignard u32 val = tvout_read(tvout, TVO_VIP_HDMI); 247*cdfbff78SBenjamin Gaignard 248*cdfbff78SBenjamin Gaignard val &= ~TVO_IN_FMT_SIGNED; 249*cdfbff78SBenjamin Gaignard val |= in_vid_fmt; 250*cdfbff78SBenjamin Gaignard tvout_write(tvout, val, TVO_MAIN_IN_VID_FORMAT); 251*cdfbff78SBenjamin Gaignard } 252*cdfbff78SBenjamin Gaignard 253*cdfbff78SBenjamin Gaignard /** 254*cdfbff78SBenjamin Gaignard * Start VIP block for HDMI output 255*cdfbff78SBenjamin Gaignard * 256*cdfbff78SBenjamin Gaignard * @tvout: pointer on tvout structure 257*cdfbff78SBenjamin Gaignard * @main_path: true if main path has to be used in the vip configuration 258*cdfbff78SBenjamin Gaignard * else aux path is used. 259*cdfbff78SBenjamin Gaignard */ 260*cdfbff78SBenjamin Gaignard static void tvout_hdmi_start(struct sti_tvout *tvout, bool main_path) 261*cdfbff78SBenjamin Gaignard { 262*cdfbff78SBenjamin Gaignard struct device_node *node = tvout->dev->of_node; 263*cdfbff78SBenjamin Gaignard bool sel_input_logic_inverted = false; 264*cdfbff78SBenjamin Gaignard 265*cdfbff78SBenjamin Gaignard dev_dbg(tvout->dev, "%s\n", __func__); 266*cdfbff78SBenjamin Gaignard 267*cdfbff78SBenjamin Gaignard if (main_path) { 268*cdfbff78SBenjamin Gaignard DRM_DEBUG_DRIVER("main vip for hdmi\n"); 269*cdfbff78SBenjamin Gaignard /* select the input sync for hdmi = VTG set 1 */ 270*cdfbff78SBenjamin Gaignard tvout_write(tvout, TVO_SYNC_MAIN_VTG_SET_1, TVO_HDMI_SYNC_SEL); 271*cdfbff78SBenjamin Gaignard } else { 272*cdfbff78SBenjamin Gaignard DRM_DEBUG_DRIVER("aux vip for hdmi\n"); 273*cdfbff78SBenjamin Gaignard /* select the input sync for hdmi = VTG set 1 */ 274*cdfbff78SBenjamin Gaignard tvout_write(tvout, TVO_SYNC_AUX_VTG_SET_1, TVO_HDMI_SYNC_SEL); 275*cdfbff78SBenjamin Gaignard } 276*cdfbff78SBenjamin Gaignard 277*cdfbff78SBenjamin Gaignard /* set color channel order */ 278*cdfbff78SBenjamin Gaignard tvout_vip_set_color_order(tvout, 279*cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CR_R_SEL, 280*cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_Y_G_SEL, 281*cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CB_B_SEL); 282*cdfbff78SBenjamin Gaignard 283*cdfbff78SBenjamin Gaignard /* set clipping mode (Limited range RGB/Y) */ 284*cdfbff78SBenjamin Gaignard tvout_vip_set_clip_mode(tvout, TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y); 285*cdfbff78SBenjamin Gaignard 286*cdfbff78SBenjamin Gaignard /* set round mode (rounded to 8-bit per component) */ 287*cdfbff78SBenjamin Gaignard tvout_vip_set_rnd(tvout, TVO_VIP_RND_8BIT_ROUNDED); 288*cdfbff78SBenjamin Gaignard 289*cdfbff78SBenjamin Gaignard if (of_device_is_compatible(node, "st,stih407-tvout")) { 290*cdfbff78SBenjamin Gaignard /* set input video format */ 291*cdfbff78SBenjamin Gaignard tvout_vip_set_in_vid_fmt(tvout->regs + TVO_MAIN_IN_VID_FORMAT, 292*cdfbff78SBenjamin Gaignard TVO_IN_FMT_SIGNED); 293*cdfbff78SBenjamin Gaignard sel_input_logic_inverted = true; 294*cdfbff78SBenjamin Gaignard } 295*cdfbff78SBenjamin Gaignard 296*cdfbff78SBenjamin Gaignard /* input selection */ 297*cdfbff78SBenjamin Gaignard tvout_vip_set_sel_input(tvout, main_path, 298*cdfbff78SBenjamin Gaignard sel_input_logic_inverted, STI_TVOUT_VIDEO_OUT_RGB); 299*cdfbff78SBenjamin Gaignard } 300*cdfbff78SBenjamin Gaignard 301*cdfbff78SBenjamin Gaignard /** 302*cdfbff78SBenjamin Gaignard * Start HDF VIP and HD DAC 303*cdfbff78SBenjamin Gaignard * 304*cdfbff78SBenjamin Gaignard * @tvout: pointer on tvout structure 305*cdfbff78SBenjamin Gaignard * @main_path: true if main path has to be used in the vip configuration 306*cdfbff78SBenjamin Gaignard * else aux path is used. 307*cdfbff78SBenjamin Gaignard */ 308*cdfbff78SBenjamin Gaignard static void tvout_hda_start(struct sti_tvout *tvout, bool main_path) 309*cdfbff78SBenjamin Gaignard { 310*cdfbff78SBenjamin Gaignard struct device_node *node = tvout->dev->of_node; 311*cdfbff78SBenjamin Gaignard bool sel_input_logic_inverted = false; 312*cdfbff78SBenjamin Gaignard 313*cdfbff78SBenjamin Gaignard dev_dbg(tvout->dev, "%s\n", __func__); 314*cdfbff78SBenjamin Gaignard 315*cdfbff78SBenjamin Gaignard if (!main_path) { 316*cdfbff78SBenjamin Gaignard DRM_ERROR("HD Analog on aux not implemented\n"); 317*cdfbff78SBenjamin Gaignard return; 318*cdfbff78SBenjamin Gaignard } 319*cdfbff78SBenjamin Gaignard 320*cdfbff78SBenjamin Gaignard DRM_DEBUG_DRIVER("main vip for HDF\n"); 321*cdfbff78SBenjamin Gaignard 322*cdfbff78SBenjamin Gaignard /* set color channel order */ 323*cdfbff78SBenjamin Gaignard tvout_vip_set_color_order(tvout->regs + TVO_VIP_HDF, 324*cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CR_R_SEL, 325*cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_Y_G_SEL, 326*cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CB_B_SEL); 327*cdfbff78SBenjamin Gaignard 328*cdfbff78SBenjamin Gaignard /* set clipping mode (Limited range RGB/Y) */ 329*cdfbff78SBenjamin Gaignard tvout_vip_set_clip_mode(tvout->regs + TVO_VIP_HDF, 330*cdfbff78SBenjamin Gaignard TVO_VIP_CLIP_LIMITED_RANGE_CB_CR); 331*cdfbff78SBenjamin Gaignard 332*cdfbff78SBenjamin Gaignard /* set round mode (rounded to 10-bit per component) */ 333*cdfbff78SBenjamin Gaignard tvout_vip_set_rnd(tvout->regs + TVO_VIP_HDF, TVO_VIP_RND_10BIT_ROUNDED); 334*cdfbff78SBenjamin Gaignard 335*cdfbff78SBenjamin Gaignard if (of_device_is_compatible(node, "st,stih407-tvout")) { 336*cdfbff78SBenjamin Gaignard /* set input video format */ 337*cdfbff78SBenjamin Gaignard tvout_vip_set_in_vid_fmt(tvout, TVO_IN_FMT_SIGNED); 338*cdfbff78SBenjamin Gaignard sel_input_logic_inverted = true; 339*cdfbff78SBenjamin Gaignard } 340*cdfbff78SBenjamin Gaignard 341*cdfbff78SBenjamin Gaignard /* Input selection */ 342*cdfbff78SBenjamin Gaignard tvout_vip_set_sel_input(tvout->regs + TVO_VIP_HDF, 343*cdfbff78SBenjamin Gaignard main_path, 344*cdfbff78SBenjamin Gaignard sel_input_logic_inverted, 345*cdfbff78SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_YUV); 346*cdfbff78SBenjamin Gaignard 347*cdfbff78SBenjamin Gaignard /* select the input sync for HD analog = VTG set 3 348*cdfbff78SBenjamin Gaignard * and HD DCS = VTG set 2 */ 349*cdfbff78SBenjamin Gaignard tvout_write(tvout, 350*cdfbff78SBenjamin Gaignard (TVO_SYNC_MAIN_VTG_SET_2 << TVO_SYNC_HD_DCS_SHIFT) 351*cdfbff78SBenjamin Gaignard | TVO_SYNC_MAIN_VTG_SET_3, 352*cdfbff78SBenjamin Gaignard TVO_HD_SYNC_SEL); 353*cdfbff78SBenjamin Gaignard 354*cdfbff78SBenjamin Gaignard /* power up HD DAC */ 355*cdfbff78SBenjamin Gaignard tvout_write(tvout, 0, TVO_HD_DAC_CFG_OFF); 356*cdfbff78SBenjamin Gaignard } 357*cdfbff78SBenjamin Gaignard 358*cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_dpms(struct drm_encoder *encoder, int mode) 359*cdfbff78SBenjamin Gaignard { 360*cdfbff78SBenjamin Gaignard } 361*cdfbff78SBenjamin Gaignard 362*cdfbff78SBenjamin Gaignard static bool sti_tvout_encoder_mode_fixup(struct drm_encoder *encoder, 363*cdfbff78SBenjamin Gaignard const struct drm_display_mode *mode, 364*cdfbff78SBenjamin Gaignard struct drm_display_mode *adjusted_mode) 365*cdfbff78SBenjamin Gaignard { 366*cdfbff78SBenjamin Gaignard return true; 367*cdfbff78SBenjamin Gaignard } 368*cdfbff78SBenjamin Gaignard 369*cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder, 370*cdfbff78SBenjamin Gaignard struct drm_display_mode *mode, 371*cdfbff78SBenjamin Gaignard struct drm_display_mode *adjusted_mode) 372*cdfbff78SBenjamin Gaignard { 373*cdfbff78SBenjamin Gaignard } 374*cdfbff78SBenjamin Gaignard 375*cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_prepare(struct drm_encoder *encoder) 376*cdfbff78SBenjamin Gaignard { 377*cdfbff78SBenjamin Gaignard } 378*cdfbff78SBenjamin Gaignard 379*cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_destroy(struct drm_encoder *encoder) 380*cdfbff78SBenjamin Gaignard { 381*cdfbff78SBenjamin Gaignard struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder); 382*cdfbff78SBenjamin Gaignard 383*cdfbff78SBenjamin Gaignard drm_encoder_cleanup(encoder); 384*cdfbff78SBenjamin Gaignard kfree(sti_encoder); 385*cdfbff78SBenjamin Gaignard } 386*cdfbff78SBenjamin Gaignard 387*cdfbff78SBenjamin Gaignard static const struct drm_encoder_funcs sti_tvout_encoder_funcs = { 388*cdfbff78SBenjamin Gaignard .destroy = sti_tvout_encoder_destroy, 389*cdfbff78SBenjamin Gaignard }; 390*cdfbff78SBenjamin Gaignard 391*cdfbff78SBenjamin Gaignard static void sti_hda_encoder_commit(struct drm_encoder *encoder) 392*cdfbff78SBenjamin Gaignard { 393*cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 394*cdfbff78SBenjamin Gaignard 395*cdfbff78SBenjamin Gaignard tvout_hda_start(tvout, true); 396*cdfbff78SBenjamin Gaignard } 397*cdfbff78SBenjamin Gaignard 398*cdfbff78SBenjamin Gaignard static void sti_hda_encoder_disable(struct drm_encoder *encoder) 399*cdfbff78SBenjamin Gaignard { 400*cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 401*cdfbff78SBenjamin Gaignard 402*cdfbff78SBenjamin Gaignard /* reset VIP register */ 403*cdfbff78SBenjamin Gaignard tvout_write(tvout, 0x0, TVO_VIP_HDF); 404*cdfbff78SBenjamin Gaignard 405*cdfbff78SBenjamin Gaignard /* power down HD DAC */ 406*cdfbff78SBenjamin Gaignard tvout_write(tvout, 1, TVO_HD_DAC_CFG_OFF); 407*cdfbff78SBenjamin Gaignard } 408*cdfbff78SBenjamin Gaignard 409*cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = { 410*cdfbff78SBenjamin Gaignard .dpms = sti_tvout_encoder_dpms, 411*cdfbff78SBenjamin Gaignard .mode_fixup = sti_tvout_encoder_mode_fixup, 412*cdfbff78SBenjamin Gaignard .mode_set = sti_tvout_encoder_mode_set, 413*cdfbff78SBenjamin Gaignard .prepare = sti_tvout_encoder_prepare, 414*cdfbff78SBenjamin Gaignard .commit = sti_hda_encoder_commit, 415*cdfbff78SBenjamin Gaignard .disable = sti_hda_encoder_disable, 416*cdfbff78SBenjamin Gaignard }; 417*cdfbff78SBenjamin Gaignard 418*cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev, 419*cdfbff78SBenjamin Gaignard struct sti_tvout *tvout) 420*cdfbff78SBenjamin Gaignard { 421*cdfbff78SBenjamin Gaignard struct sti_tvout_encoder *encoder; 422*cdfbff78SBenjamin Gaignard struct drm_encoder *drm_encoder; 423*cdfbff78SBenjamin Gaignard 424*cdfbff78SBenjamin Gaignard encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL); 425*cdfbff78SBenjamin Gaignard if (!encoder) 426*cdfbff78SBenjamin Gaignard return NULL; 427*cdfbff78SBenjamin Gaignard 428*cdfbff78SBenjamin Gaignard encoder->tvout = tvout; 429*cdfbff78SBenjamin Gaignard 430*cdfbff78SBenjamin Gaignard drm_encoder = (struct drm_encoder *) encoder; 431*cdfbff78SBenjamin Gaignard 432*cdfbff78SBenjamin Gaignard drm_encoder->possible_crtcs = ENCODER_MAIN_CRTC_MASK; 433*cdfbff78SBenjamin Gaignard drm_encoder->possible_clones = 1 << 0; 434*cdfbff78SBenjamin Gaignard 435*cdfbff78SBenjamin Gaignard drm_encoder_init(dev, drm_encoder, 436*cdfbff78SBenjamin Gaignard &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC); 437*cdfbff78SBenjamin Gaignard 438*cdfbff78SBenjamin Gaignard drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs); 439*cdfbff78SBenjamin Gaignard 440*cdfbff78SBenjamin Gaignard return drm_encoder; 441*cdfbff78SBenjamin Gaignard } 442*cdfbff78SBenjamin Gaignard 443*cdfbff78SBenjamin Gaignard static void sti_hdmi_encoder_commit(struct drm_encoder *encoder) 444*cdfbff78SBenjamin Gaignard { 445*cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 446*cdfbff78SBenjamin Gaignard 447*cdfbff78SBenjamin Gaignard tvout_hdmi_start(tvout, true); 448*cdfbff78SBenjamin Gaignard } 449*cdfbff78SBenjamin Gaignard 450*cdfbff78SBenjamin Gaignard static void sti_hdmi_encoder_disable(struct drm_encoder *encoder) 451*cdfbff78SBenjamin Gaignard { 452*cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 453*cdfbff78SBenjamin Gaignard 454*cdfbff78SBenjamin Gaignard /* reset VIP register */ 455*cdfbff78SBenjamin Gaignard tvout_write(tvout, 0x0, TVO_VIP_HDMI); 456*cdfbff78SBenjamin Gaignard } 457*cdfbff78SBenjamin Gaignard 458*cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = { 459*cdfbff78SBenjamin Gaignard .dpms = sti_tvout_encoder_dpms, 460*cdfbff78SBenjamin Gaignard .mode_fixup = sti_tvout_encoder_mode_fixup, 461*cdfbff78SBenjamin Gaignard .mode_set = sti_tvout_encoder_mode_set, 462*cdfbff78SBenjamin Gaignard .prepare = sti_tvout_encoder_prepare, 463*cdfbff78SBenjamin Gaignard .commit = sti_hdmi_encoder_commit, 464*cdfbff78SBenjamin Gaignard .disable = sti_hdmi_encoder_disable, 465*cdfbff78SBenjamin Gaignard }; 466*cdfbff78SBenjamin Gaignard 467*cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev, 468*cdfbff78SBenjamin Gaignard struct sti_tvout *tvout) 469*cdfbff78SBenjamin Gaignard { 470*cdfbff78SBenjamin Gaignard struct sti_tvout_encoder *encoder; 471*cdfbff78SBenjamin Gaignard struct drm_encoder *drm_encoder; 472*cdfbff78SBenjamin Gaignard 473*cdfbff78SBenjamin Gaignard encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL); 474*cdfbff78SBenjamin Gaignard if (!encoder) 475*cdfbff78SBenjamin Gaignard return NULL; 476*cdfbff78SBenjamin Gaignard 477*cdfbff78SBenjamin Gaignard encoder->tvout = tvout; 478*cdfbff78SBenjamin Gaignard 479*cdfbff78SBenjamin Gaignard drm_encoder = (struct drm_encoder *) encoder; 480*cdfbff78SBenjamin Gaignard 481*cdfbff78SBenjamin Gaignard drm_encoder->possible_crtcs = ENCODER_MAIN_CRTC_MASK; 482*cdfbff78SBenjamin Gaignard drm_encoder->possible_clones = 1 << 1; 483*cdfbff78SBenjamin Gaignard 484*cdfbff78SBenjamin Gaignard drm_encoder_init(dev, drm_encoder, 485*cdfbff78SBenjamin Gaignard &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS); 486*cdfbff78SBenjamin Gaignard 487*cdfbff78SBenjamin Gaignard drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs); 488*cdfbff78SBenjamin Gaignard 489*cdfbff78SBenjamin Gaignard return drm_encoder; 490*cdfbff78SBenjamin Gaignard } 491*cdfbff78SBenjamin Gaignard 492*cdfbff78SBenjamin Gaignard static void sti_tvout_create_encoders(struct drm_device *dev, 493*cdfbff78SBenjamin Gaignard struct sti_tvout *tvout) 494*cdfbff78SBenjamin Gaignard { 495*cdfbff78SBenjamin Gaignard tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout); 496*cdfbff78SBenjamin Gaignard tvout->hda = sti_tvout_create_hda_encoder(dev, tvout); 497*cdfbff78SBenjamin Gaignard } 498*cdfbff78SBenjamin Gaignard 499*cdfbff78SBenjamin Gaignard static void sti_tvout_destroy_encoders(struct sti_tvout *tvout) 500*cdfbff78SBenjamin Gaignard { 501*cdfbff78SBenjamin Gaignard if (tvout->hdmi) 502*cdfbff78SBenjamin Gaignard drm_encoder_cleanup(tvout->hdmi); 503*cdfbff78SBenjamin Gaignard tvout->hdmi = NULL; 504*cdfbff78SBenjamin Gaignard 505*cdfbff78SBenjamin Gaignard if (tvout->hda) 506*cdfbff78SBenjamin Gaignard drm_encoder_cleanup(tvout->hda); 507*cdfbff78SBenjamin Gaignard tvout->hda = NULL; 508*cdfbff78SBenjamin Gaignard } 509*cdfbff78SBenjamin Gaignard 510*cdfbff78SBenjamin Gaignard static int sti_tvout_bind(struct device *dev, struct device *master, void *data) 511*cdfbff78SBenjamin Gaignard { 512*cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = dev_get_drvdata(dev); 513*cdfbff78SBenjamin Gaignard struct drm_device *drm_dev = data; 514*cdfbff78SBenjamin Gaignard unsigned int i; 515*cdfbff78SBenjamin Gaignard int ret; 516*cdfbff78SBenjamin Gaignard 517*cdfbff78SBenjamin Gaignard tvout->drm_dev = drm_dev; 518*cdfbff78SBenjamin Gaignard 519*cdfbff78SBenjamin Gaignard /* set preformatter matrix */ 520*cdfbff78SBenjamin Gaignard for (i = 0; i < 8; i++) { 521*cdfbff78SBenjamin Gaignard tvout_write(tvout, rgb_to_ycbcr_601[i], 522*cdfbff78SBenjamin Gaignard TVO_CSC_MAIN_M0 + (i * 4)); 523*cdfbff78SBenjamin Gaignard tvout_write(tvout, rgb_to_ycbcr_601[i], 524*cdfbff78SBenjamin Gaignard TVO_CSC_AUX_M0 + (i * 4)); 525*cdfbff78SBenjamin Gaignard } 526*cdfbff78SBenjamin Gaignard 527*cdfbff78SBenjamin Gaignard sti_tvout_create_encoders(drm_dev, tvout); 528*cdfbff78SBenjamin Gaignard 529*cdfbff78SBenjamin Gaignard ret = component_bind_all(dev, drm_dev); 530*cdfbff78SBenjamin Gaignard if (ret) 531*cdfbff78SBenjamin Gaignard sti_tvout_destroy_encoders(tvout); 532*cdfbff78SBenjamin Gaignard 533*cdfbff78SBenjamin Gaignard return ret; 534*cdfbff78SBenjamin Gaignard } 535*cdfbff78SBenjamin Gaignard 536*cdfbff78SBenjamin Gaignard static void sti_tvout_unbind(struct device *dev, struct device *master, 537*cdfbff78SBenjamin Gaignard void *data) 538*cdfbff78SBenjamin Gaignard { 539*cdfbff78SBenjamin Gaignard /* do nothing */ 540*cdfbff78SBenjamin Gaignard } 541*cdfbff78SBenjamin Gaignard 542*cdfbff78SBenjamin Gaignard static const struct component_ops sti_tvout_ops = { 543*cdfbff78SBenjamin Gaignard .bind = sti_tvout_bind, 544*cdfbff78SBenjamin Gaignard .unbind = sti_tvout_unbind, 545*cdfbff78SBenjamin Gaignard }; 546*cdfbff78SBenjamin Gaignard 547*cdfbff78SBenjamin Gaignard static int compare_of(struct device *dev, void *data) 548*cdfbff78SBenjamin Gaignard { 549*cdfbff78SBenjamin Gaignard return dev->of_node == data; 550*cdfbff78SBenjamin Gaignard } 551*cdfbff78SBenjamin Gaignard 552*cdfbff78SBenjamin Gaignard static int sti_tvout_master_bind(struct device *dev) 553*cdfbff78SBenjamin Gaignard { 554*cdfbff78SBenjamin Gaignard return 0; 555*cdfbff78SBenjamin Gaignard } 556*cdfbff78SBenjamin Gaignard 557*cdfbff78SBenjamin Gaignard static void sti_tvout_master_unbind(struct device *dev) 558*cdfbff78SBenjamin Gaignard { 559*cdfbff78SBenjamin Gaignard /* do nothing */ 560*cdfbff78SBenjamin Gaignard } 561*cdfbff78SBenjamin Gaignard 562*cdfbff78SBenjamin Gaignard static const struct component_master_ops sti_tvout_master_ops = { 563*cdfbff78SBenjamin Gaignard .bind = sti_tvout_master_bind, 564*cdfbff78SBenjamin Gaignard .unbind = sti_tvout_master_unbind, 565*cdfbff78SBenjamin Gaignard }; 566*cdfbff78SBenjamin Gaignard 567*cdfbff78SBenjamin Gaignard static int sti_tvout_probe(struct platform_device *pdev) 568*cdfbff78SBenjamin Gaignard { 569*cdfbff78SBenjamin Gaignard struct device *dev = &pdev->dev; 570*cdfbff78SBenjamin Gaignard struct device_node *node = dev->of_node; 571*cdfbff78SBenjamin Gaignard struct sti_tvout *tvout; 572*cdfbff78SBenjamin Gaignard struct resource *res; 573*cdfbff78SBenjamin Gaignard struct device_node *child_np; 574*cdfbff78SBenjamin Gaignard struct component_match *match = NULL; 575*cdfbff78SBenjamin Gaignard 576*cdfbff78SBenjamin Gaignard DRM_INFO("%s\n", __func__); 577*cdfbff78SBenjamin Gaignard 578*cdfbff78SBenjamin Gaignard if (!node) 579*cdfbff78SBenjamin Gaignard return -ENODEV; 580*cdfbff78SBenjamin Gaignard 581*cdfbff78SBenjamin Gaignard tvout = devm_kzalloc(dev, sizeof(*tvout), GFP_KERNEL); 582*cdfbff78SBenjamin Gaignard if (!tvout) 583*cdfbff78SBenjamin Gaignard return -ENOMEM; 584*cdfbff78SBenjamin Gaignard 585*cdfbff78SBenjamin Gaignard tvout->dev = dev; 586*cdfbff78SBenjamin Gaignard 587*cdfbff78SBenjamin Gaignard /* get Memory ressources */ 588*cdfbff78SBenjamin Gaignard res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tvout-reg"); 589*cdfbff78SBenjamin Gaignard if (!res) { 590*cdfbff78SBenjamin Gaignard DRM_ERROR("Invalid glue resource\n"); 591*cdfbff78SBenjamin Gaignard return -ENOMEM; 592*cdfbff78SBenjamin Gaignard } 593*cdfbff78SBenjamin Gaignard tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); 594*cdfbff78SBenjamin Gaignard if (IS_ERR(tvout->regs)) 595*cdfbff78SBenjamin Gaignard return PTR_ERR(tvout->regs); 596*cdfbff78SBenjamin Gaignard 597*cdfbff78SBenjamin Gaignard /* get reset resources */ 598*cdfbff78SBenjamin Gaignard tvout->reset = devm_reset_control_get(dev, "tvout"); 599*cdfbff78SBenjamin Gaignard /* take tvout out of reset */ 600*cdfbff78SBenjamin Gaignard if (!IS_ERR(tvout->reset)) 601*cdfbff78SBenjamin Gaignard reset_control_deassert(tvout->reset); 602*cdfbff78SBenjamin Gaignard 603*cdfbff78SBenjamin Gaignard platform_set_drvdata(pdev, tvout); 604*cdfbff78SBenjamin Gaignard 605*cdfbff78SBenjamin Gaignard of_platform_populate(node, NULL, NULL, dev); 606*cdfbff78SBenjamin Gaignard 607*cdfbff78SBenjamin Gaignard child_np = of_get_next_available_child(node, NULL); 608*cdfbff78SBenjamin Gaignard 609*cdfbff78SBenjamin Gaignard while (child_np) { 610*cdfbff78SBenjamin Gaignard component_match_add(dev, &match, compare_of, child_np); 611*cdfbff78SBenjamin Gaignard of_node_put(child_np); 612*cdfbff78SBenjamin Gaignard child_np = of_get_next_available_child(node, child_np); 613*cdfbff78SBenjamin Gaignard } 614*cdfbff78SBenjamin Gaignard 615*cdfbff78SBenjamin Gaignard component_master_add_with_match(dev, &sti_tvout_master_ops, match); 616*cdfbff78SBenjamin Gaignard 617*cdfbff78SBenjamin Gaignard return component_add(dev, &sti_tvout_ops); 618*cdfbff78SBenjamin Gaignard } 619*cdfbff78SBenjamin Gaignard 620*cdfbff78SBenjamin Gaignard static int sti_tvout_remove(struct platform_device *pdev) 621*cdfbff78SBenjamin Gaignard { 622*cdfbff78SBenjamin Gaignard component_master_del(&pdev->dev, &sti_tvout_master_ops); 623*cdfbff78SBenjamin Gaignard component_del(&pdev->dev, &sti_tvout_ops); 624*cdfbff78SBenjamin Gaignard return 0; 625*cdfbff78SBenjamin Gaignard } 626*cdfbff78SBenjamin Gaignard 627*cdfbff78SBenjamin Gaignard static struct of_device_id tvout_of_match[] = { 628*cdfbff78SBenjamin Gaignard { .compatible = "st,stih416-tvout", }, 629*cdfbff78SBenjamin Gaignard { .compatible = "st,stih407-tvout", }, 630*cdfbff78SBenjamin Gaignard { /* end node */ } 631*cdfbff78SBenjamin Gaignard }; 632*cdfbff78SBenjamin Gaignard MODULE_DEVICE_TABLE(of, tvout_of_match); 633*cdfbff78SBenjamin Gaignard 634*cdfbff78SBenjamin Gaignard struct platform_driver sti_tvout_driver = { 635*cdfbff78SBenjamin Gaignard .driver = { 636*cdfbff78SBenjamin Gaignard .name = "sti-tvout", 637*cdfbff78SBenjamin Gaignard .owner = THIS_MODULE, 638*cdfbff78SBenjamin Gaignard .of_match_table = tvout_of_match, 639*cdfbff78SBenjamin Gaignard }, 640*cdfbff78SBenjamin Gaignard .probe = sti_tvout_probe, 641*cdfbff78SBenjamin Gaignard .remove = sti_tvout_remove, 642*cdfbff78SBenjamin Gaignard }; 643*cdfbff78SBenjamin Gaignard 644*cdfbff78SBenjamin Gaignard module_platform_driver(sti_tvout_driver); 645*cdfbff78SBenjamin Gaignard 646*cdfbff78SBenjamin Gaignard MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 647*cdfbff78SBenjamin Gaignard MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver"); 648*cdfbff78SBenjamin Gaignard MODULE_LICENSE("GPL"); 649