xref: /openbmc/linux/drivers/gpu/drm/sti/sti_tvout.c (revision 83af0a483ac44594620ecae10a4d708b284972e1)
1cdfbff78SBenjamin Gaignard /*
2cdfbff78SBenjamin Gaignard  * Copyright (C) STMicroelectronics SA 2014
3cdfbff78SBenjamin Gaignard  * Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
4cdfbff78SBenjamin Gaignard  *          Vincent Abriou <vincent.abriou@st.com>
5cdfbff78SBenjamin Gaignard  *          for STMicroelectronics.
6cdfbff78SBenjamin Gaignard  * License terms:  GNU General Public License (GPL), version 2
7cdfbff78SBenjamin Gaignard  */
8cdfbff78SBenjamin Gaignard 
9cdfbff78SBenjamin Gaignard #include <linux/clk.h>
10cdfbff78SBenjamin Gaignard #include <linux/component.h>
11cdfbff78SBenjamin Gaignard #include <linux/module.h>
12cdfbff78SBenjamin Gaignard #include <linux/of_platform.h>
13cdfbff78SBenjamin Gaignard #include <linux/platform_device.h>
14cdfbff78SBenjamin Gaignard #include <linux/reset.h>
150f3e1561SArnd Bergmann #include <linux/seq_file.h>
16cdfbff78SBenjamin Gaignard 
17cdfbff78SBenjamin Gaignard #include <drm/drmP.h>
18cdfbff78SBenjamin Gaignard #include <drm/drm_crtc_helper.h>
19cdfbff78SBenjamin Gaignard 
209e1f05b2SVincent Abriou #include "sti_crtc.h"
21503290ceSVincent Abriou #include "sti_vtg.h"
225e03abc5SBenjamin Gaignard 
23cdfbff78SBenjamin Gaignard /* glue registers */
24cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M0                  0x000
25cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M1                  0x004
26cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M2                  0x008
27cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M3                  0x00c
28cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M4                  0x010
29cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M5                  0x014
30cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M6                  0x018
31cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M7                  0x01c
32cdfbff78SBenjamin Gaignard #define TVO_MAIN_IN_VID_FORMAT           0x030
33cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M0                   0x100
34cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M1                   0x104
35cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M2                   0x108
36cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M3                   0x10c
37cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M4                   0x110
38cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M5                   0x114
39cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M6                   0x118
40cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M7                   0x11c
41cdfbff78SBenjamin Gaignard #define TVO_AUX_IN_VID_FORMAT            0x130
42cdfbff78SBenjamin Gaignard #define TVO_VIP_HDF                      0x400
43cdfbff78SBenjamin Gaignard #define TVO_HD_SYNC_SEL                  0x418
44cdfbff78SBenjamin Gaignard #define TVO_HD_DAC_CFG_OFF               0x420
45cdfbff78SBenjamin Gaignard #define TVO_VIP_HDMI                     0x500
46cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_0           0x504
47cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_1           0x508
48cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_B_CB         0x50c
49cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_Y_G          0x510
50cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_R_CR         0x514
51cdfbff78SBenjamin Gaignard #define TVO_HDMI_SYNC_SEL                0x518
52cdfbff78SBenjamin Gaignard #define TVO_HDMI_DFV_OBS                 0x540
53f32c4c50SBenjamin Gaignard #define TVO_VIP_DVO                      0x600
54f32c4c50SBenjamin Gaignard #define TVO_DVO_SYNC_SEL                 0x618
55f32c4c50SBenjamin Gaignard #define TVO_DVO_CONFIG                   0x620
56cdfbff78SBenjamin Gaignard 
57cdfbff78SBenjamin Gaignard #define TVO_IN_FMT_SIGNED                BIT(0)
58cdfbff78SBenjamin Gaignard #define TVO_SYNC_EXT                     BIT(4)
59cdfbff78SBenjamin Gaignard 
60cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_R_SHIFT          24
61cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_G_SHIFT          20
62cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_B_SHIFT          16
63cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_MASK             0x3
64cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_Y_G_SEL          0
65cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CB_B_SEL         1
66cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CR_R_SEL         2
67cdfbff78SBenjamin Gaignard 
68cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_SHIFT               8
69cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_MASK                0x7
70cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_DISABLED            0
71cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_EAV_SAV             1
72cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y 2
73cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_CB_CR 3
74cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_PROG_RANGE          4
75cdfbff78SBenjamin Gaignard 
76cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_SHIFT                4
77cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_MASK                 0x3
78cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_8BIT_ROUNDED         0
79cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_10BIT_ROUNDED        1
80cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_12BIT_ROUNDED        2
81cdfbff78SBenjamin Gaignard 
82cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MASK           0xf
83cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MAIN           0x0
84cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_AUX            0x8
85cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_FORCE_COLOR    0xf
86cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASS_MASK    0x1
87cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASSED       1
88cdfbff78SBenjamin Gaignard 
89cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_REF        0x00
90cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_REF         0x10
91cdfbff78SBenjamin Gaignard 
92cdfbff78SBenjamin Gaignard #define TVO_SYNC_HD_DCS_SHIFT            8
93cdfbff78SBenjamin Gaignard 
94f32c4c50SBenjamin Gaignard #define TVO_SYNC_DVO_PAD_HSYNC_SHIFT     8
95f32c4c50SBenjamin Gaignard #define TVO_SYNC_DVO_PAD_VSYNC_SHIFT     16
96f32c4c50SBenjamin Gaignard 
975e03abc5SBenjamin Gaignard #define ENCODER_CRTC_MASK                (BIT(0) | BIT(1))
98cdfbff78SBenjamin Gaignard 
9905a142c2SBich Hemon #define TVO_MIN_HD_HEIGHT                720
10005a142c2SBich Hemon 
101cdfbff78SBenjamin Gaignard /* enum listing the supported output data format */
102cdfbff78SBenjamin Gaignard enum sti_tvout_video_out_type {
103cdfbff78SBenjamin Gaignard 	STI_TVOUT_VIDEO_OUT_RGB,
104cdfbff78SBenjamin Gaignard 	STI_TVOUT_VIDEO_OUT_YUV,
105cdfbff78SBenjamin Gaignard };
106cdfbff78SBenjamin Gaignard 
107cdfbff78SBenjamin Gaignard struct sti_tvout {
108cdfbff78SBenjamin Gaignard 	struct device *dev;
109cdfbff78SBenjamin Gaignard 	struct drm_device *drm_dev;
110cdfbff78SBenjamin Gaignard 	void __iomem *regs;
111cdfbff78SBenjamin Gaignard 	struct reset_control *reset;
112cdfbff78SBenjamin Gaignard 	struct drm_encoder *hdmi;
113cdfbff78SBenjamin Gaignard 	struct drm_encoder *hda;
114f32c4c50SBenjamin Gaignard 	struct drm_encoder *dvo;
115*83af0a48SBenjamin Gaignard 	bool debugfs_registered;
116cdfbff78SBenjamin Gaignard };
117cdfbff78SBenjamin Gaignard 
118cdfbff78SBenjamin Gaignard struct sti_tvout_encoder {
119cdfbff78SBenjamin Gaignard 	struct drm_encoder encoder;
120cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout;
121cdfbff78SBenjamin Gaignard };
122cdfbff78SBenjamin Gaignard 
123cdfbff78SBenjamin Gaignard #define to_sti_tvout_encoder(x) \
124cdfbff78SBenjamin Gaignard 	container_of(x, struct sti_tvout_encoder, encoder)
125cdfbff78SBenjamin Gaignard 
126cdfbff78SBenjamin Gaignard #define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout
127cdfbff78SBenjamin Gaignard 
128cdfbff78SBenjamin Gaignard /* preformatter conversion matrix */
129cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_601[8] = {
130cdfbff78SBenjamin Gaignard 	0xF927082E, 0x04C9FEAB, 0x01D30964, 0xFA95FD3D,
131cdfbff78SBenjamin Gaignard 	0x0000082E, 0x00002000, 0x00002000, 0x00000000
132cdfbff78SBenjamin Gaignard };
133cdfbff78SBenjamin Gaignard 
134cdfbff78SBenjamin Gaignard /* 709 RGB to YCbCr */
135cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_709[8] = {
136cdfbff78SBenjamin Gaignard 	0xF891082F, 0x0367FF40, 0x01280B71, 0xF9B1FE20,
137cdfbff78SBenjamin Gaignard 	0x0000082F, 0x00002000, 0x00002000, 0x00000000
138cdfbff78SBenjamin Gaignard };
139cdfbff78SBenjamin Gaignard 
140cdfbff78SBenjamin Gaignard static u32 tvout_read(struct sti_tvout *tvout, int offset)
141cdfbff78SBenjamin Gaignard {
142cdfbff78SBenjamin Gaignard 	return readl(tvout->regs + offset);
143cdfbff78SBenjamin Gaignard }
144cdfbff78SBenjamin Gaignard 
145cdfbff78SBenjamin Gaignard static void tvout_write(struct sti_tvout *tvout, u32 val, int offset)
146cdfbff78SBenjamin Gaignard {
147cdfbff78SBenjamin Gaignard 	writel(val, tvout->regs + offset);
148cdfbff78SBenjamin Gaignard }
149cdfbff78SBenjamin Gaignard 
150cdfbff78SBenjamin Gaignard /**
151cdfbff78SBenjamin Gaignard  * Set the clipping mode of a VIP
152cdfbff78SBenjamin Gaignard  *
153cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
154ca279601SBenjamin Gaignard  * @reg: register to set
155cdfbff78SBenjamin Gaignard  * @cr_r:
156cdfbff78SBenjamin Gaignard  * @y_g:
157cdfbff78SBenjamin Gaignard  * @cb_b:
158cdfbff78SBenjamin Gaignard  */
159ca279601SBenjamin Gaignard static void tvout_vip_set_color_order(struct sti_tvout *tvout, int reg,
160cdfbff78SBenjamin Gaignard 				      u32 cr_r, u32 y_g, u32 cb_b)
161cdfbff78SBenjamin Gaignard {
162ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
163cdfbff78SBenjamin Gaignard 
164cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT);
165cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT);
166cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT);
167cdfbff78SBenjamin Gaignard 	val |= cr_r << TVO_VIP_REORDER_R_SHIFT;
168cdfbff78SBenjamin Gaignard 	val |= y_g << TVO_VIP_REORDER_G_SHIFT;
169cdfbff78SBenjamin Gaignard 	val |= cb_b << TVO_VIP_REORDER_B_SHIFT;
170cdfbff78SBenjamin Gaignard 
171ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
172cdfbff78SBenjamin Gaignard }
173cdfbff78SBenjamin Gaignard 
174cdfbff78SBenjamin Gaignard /**
175cdfbff78SBenjamin Gaignard  * Set the clipping mode of a VIP
176cdfbff78SBenjamin Gaignard  *
177cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
178ca279601SBenjamin Gaignard  * @reg: register to set
179cdfbff78SBenjamin Gaignard  * @range: clipping range
180cdfbff78SBenjamin Gaignard  */
181ca279601SBenjamin Gaignard static void tvout_vip_set_clip_mode(struct sti_tvout *tvout, int reg, u32 range)
182cdfbff78SBenjamin Gaignard {
183ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
184cdfbff78SBenjamin Gaignard 
185cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT);
186cdfbff78SBenjamin Gaignard 	val |= range << TVO_VIP_CLIP_SHIFT;
187ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
188cdfbff78SBenjamin Gaignard }
189cdfbff78SBenjamin Gaignard 
190cdfbff78SBenjamin Gaignard /**
191cdfbff78SBenjamin Gaignard  * Set the rounded value of a VIP
192cdfbff78SBenjamin Gaignard  *
193cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
194ca279601SBenjamin Gaignard  * @reg: register to set
195cdfbff78SBenjamin Gaignard  * @rnd: rounded val per component
196cdfbff78SBenjamin Gaignard  */
197ca279601SBenjamin Gaignard static void tvout_vip_set_rnd(struct sti_tvout *tvout, int reg, u32 rnd)
198cdfbff78SBenjamin Gaignard {
199ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
200cdfbff78SBenjamin Gaignard 
201cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT);
202cdfbff78SBenjamin Gaignard 	val |= rnd << TVO_VIP_RND_SHIFT;
203ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
204cdfbff78SBenjamin Gaignard }
205cdfbff78SBenjamin Gaignard 
206cdfbff78SBenjamin Gaignard /**
207cdfbff78SBenjamin Gaignard  * Select the VIP input
208cdfbff78SBenjamin Gaignard  *
209cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
210ca279601SBenjamin Gaignard  * @reg: register to set
211ca279601SBenjamin Gaignard  * @main_path: main or auxiliary path
212ca279601SBenjamin Gaignard  * @sel_input_logic_inverted: need to invert the logic
213cdfbff78SBenjamin Gaignard  * @sel_input: selected_input (main/aux + conv)
214cdfbff78SBenjamin Gaignard  */
215cdfbff78SBenjamin Gaignard static void tvout_vip_set_sel_input(struct sti_tvout *tvout,
216ca279601SBenjamin Gaignard 				    int reg,
217cdfbff78SBenjamin Gaignard 				    bool main_path,
218cdfbff78SBenjamin Gaignard 				    bool sel_input_logic_inverted,
219cdfbff78SBenjamin Gaignard 				    enum sti_tvout_video_out_type video_out)
220cdfbff78SBenjamin Gaignard {
221cdfbff78SBenjamin Gaignard 	u32 sel_input;
222ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
223cdfbff78SBenjamin Gaignard 
224cdfbff78SBenjamin Gaignard 	if (main_path)
225cdfbff78SBenjamin Gaignard 		sel_input = TVO_VIP_SEL_INPUT_MAIN;
226cdfbff78SBenjamin Gaignard 	else
227cdfbff78SBenjamin Gaignard 		sel_input = TVO_VIP_SEL_INPUT_AUX;
228cdfbff78SBenjamin Gaignard 
229cdfbff78SBenjamin Gaignard 	switch (video_out) {
230cdfbff78SBenjamin Gaignard 	case STI_TVOUT_VIDEO_OUT_RGB:
231cdfbff78SBenjamin Gaignard 		sel_input |= TVO_VIP_SEL_INPUT_BYPASSED;
232cdfbff78SBenjamin Gaignard 		break;
233cdfbff78SBenjamin Gaignard 	case STI_TVOUT_VIDEO_OUT_YUV:
234cdfbff78SBenjamin Gaignard 		sel_input &= ~TVO_VIP_SEL_INPUT_BYPASSED;
235cdfbff78SBenjamin Gaignard 		break;
236cdfbff78SBenjamin Gaignard 	}
237cdfbff78SBenjamin Gaignard 
238cdfbff78SBenjamin Gaignard 	/* on stih407 chip the sel_input bypass mode logic is inverted */
239cdfbff78SBenjamin Gaignard 	if (sel_input_logic_inverted)
240cdfbff78SBenjamin Gaignard 		sel_input = sel_input ^ TVO_VIP_SEL_INPUT_BYPASS_MASK;
241cdfbff78SBenjamin Gaignard 
242cdfbff78SBenjamin Gaignard 	val &= ~TVO_VIP_SEL_INPUT_MASK;
243cdfbff78SBenjamin Gaignard 	val |= sel_input;
244ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
245cdfbff78SBenjamin Gaignard }
246cdfbff78SBenjamin Gaignard 
247cdfbff78SBenjamin Gaignard /**
248cdfbff78SBenjamin Gaignard  * Select the input video signed or unsigned
249cdfbff78SBenjamin Gaignard  *
250cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
251ca279601SBenjamin Gaignard  * @reg: register to set
252cdfbff78SBenjamin Gaignard  * @in_vid_signed: used video input format
253cdfbff78SBenjamin Gaignard  */
254ca279601SBenjamin Gaignard static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout,
255ca279601SBenjamin Gaignard 		int reg, u32 in_vid_fmt)
256cdfbff78SBenjamin Gaignard {
257ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
258cdfbff78SBenjamin Gaignard 
259cdfbff78SBenjamin Gaignard 	val &= ~TVO_IN_FMT_SIGNED;
260cdfbff78SBenjamin Gaignard 	val |= in_vid_fmt;
261ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
262cdfbff78SBenjamin Gaignard }
263cdfbff78SBenjamin Gaignard 
264cdfbff78SBenjamin Gaignard /**
26505a142c2SBich Hemon  * Set preformatter matrix
26605a142c2SBich Hemon  *
26705a142c2SBich Hemon  * @tvout: tvout structure
26805a142c2SBich Hemon  * @mode: display mode structure
26905a142c2SBich Hemon  */
27005a142c2SBich Hemon static void tvout_preformatter_set_matrix(struct sti_tvout *tvout,
27105a142c2SBich Hemon 					  struct drm_display_mode *mode)
27205a142c2SBich Hemon {
27305a142c2SBich Hemon 	unsigned int i;
27405a142c2SBich Hemon 	const u32 *pf_matrix;
27505a142c2SBich Hemon 
27605a142c2SBich Hemon 	if (mode->vdisplay >= TVO_MIN_HD_HEIGHT)
27705a142c2SBich Hemon 		pf_matrix = rgb_to_ycbcr_709;
27805a142c2SBich Hemon 	else
27905a142c2SBich Hemon 		pf_matrix = rgb_to_ycbcr_601;
28005a142c2SBich Hemon 
28105a142c2SBich Hemon 	for (i = 0; i < 8; i++) {
28205a142c2SBich Hemon 		tvout_write(tvout, *(pf_matrix + i),
28305a142c2SBich Hemon 			    TVO_CSC_MAIN_M0 + (i * 4));
28405a142c2SBich Hemon 		tvout_write(tvout, *(pf_matrix + i),
28505a142c2SBich Hemon 			    TVO_CSC_AUX_M0 + (i * 4));
28605a142c2SBich Hemon 	}
28705a142c2SBich Hemon }
28805a142c2SBich Hemon 
28905a142c2SBich Hemon /**
290f32c4c50SBenjamin Gaignard  * Start VIP block for DVO output
291f32c4c50SBenjamin Gaignard  *
292f32c4c50SBenjamin Gaignard  * @tvout: pointer on tvout structure
293f32c4c50SBenjamin Gaignard  * @main_path: true if main path has to be used in the vip configuration
294f32c4c50SBenjamin Gaignard  *	  else aux path is used.
295f32c4c50SBenjamin Gaignard  */
296f32c4c50SBenjamin Gaignard static void tvout_dvo_start(struct sti_tvout *tvout, bool main_path)
297f32c4c50SBenjamin Gaignard {
298f32c4c50SBenjamin Gaignard 	struct device_node *node = tvout->dev->of_node;
299f32c4c50SBenjamin Gaignard 	bool sel_input_logic_inverted = false;
300f32c4c50SBenjamin Gaignard 	u32 tvo_in_vid_format;
301503290ceSVincent Abriou 	int val, tmp;
302f32c4c50SBenjamin Gaignard 
303f32c4c50SBenjamin Gaignard 	dev_dbg(tvout->dev, "%s\n", __func__);
304f32c4c50SBenjamin Gaignard 
305f32c4c50SBenjamin Gaignard 	if (main_path) {
306f32c4c50SBenjamin Gaignard 		DRM_DEBUG_DRIVER("main vip for DVO\n");
307503290ceSVincent Abriou 		/* Select the input sync for dvo */
308503290ceSVincent Abriou 		tmp = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_DVO;
309503290ceSVincent Abriou 		val  = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
310503290ceSVincent Abriou 		val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
311503290ceSVincent Abriou 		val |= tmp;
312f32c4c50SBenjamin Gaignard 		tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
313f32c4c50SBenjamin Gaignard 		tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
314f32c4c50SBenjamin Gaignard 	} else {
315f32c4c50SBenjamin Gaignard 		DRM_DEBUG_DRIVER("aux vip for DVO\n");
316503290ceSVincent Abriou 		/* Select the input sync for dvo */
317503290ceSVincent Abriou 		tmp = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_DVO;
318503290ceSVincent Abriou 		val  = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
319503290ceSVincent Abriou 		val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
320503290ceSVincent Abriou 		val |= tmp;
321f32c4c50SBenjamin Gaignard 		tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
322f32c4c50SBenjamin Gaignard 		tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
323f32c4c50SBenjamin Gaignard 	}
324f32c4c50SBenjamin Gaignard 
325f32c4c50SBenjamin Gaignard 	/* Set color channel order */
326f32c4c50SBenjamin Gaignard 	tvout_vip_set_color_order(tvout, TVO_VIP_DVO,
327f32c4c50SBenjamin Gaignard 				  TVO_VIP_REORDER_CR_R_SEL,
328f32c4c50SBenjamin Gaignard 				  TVO_VIP_REORDER_Y_G_SEL,
329f32c4c50SBenjamin Gaignard 				  TVO_VIP_REORDER_CB_B_SEL);
330f32c4c50SBenjamin Gaignard 
3311834b84dSVincent Abriou 	/* Set clipping mode */
3321834b84dSVincent Abriou 	tvout_vip_set_clip_mode(tvout, TVO_VIP_DVO, TVO_VIP_CLIP_DISABLED);
333f32c4c50SBenjamin Gaignard 
334f32c4c50SBenjamin Gaignard 	/* Set round mode (rounded to 8-bit per component) */
335f32c4c50SBenjamin Gaignard 	tvout_vip_set_rnd(tvout, TVO_VIP_DVO, TVO_VIP_RND_8BIT_ROUNDED);
336f32c4c50SBenjamin Gaignard 
337f32c4c50SBenjamin Gaignard 	if (of_device_is_compatible(node, "st,stih407-tvout")) {
338f32c4c50SBenjamin Gaignard 		/* Set input video format */
339f32c4c50SBenjamin Gaignard 		tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format,
340f32c4c50SBenjamin Gaignard 					 TVO_IN_FMT_SIGNED);
341f32c4c50SBenjamin Gaignard 		sel_input_logic_inverted = true;
342f32c4c50SBenjamin Gaignard 	}
343f32c4c50SBenjamin Gaignard 
344f32c4c50SBenjamin Gaignard 	/* Input selection */
345f32c4c50SBenjamin Gaignard 	tvout_vip_set_sel_input(tvout, TVO_VIP_DVO, main_path,
346f32c4c50SBenjamin Gaignard 				sel_input_logic_inverted,
347f32c4c50SBenjamin Gaignard 				STI_TVOUT_VIDEO_OUT_RGB);
348f32c4c50SBenjamin Gaignard }
349f32c4c50SBenjamin Gaignard 
350f32c4c50SBenjamin Gaignard /**
351cdfbff78SBenjamin Gaignard  * Start VIP block for HDMI output
352cdfbff78SBenjamin Gaignard  *
353cdfbff78SBenjamin Gaignard  * @tvout: pointer on tvout structure
354cdfbff78SBenjamin Gaignard  * @main_path: true if main path has to be used in the vip configuration
355cdfbff78SBenjamin Gaignard  *	  else aux path is used.
356cdfbff78SBenjamin Gaignard  */
357cdfbff78SBenjamin Gaignard static void tvout_hdmi_start(struct sti_tvout *tvout, bool main_path)
358cdfbff78SBenjamin Gaignard {
359cdfbff78SBenjamin Gaignard 	struct device_node *node = tvout->dev->of_node;
360cdfbff78SBenjamin Gaignard 	bool sel_input_logic_inverted = false;
361ca279601SBenjamin Gaignard 	u32 tvo_in_vid_format;
362cdfbff78SBenjamin Gaignard 
363cdfbff78SBenjamin Gaignard 	dev_dbg(tvout->dev, "%s\n", __func__);
364cdfbff78SBenjamin Gaignard 
365cdfbff78SBenjamin Gaignard 	if (main_path) {
366cdfbff78SBenjamin Gaignard 		DRM_DEBUG_DRIVER("main vip for hdmi\n");
367503290ceSVincent Abriou 		/* select the input sync for hdmi */
368503290ceSVincent Abriou 		tvout_write(tvout,
369503290ceSVincent Abriou 			    TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDMI,
370503290ceSVincent Abriou 			    TVO_HDMI_SYNC_SEL);
371ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
372cdfbff78SBenjamin Gaignard 	} else {
373cdfbff78SBenjamin Gaignard 		DRM_DEBUG_DRIVER("aux vip for hdmi\n");
374503290ceSVincent Abriou 		/* select the input sync for hdmi */
375503290ceSVincent Abriou 		tvout_write(tvout,
376503290ceSVincent Abriou 			    TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDMI,
377503290ceSVincent Abriou 			    TVO_HDMI_SYNC_SEL);
378ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
379cdfbff78SBenjamin Gaignard 	}
380cdfbff78SBenjamin Gaignard 
381cdfbff78SBenjamin Gaignard 	/* set color channel order */
382ca279601SBenjamin Gaignard 	tvout_vip_set_color_order(tvout, TVO_VIP_HDMI,
383cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CR_R_SEL,
384cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_Y_G_SEL,
385cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CB_B_SEL);
386cdfbff78SBenjamin Gaignard 
3871834b84dSVincent Abriou 	/* set clipping mode */
3881834b84dSVincent Abriou 	tvout_vip_set_clip_mode(tvout, TVO_VIP_HDMI, TVO_VIP_CLIP_DISABLED);
389cdfbff78SBenjamin Gaignard 
390cdfbff78SBenjamin Gaignard 	/* set round mode (rounded to 8-bit per component) */
391ca279601SBenjamin Gaignard 	tvout_vip_set_rnd(tvout, TVO_VIP_HDMI, TVO_VIP_RND_8BIT_ROUNDED);
392cdfbff78SBenjamin Gaignard 
393cdfbff78SBenjamin Gaignard 	if (of_device_is_compatible(node, "st,stih407-tvout")) {
394cdfbff78SBenjamin Gaignard 		/* set input video format */
395ca279601SBenjamin Gaignard 		tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format,
396cdfbff78SBenjamin Gaignard 					TVO_IN_FMT_SIGNED);
397cdfbff78SBenjamin Gaignard 		sel_input_logic_inverted = true;
398cdfbff78SBenjamin Gaignard 	}
399cdfbff78SBenjamin Gaignard 
400cdfbff78SBenjamin Gaignard 	/* input selection */
401ca279601SBenjamin Gaignard 	tvout_vip_set_sel_input(tvout, TVO_VIP_HDMI, main_path,
402cdfbff78SBenjamin Gaignard 			sel_input_logic_inverted, STI_TVOUT_VIDEO_OUT_RGB);
403cdfbff78SBenjamin Gaignard }
404cdfbff78SBenjamin Gaignard 
405cdfbff78SBenjamin Gaignard /**
406cdfbff78SBenjamin Gaignard  * Start HDF VIP and HD DAC
407cdfbff78SBenjamin Gaignard  *
408cdfbff78SBenjamin Gaignard  * @tvout: pointer on tvout structure
409cdfbff78SBenjamin Gaignard  * @main_path: true if main path has to be used in the vip configuration
410cdfbff78SBenjamin Gaignard  *	  else aux path is used.
411cdfbff78SBenjamin Gaignard  */
412cdfbff78SBenjamin Gaignard static void tvout_hda_start(struct sti_tvout *tvout, bool main_path)
413cdfbff78SBenjamin Gaignard {
414cdfbff78SBenjamin Gaignard 	struct device_node *node = tvout->dev->of_node;
415cdfbff78SBenjamin Gaignard 	bool sel_input_logic_inverted = false;
416ca279601SBenjamin Gaignard 	u32 tvo_in_vid_format;
417ca279601SBenjamin Gaignard 	int val;
418cdfbff78SBenjamin Gaignard 
419cdfbff78SBenjamin Gaignard 	dev_dbg(tvout->dev, "%s\n", __func__);
420cdfbff78SBenjamin Gaignard 
421ca279601SBenjamin Gaignard 	if (main_path) {
422503290ceSVincent Abriou 		DRM_DEBUG_DRIVER("main vip for HDF\n");
423503290ceSVincent Abriou 		/* Select the input sync for HD analog and HD DCS */
424503290ceSVincent Abriou 		val  = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDDCS;
425503290ceSVincent Abriou 		val  = val << TVO_SYNC_HD_DCS_SHIFT;
426503290ceSVincent Abriou 		val |= TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDF;
427ca279601SBenjamin Gaignard 		tvout_write(tvout, val, TVO_HD_SYNC_SEL);
428ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
429ca279601SBenjamin Gaignard 	} else {
430503290ceSVincent Abriou 		DRM_DEBUG_DRIVER("aux vip for HDF\n");
431503290ceSVincent Abriou 		/* Select the input sync for HD analog and HD DCS */
432503290ceSVincent Abriou 		val  = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDDCS;
433503290ceSVincent Abriou 		val  = val << TVO_SYNC_HD_DCS_SHIFT;
434503290ceSVincent Abriou 		val |= TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDF;
435ca279601SBenjamin Gaignard 		tvout_write(tvout, val, TVO_HD_SYNC_SEL);
436ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
437cdfbff78SBenjamin Gaignard 	}
438cdfbff78SBenjamin Gaignard 
439cdfbff78SBenjamin Gaignard 	/* set color channel order */
440ca279601SBenjamin Gaignard 	tvout_vip_set_color_order(tvout, TVO_VIP_HDF,
441cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CR_R_SEL,
442cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_Y_G_SEL,
443cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CB_B_SEL);
444cdfbff78SBenjamin Gaignard 
4451834b84dSVincent Abriou 	/* set clipping mode */
4461834b84dSVincent Abriou 	tvout_vip_set_clip_mode(tvout, TVO_VIP_HDF, TVO_VIP_CLIP_DISABLED);
447cdfbff78SBenjamin Gaignard 
448cdfbff78SBenjamin Gaignard 	/* set round mode (rounded to 10-bit per component) */
449ca279601SBenjamin Gaignard 	tvout_vip_set_rnd(tvout, TVO_VIP_HDF, TVO_VIP_RND_10BIT_ROUNDED);
450cdfbff78SBenjamin Gaignard 
451cdfbff78SBenjamin Gaignard 	if (of_device_is_compatible(node, "st,stih407-tvout")) {
452cdfbff78SBenjamin Gaignard 		/* set input video format */
453ca279601SBenjamin Gaignard 		tvout_vip_set_in_vid_fmt(tvout,
454ca279601SBenjamin Gaignard 			tvo_in_vid_format, TVO_IN_FMT_SIGNED);
455cdfbff78SBenjamin Gaignard 		sel_input_logic_inverted = true;
456cdfbff78SBenjamin Gaignard 	}
457cdfbff78SBenjamin Gaignard 
458cdfbff78SBenjamin Gaignard 	/* Input selection */
459ca279601SBenjamin Gaignard 	tvout_vip_set_sel_input(tvout, TVO_VIP_HDF, main_path,
460cdfbff78SBenjamin Gaignard 				sel_input_logic_inverted,
461cdfbff78SBenjamin Gaignard 				STI_TVOUT_VIDEO_OUT_YUV);
462cdfbff78SBenjamin Gaignard 
463cdfbff78SBenjamin Gaignard 	/* power up HD DAC */
464cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 0, TVO_HD_DAC_CFG_OFF);
465cdfbff78SBenjamin Gaignard }
466cdfbff78SBenjamin Gaignard 
467b514bee7SVincent Abriou #define DBGFS_DUMP(reg) seq_printf(s, "\n  %-25s 0x%08X", #reg, \
468b514bee7SVincent Abriou 				   readl(tvout->regs + reg))
469b514bee7SVincent Abriou 
470b514bee7SVincent Abriou static void tvout_dbg_vip(struct seq_file *s, int val)
471b514bee7SVincent Abriou {
472b514bee7SVincent Abriou 	int r, g, b, tmp, mask;
473b514bee7SVincent Abriou 	char *const reorder[] = {"Y_G", "Cb_B", "Cr_R"};
474b514bee7SVincent Abriou 	char *const clipping[] = {"No", "EAV/SAV", "Limited range RGB/Y",
475b514bee7SVincent Abriou 				  "Limited range Cb/Cr", "decided by register"};
476b514bee7SVincent Abriou 	char *const round[] = {"8-bit", "10-bit", "12-bit"};
477b514bee7SVincent Abriou 	char *const input_sel[] = {"Main (color matrix enabled)",
478b514bee7SVincent Abriou 				   "Main (color matrix by-passed)",
479b514bee7SVincent Abriou 				   "", "", "", "", "", "",
480b514bee7SVincent Abriou 				   "Aux (color matrix enabled)",
481b514bee7SVincent Abriou 				   "Aux (color matrix by-passed)",
482b514bee7SVincent Abriou 				   "", "", "", "", "", "Force value"};
483b514bee7SVincent Abriou 
484b514bee7SVincent Abriou 	seq_puts(s, "\t");
485b514bee7SVincent Abriou 	mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT;
486b514bee7SVincent Abriou 	r = (val & mask) >> TVO_VIP_REORDER_R_SHIFT;
487b514bee7SVincent Abriou 	mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT;
488b514bee7SVincent Abriou 	g = (val & mask) >> TVO_VIP_REORDER_G_SHIFT;
489b514bee7SVincent Abriou 	mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT;
490b514bee7SVincent Abriou 	b = (val & mask) >> TVO_VIP_REORDER_B_SHIFT;
491b514bee7SVincent Abriou 	seq_printf(s, "%-24s %s->%s %s->%s %s->%s\n", "Reorder:",
492b514bee7SVincent Abriou 		   reorder[r], reorder[TVO_VIP_REORDER_CR_R_SEL],
493b514bee7SVincent Abriou 		   reorder[g], reorder[TVO_VIP_REORDER_Y_G_SEL],
494b514bee7SVincent Abriou 		   reorder[b], reorder[TVO_VIP_REORDER_CB_B_SEL]);
495b514bee7SVincent Abriou 	seq_puts(s, "\t\t\t\t\t");
496b514bee7SVincent Abriou 	mask = TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT;
497b514bee7SVincent Abriou 	tmp = (val & mask) >> TVO_VIP_CLIP_SHIFT;
498b514bee7SVincent Abriou 	seq_printf(s, "%-24s %s\n", "Clipping:", clipping[tmp]);
499b514bee7SVincent Abriou 	seq_puts(s, "\t\t\t\t\t");
500b514bee7SVincent Abriou 	mask = TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT;
501b514bee7SVincent Abriou 	tmp = (val & mask) >> TVO_VIP_RND_SHIFT;
502b514bee7SVincent Abriou 	seq_printf(s, "%-24s input data rounded to %s per component\n",
503b514bee7SVincent Abriou 		   "Round:", round[tmp]);
504b514bee7SVincent Abriou 	seq_puts(s, "\t\t\t\t\t");
505b514bee7SVincent Abriou 	tmp = (val & TVO_VIP_SEL_INPUT_MASK);
506b514bee7SVincent Abriou 	seq_printf(s, "%-24s %s", "Input selection:", input_sel[tmp]);
507b514bee7SVincent Abriou }
508b514bee7SVincent Abriou 
509b514bee7SVincent Abriou static void tvout_dbg_hd_dac_cfg(struct seq_file *s, int val)
510b514bee7SVincent Abriou {
511b514bee7SVincent Abriou 	seq_printf(s, "\t%-24s %s", "HD DAC:",
512b514bee7SVincent Abriou 		   val & 1 ? "disabled" : "enabled");
513b514bee7SVincent Abriou }
514b514bee7SVincent Abriou 
515b514bee7SVincent Abriou static int tvout_dbg_show(struct seq_file *s, void *data)
516b514bee7SVincent Abriou {
517b514bee7SVincent Abriou 	struct drm_info_node *node = s->private;
518b514bee7SVincent Abriou 	struct sti_tvout *tvout = (struct sti_tvout *)node->info_ent->data;
519b514bee7SVincent Abriou 	struct drm_crtc *crtc;
520b514bee7SVincent Abriou 
521b514bee7SVincent Abriou 	seq_printf(s, "TVOUT: (vaddr = 0x%p)", tvout->regs);
522b514bee7SVincent Abriou 
523b514bee7SVincent Abriou 	seq_puts(s, "\n\n  HDMI encoder: ");
524b514bee7SVincent Abriou 	crtc = tvout->hdmi->crtc;
525b514bee7SVincent Abriou 	if (crtc) {
526b514bee7SVincent Abriou 		seq_printf(s, "connected to %s path",
527b514bee7SVincent Abriou 			   sti_crtc_is_main(crtc) ? "main" : "aux");
528b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_HDMI_SYNC_SEL);
529b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_VIP_HDMI);
530b514bee7SVincent Abriou 		tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDMI));
531b514bee7SVincent Abriou 	} else {
532b514bee7SVincent Abriou 		seq_puts(s, "disabled");
533b514bee7SVincent Abriou 	}
534b514bee7SVincent Abriou 
535b514bee7SVincent Abriou 	seq_puts(s, "\n\n  DVO encoder: ");
536b514bee7SVincent Abriou 	crtc = tvout->dvo->crtc;
537b514bee7SVincent Abriou 	if (crtc) {
538b514bee7SVincent Abriou 		seq_printf(s, "connected to %s path",
539b514bee7SVincent Abriou 			   sti_crtc_is_main(crtc) ? "main" : "aux");
540b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_DVO_SYNC_SEL);
541b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_DVO_CONFIG);
542b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_VIP_DVO);
543b514bee7SVincent Abriou 		tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_DVO));
544b514bee7SVincent Abriou 	} else {
545b514bee7SVincent Abriou 		seq_puts(s, "disabled");
546b514bee7SVincent Abriou 	}
547b514bee7SVincent Abriou 
548b514bee7SVincent Abriou 	seq_puts(s, "\n\n  HDA encoder: ");
549b514bee7SVincent Abriou 	crtc = tvout->hda->crtc;
550b514bee7SVincent Abriou 	if (crtc) {
551b514bee7SVincent Abriou 		seq_printf(s, "connected to %s path",
552b514bee7SVincent Abriou 			   sti_crtc_is_main(crtc) ? "main" : "aux");
553b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_HD_SYNC_SEL);
554b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_HD_DAC_CFG_OFF);
555b514bee7SVincent Abriou 		tvout_dbg_hd_dac_cfg(s,
556b514bee7SVincent Abriou 				     readl(tvout->regs + TVO_HD_DAC_CFG_OFF));
557b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_VIP_HDF);
558b514bee7SVincent Abriou 		tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDF));
559b514bee7SVincent Abriou 	} else {
560b514bee7SVincent Abriou 		seq_puts(s, "disabled");
561b514bee7SVincent Abriou 	}
562b514bee7SVincent Abriou 
563b514bee7SVincent Abriou 	seq_puts(s, "\n\n  main path configuration");
564b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M0);
565b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M1);
566b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M2);
567b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M3);
568b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M4);
569b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M5);
570b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M6);
571b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M7);
572b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_MAIN_IN_VID_FORMAT);
573b514bee7SVincent Abriou 
574b514bee7SVincent Abriou 	seq_puts(s, "\n\n  auxiliary path configuration");
575b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M0);
576b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M2);
577b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M3);
578b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M4);
579b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M5);
580b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M6);
581b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M7);
582b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_AUX_IN_VID_FORMAT);
583b514bee7SVincent Abriou 	seq_puts(s, "\n");
584b514bee7SVincent Abriou 
585b514bee7SVincent Abriou 	return 0;
586b514bee7SVincent Abriou }
587b514bee7SVincent Abriou 
588b514bee7SVincent Abriou static struct drm_info_list tvout_debugfs_files[] = {
589b514bee7SVincent Abriou 	{ "tvout", tvout_dbg_show, 0, NULL },
590b514bee7SVincent Abriou };
591b514bee7SVincent Abriou 
592b514bee7SVincent Abriou static void tvout_debugfs_exit(struct sti_tvout *tvout, struct drm_minor *minor)
593b514bee7SVincent Abriou {
594b514bee7SVincent Abriou 	drm_debugfs_remove_files(tvout_debugfs_files,
595b514bee7SVincent Abriou 				 ARRAY_SIZE(tvout_debugfs_files),
596b514bee7SVincent Abriou 				 minor);
597b514bee7SVincent Abriou }
598b514bee7SVincent Abriou 
599b514bee7SVincent Abriou static int tvout_debugfs_init(struct sti_tvout *tvout, struct drm_minor *minor)
600b514bee7SVincent Abriou {
601b514bee7SVincent Abriou 	unsigned int i;
602b514bee7SVincent Abriou 
603b514bee7SVincent Abriou 	for (i = 0; i < ARRAY_SIZE(tvout_debugfs_files); i++)
604b514bee7SVincent Abriou 		tvout_debugfs_files[i].data = tvout;
605b514bee7SVincent Abriou 
606b514bee7SVincent Abriou 	return drm_debugfs_create_files(tvout_debugfs_files,
607b514bee7SVincent Abriou 					ARRAY_SIZE(tvout_debugfs_files),
608b514bee7SVincent Abriou 					minor->debugfs_root, minor);
609b514bee7SVincent Abriou }
610b514bee7SVincent Abriou 
611cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_dpms(struct drm_encoder *encoder, int mode)
612cdfbff78SBenjamin Gaignard {
613cdfbff78SBenjamin Gaignard }
614cdfbff78SBenjamin Gaignard 
615cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder,
616cdfbff78SBenjamin Gaignard 				       struct drm_display_mode *mode,
617cdfbff78SBenjamin Gaignard 				       struct drm_display_mode *adjusted_mode)
618cdfbff78SBenjamin Gaignard {
619cdfbff78SBenjamin Gaignard }
620cdfbff78SBenjamin Gaignard 
621cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_destroy(struct drm_encoder *encoder)
622cdfbff78SBenjamin Gaignard {
623cdfbff78SBenjamin Gaignard 	struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder);
624cdfbff78SBenjamin Gaignard 
625cdfbff78SBenjamin Gaignard 	drm_encoder_cleanup(encoder);
626cdfbff78SBenjamin Gaignard 	kfree(sti_encoder);
627cdfbff78SBenjamin Gaignard }
628cdfbff78SBenjamin Gaignard 
629*83af0a48SBenjamin Gaignard static int sti_tvout_late_register(struct drm_encoder *encoder)
630*83af0a48SBenjamin Gaignard {
631*83af0a48SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
632*83af0a48SBenjamin Gaignard 	int ret;
633*83af0a48SBenjamin Gaignard 
634*83af0a48SBenjamin Gaignard 	if (tvout->debugfs_registered)
635*83af0a48SBenjamin Gaignard 		return 0;
636*83af0a48SBenjamin Gaignard 
637*83af0a48SBenjamin Gaignard 	ret = tvout_debugfs_init(tvout, encoder->dev->primary);
638*83af0a48SBenjamin Gaignard 	if (ret)
639*83af0a48SBenjamin Gaignard 		return ret;
640*83af0a48SBenjamin Gaignard 
641*83af0a48SBenjamin Gaignard 	tvout->debugfs_registered = true;
642*83af0a48SBenjamin Gaignard 	return 0;
643*83af0a48SBenjamin Gaignard }
644*83af0a48SBenjamin Gaignard 
645*83af0a48SBenjamin Gaignard static void sti_tvout_early_unregister(struct drm_encoder *encoder)
646*83af0a48SBenjamin Gaignard {
647*83af0a48SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
648*83af0a48SBenjamin Gaignard 
649*83af0a48SBenjamin Gaignard 	if (!tvout->debugfs_registered)
650*83af0a48SBenjamin Gaignard 		return;
651*83af0a48SBenjamin Gaignard 
652*83af0a48SBenjamin Gaignard 	tvout_debugfs_exit(tvout, encoder->dev->primary);
653*83af0a48SBenjamin Gaignard 	tvout->debugfs_registered = false;
654*83af0a48SBenjamin Gaignard }
655*83af0a48SBenjamin Gaignard 
656cdfbff78SBenjamin Gaignard static const struct drm_encoder_funcs sti_tvout_encoder_funcs = {
657cdfbff78SBenjamin Gaignard 	.destroy = sti_tvout_encoder_destroy,
658*83af0a48SBenjamin Gaignard 	.late_register = sti_tvout_late_register,
659*83af0a48SBenjamin Gaignard 	.early_unregister = sti_tvout_early_unregister,
660cdfbff78SBenjamin Gaignard };
661cdfbff78SBenjamin Gaignard 
66205a142c2SBich Hemon static void sti_dvo_encoder_enable(struct drm_encoder *encoder)
663f32c4c50SBenjamin Gaignard {
664f32c4c50SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
665f32c4c50SBenjamin Gaignard 
66605a142c2SBich Hemon 	tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
66705a142c2SBich Hemon 
6689e1f05b2SVincent Abriou 	tvout_dvo_start(tvout, sti_crtc_is_main(encoder->crtc));
669f32c4c50SBenjamin Gaignard }
670f32c4c50SBenjamin Gaignard 
671f32c4c50SBenjamin Gaignard static void sti_dvo_encoder_disable(struct drm_encoder *encoder)
672f32c4c50SBenjamin Gaignard {
673f32c4c50SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
674f32c4c50SBenjamin Gaignard 
675f32c4c50SBenjamin Gaignard 	/* Reset VIP register */
676f32c4c50SBenjamin Gaignard 	tvout_write(tvout, 0x0, TVO_VIP_DVO);
677f32c4c50SBenjamin Gaignard }
678f32c4c50SBenjamin Gaignard 
679f32c4c50SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_dvo_encoder_helper_funcs = {
680f32c4c50SBenjamin Gaignard 	.dpms = sti_tvout_encoder_dpms,
681f32c4c50SBenjamin Gaignard 	.mode_set = sti_tvout_encoder_mode_set,
68205a142c2SBich Hemon 	.enable = sti_dvo_encoder_enable,
683f32c4c50SBenjamin Gaignard 	.disable = sti_dvo_encoder_disable,
684f32c4c50SBenjamin Gaignard };
685f32c4c50SBenjamin Gaignard 
686f32c4c50SBenjamin Gaignard static struct drm_encoder *
687f32c4c50SBenjamin Gaignard sti_tvout_create_dvo_encoder(struct drm_device *dev,
688f32c4c50SBenjamin Gaignard 			     struct sti_tvout *tvout)
689f32c4c50SBenjamin Gaignard {
690f32c4c50SBenjamin Gaignard 	struct sti_tvout_encoder *encoder;
691f32c4c50SBenjamin Gaignard 	struct drm_encoder *drm_encoder;
692f32c4c50SBenjamin Gaignard 
693f32c4c50SBenjamin Gaignard 	encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
694f32c4c50SBenjamin Gaignard 	if (!encoder)
695f32c4c50SBenjamin Gaignard 		return NULL;
696f32c4c50SBenjamin Gaignard 
697f32c4c50SBenjamin Gaignard 	encoder->tvout = tvout;
698f32c4c50SBenjamin Gaignard 
699f32c4c50SBenjamin Gaignard 	drm_encoder = (struct drm_encoder *)encoder;
700f32c4c50SBenjamin Gaignard 
701f32c4c50SBenjamin Gaignard 	drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
702f32c4c50SBenjamin Gaignard 	drm_encoder->possible_clones = 1 << 0;
703f32c4c50SBenjamin Gaignard 
704f32c4c50SBenjamin Gaignard 	drm_encoder_init(dev, drm_encoder,
70513a3d91fSVille Syrjälä 			 &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS,
70613a3d91fSVille Syrjälä 			 NULL);
707f32c4c50SBenjamin Gaignard 
708f32c4c50SBenjamin Gaignard 	drm_encoder_helper_add(drm_encoder, &sti_dvo_encoder_helper_funcs);
709f32c4c50SBenjamin Gaignard 
710f32c4c50SBenjamin Gaignard 	return drm_encoder;
711f32c4c50SBenjamin Gaignard }
712f32c4c50SBenjamin Gaignard 
71305a142c2SBich Hemon static void sti_hda_encoder_enable(struct drm_encoder *encoder)
714cdfbff78SBenjamin Gaignard {
715cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
716cdfbff78SBenjamin Gaignard 
71705a142c2SBich Hemon 	tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
71805a142c2SBich Hemon 
7199e1f05b2SVincent Abriou 	tvout_hda_start(tvout, sti_crtc_is_main(encoder->crtc));
720cdfbff78SBenjamin Gaignard }
721cdfbff78SBenjamin Gaignard 
722cdfbff78SBenjamin Gaignard static void sti_hda_encoder_disable(struct drm_encoder *encoder)
723cdfbff78SBenjamin Gaignard {
724cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
725cdfbff78SBenjamin Gaignard 
726cdfbff78SBenjamin Gaignard 	/* reset VIP register */
727cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 0x0, TVO_VIP_HDF);
728cdfbff78SBenjamin Gaignard 
729cdfbff78SBenjamin Gaignard 	/* power down HD DAC */
730cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 1, TVO_HD_DAC_CFG_OFF);
731cdfbff78SBenjamin Gaignard }
732cdfbff78SBenjamin Gaignard 
733cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = {
734cdfbff78SBenjamin Gaignard 	.dpms = sti_tvout_encoder_dpms,
735cdfbff78SBenjamin Gaignard 	.mode_set = sti_tvout_encoder_mode_set,
73605a142c2SBich Hemon 	.commit = sti_hda_encoder_enable,
737cdfbff78SBenjamin Gaignard 	.disable = sti_hda_encoder_disable,
738cdfbff78SBenjamin Gaignard };
739cdfbff78SBenjamin Gaignard 
740cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev,
741cdfbff78SBenjamin Gaignard 		struct sti_tvout *tvout)
742cdfbff78SBenjamin Gaignard {
743cdfbff78SBenjamin Gaignard 	struct sti_tvout_encoder *encoder;
744cdfbff78SBenjamin Gaignard 	struct drm_encoder *drm_encoder;
745cdfbff78SBenjamin Gaignard 
746cdfbff78SBenjamin Gaignard 	encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
747cdfbff78SBenjamin Gaignard 	if (!encoder)
748cdfbff78SBenjamin Gaignard 		return NULL;
749cdfbff78SBenjamin Gaignard 
750cdfbff78SBenjamin Gaignard 	encoder->tvout = tvout;
751cdfbff78SBenjamin Gaignard 
752cdfbff78SBenjamin Gaignard 	drm_encoder = (struct drm_encoder *) encoder;
753cdfbff78SBenjamin Gaignard 
7545e03abc5SBenjamin Gaignard 	drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
755cdfbff78SBenjamin Gaignard 	drm_encoder->possible_clones = 1 << 0;
756cdfbff78SBenjamin Gaignard 
757cdfbff78SBenjamin Gaignard 	drm_encoder_init(dev, drm_encoder,
75813a3d91fSVille Syrjälä 			&sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL);
759cdfbff78SBenjamin Gaignard 
760cdfbff78SBenjamin Gaignard 	drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs);
761cdfbff78SBenjamin Gaignard 
762cdfbff78SBenjamin Gaignard 	return drm_encoder;
763cdfbff78SBenjamin Gaignard }
764cdfbff78SBenjamin Gaignard 
76505a142c2SBich Hemon static void sti_hdmi_encoder_enable(struct drm_encoder *encoder)
766cdfbff78SBenjamin Gaignard {
767cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
768cdfbff78SBenjamin Gaignard 
76905a142c2SBich Hemon 	tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
77005a142c2SBich Hemon 
7719e1f05b2SVincent Abriou 	tvout_hdmi_start(tvout, sti_crtc_is_main(encoder->crtc));
772cdfbff78SBenjamin Gaignard }
773cdfbff78SBenjamin Gaignard 
774cdfbff78SBenjamin Gaignard static void sti_hdmi_encoder_disable(struct drm_encoder *encoder)
775cdfbff78SBenjamin Gaignard {
776cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
777cdfbff78SBenjamin Gaignard 
778cdfbff78SBenjamin Gaignard 	/* reset VIP register */
779cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 0x0, TVO_VIP_HDMI);
780cdfbff78SBenjamin Gaignard }
781cdfbff78SBenjamin Gaignard 
782cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = {
783cdfbff78SBenjamin Gaignard 	.dpms = sti_tvout_encoder_dpms,
784cdfbff78SBenjamin Gaignard 	.mode_set = sti_tvout_encoder_mode_set,
78505a142c2SBich Hemon 	.commit = sti_hdmi_encoder_enable,
786cdfbff78SBenjamin Gaignard 	.disable = sti_hdmi_encoder_disable,
787cdfbff78SBenjamin Gaignard };
788cdfbff78SBenjamin Gaignard 
789cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev,
790cdfbff78SBenjamin Gaignard 		struct sti_tvout *tvout)
791cdfbff78SBenjamin Gaignard {
792cdfbff78SBenjamin Gaignard 	struct sti_tvout_encoder *encoder;
793cdfbff78SBenjamin Gaignard 	struct drm_encoder *drm_encoder;
794cdfbff78SBenjamin Gaignard 
795cdfbff78SBenjamin Gaignard 	encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
796cdfbff78SBenjamin Gaignard 	if (!encoder)
797cdfbff78SBenjamin Gaignard 		return NULL;
798cdfbff78SBenjamin Gaignard 
799cdfbff78SBenjamin Gaignard 	encoder->tvout = tvout;
800cdfbff78SBenjamin Gaignard 
801cdfbff78SBenjamin Gaignard 	drm_encoder = (struct drm_encoder *) encoder;
802cdfbff78SBenjamin Gaignard 
8035e03abc5SBenjamin Gaignard 	drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
804cdfbff78SBenjamin Gaignard 	drm_encoder->possible_clones = 1 << 1;
805cdfbff78SBenjamin Gaignard 
806cdfbff78SBenjamin Gaignard 	drm_encoder_init(dev, drm_encoder,
80713a3d91fSVille Syrjälä 			&sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS, NULL);
808cdfbff78SBenjamin Gaignard 
809cdfbff78SBenjamin Gaignard 	drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs);
810cdfbff78SBenjamin Gaignard 
811cdfbff78SBenjamin Gaignard 	return drm_encoder;
812cdfbff78SBenjamin Gaignard }
813cdfbff78SBenjamin Gaignard 
814cdfbff78SBenjamin Gaignard static void sti_tvout_create_encoders(struct drm_device *dev,
815cdfbff78SBenjamin Gaignard 		struct sti_tvout *tvout)
816cdfbff78SBenjamin Gaignard {
817cdfbff78SBenjamin Gaignard 	tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout);
818cdfbff78SBenjamin Gaignard 	tvout->hda = sti_tvout_create_hda_encoder(dev, tvout);
819f32c4c50SBenjamin Gaignard 	tvout->dvo = sti_tvout_create_dvo_encoder(dev, tvout);
820cdfbff78SBenjamin Gaignard }
821cdfbff78SBenjamin Gaignard 
822cdfbff78SBenjamin Gaignard static void sti_tvout_destroy_encoders(struct sti_tvout *tvout)
823cdfbff78SBenjamin Gaignard {
824cdfbff78SBenjamin Gaignard 	if (tvout->hdmi)
825cdfbff78SBenjamin Gaignard 		drm_encoder_cleanup(tvout->hdmi);
826cdfbff78SBenjamin Gaignard 	tvout->hdmi = NULL;
827cdfbff78SBenjamin Gaignard 
828cdfbff78SBenjamin Gaignard 	if (tvout->hda)
829cdfbff78SBenjamin Gaignard 		drm_encoder_cleanup(tvout->hda);
830cdfbff78SBenjamin Gaignard 	tvout->hda = NULL;
8310a1dc29dSVincent Abriou 
8320a1dc29dSVincent Abriou 	if (tvout->dvo)
8330a1dc29dSVincent Abriou 		drm_encoder_cleanup(tvout->dvo);
8340a1dc29dSVincent Abriou 	tvout->dvo = NULL;
835cdfbff78SBenjamin Gaignard }
836cdfbff78SBenjamin Gaignard 
837cdfbff78SBenjamin Gaignard static int sti_tvout_bind(struct device *dev, struct device *master, void *data)
838cdfbff78SBenjamin Gaignard {
839cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = dev_get_drvdata(dev);
840cdfbff78SBenjamin Gaignard 	struct drm_device *drm_dev = data;
841cdfbff78SBenjamin Gaignard 
842cdfbff78SBenjamin Gaignard 	tvout->drm_dev = drm_dev;
843cdfbff78SBenjamin Gaignard 
844cdfbff78SBenjamin Gaignard 	sti_tvout_create_encoders(drm_dev, tvout);
845cdfbff78SBenjamin Gaignard 
84653bdcf5fSBenjamin Gaignard 	return 0;
847cdfbff78SBenjamin Gaignard }
848cdfbff78SBenjamin Gaignard 
849cdfbff78SBenjamin Gaignard static void sti_tvout_unbind(struct device *dev, struct device *master,
850cdfbff78SBenjamin Gaignard 	void *data)
851cdfbff78SBenjamin Gaignard {
85253bdcf5fSBenjamin Gaignard 	struct sti_tvout *tvout = dev_get_drvdata(dev);
85353bdcf5fSBenjamin Gaignard 
85453bdcf5fSBenjamin Gaignard 	sti_tvout_destroy_encoders(tvout);
855cdfbff78SBenjamin Gaignard }
856cdfbff78SBenjamin Gaignard 
857cdfbff78SBenjamin Gaignard static const struct component_ops sti_tvout_ops = {
858cdfbff78SBenjamin Gaignard 	.bind	= sti_tvout_bind,
859cdfbff78SBenjamin Gaignard 	.unbind	= sti_tvout_unbind,
860cdfbff78SBenjamin Gaignard };
861cdfbff78SBenjamin Gaignard 
862cdfbff78SBenjamin Gaignard static int sti_tvout_probe(struct platform_device *pdev)
863cdfbff78SBenjamin Gaignard {
864cdfbff78SBenjamin Gaignard 	struct device *dev = &pdev->dev;
865cdfbff78SBenjamin Gaignard 	struct device_node *node = dev->of_node;
866cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout;
867cdfbff78SBenjamin Gaignard 	struct resource *res;
868cdfbff78SBenjamin Gaignard 
869cdfbff78SBenjamin Gaignard 	DRM_INFO("%s\n", __func__);
870cdfbff78SBenjamin Gaignard 
871cdfbff78SBenjamin Gaignard 	if (!node)
872cdfbff78SBenjamin Gaignard 		return -ENODEV;
873cdfbff78SBenjamin Gaignard 
874cdfbff78SBenjamin Gaignard 	tvout = devm_kzalloc(dev, sizeof(*tvout), GFP_KERNEL);
875cdfbff78SBenjamin Gaignard 	if (!tvout)
876cdfbff78SBenjamin Gaignard 		return -ENOMEM;
877cdfbff78SBenjamin Gaignard 
878cdfbff78SBenjamin Gaignard 	tvout->dev = dev;
879cdfbff78SBenjamin Gaignard 
880cdfbff78SBenjamin Gaignard 	/* get Memory ressources */
881cdfbff78SBenjamin Gaignard 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tvout-reg");
882cdfbff78SBenjamin Gaignard 	if (!res) {
883cdfbff78SBenjamin Gaignard 		DRM_ERROR("Invalid glue resource\n");
884cdfbff78SBenjamin Gaignard 		return -ENOMEM;
885cdfbff78SBenjamin Gaignard 	}
886cdfbff78SBenjamin Gaignard 	tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
88731f32a21SWei Yongjun 	if (!tvout->regs)
88831f32a21SWei Yongjun 		return -ENOMEM;
889cdfbff78SBenjamin Gaignard 
890cdfbff78SBenjamin Gaignard 	/* get reset resources */
891cdfbff78SBenjamin Gaignard 	tvout->reset = devm_reset_control_get(dev, "tvout");
892cdfbff78SBenjamin Gaignard 	/* take tvout out of reset */
893cdfbff78SBenjamin Gaignard 	if (!IS_ERR(tvout->reset))
894cdfbff78SBenjamin Gaignard 		reset_control_deassert(tvout->reset);
895cdfbff78SBenjamin Gaignard 
896cdfbff78SBenjamin Gaignard 	platform_set_drvdata(pdev, tvout);
897cdfbff78SBenjamin Gaignard 
898cdfbff78SBenjamin Gaignard 	return component_add(dev, &sti_tvout_ops);
899cdfbff78SBenjamin Gaignard }
900cdfbff78SBenjamin Gaignard 
901cdfbff78SBenjamin Gaignard static int sti_tvout_remove(struct platform_device *pdev)
902cdfbff78SBenjamin Gaignard {
903cdfbff78SBenjamin Gaignard 	component_del(&pdev->dev, &sti_tvout_ops);
904cdfbff78SBenjamin Gaignard 	return 0;
905cdfbff78SBenjamin Gaignard }
906cdfbff78SBenjamin Gaignard 
9078e932cf0SKiran Padwal static const struct of_device_id tvout_of_match[] = {
908cdfbff78SBenjamin Gaignard 	{ .compatible = "st,stih416-tvout", },
909cdfbff78SBenjamin Gaignard 	{ .compatible = "st,stih407-tvout", },
910cdfbff78SBenjamin Gaignard 	{ /* end node */ }
911cdfbff78SBenjamin Gaignard };
912cdfbff78SBenjamin Gaignard MODULE_DEVICE_TABLE(of, tvout_of_match);
913cdfbff78SBenjamin Gaignard 
914cdfbff78SBenjamin Gaignard struct platform_driver sti_tvout_driver = {
915cdfbff78SBenjamin Gaignard 	.driver = {
916cdfbff78SBenjamin Gaignard 		.name = "sti-tvout",
917cdfbff78SBenjamin Gaignard 		.owner = THIS_MODULE,
918cdfbff78SBenjamin Gaignard 		.of_match_table = tvout_of_match,
919cdfbff78SBenjamin Gaignard 	},
920cdfbff78SBenjamin Gaignard 	.probe = sti_tvout_probe,
921cdfbff78SBenjamin Gaignard 	.remove = sti_tvout_remove,
922cdfbff78SBenjamin Gaignard };
923cdfbff78SBenjamin Gaignard 
924cdfbff78SBenjamin Gaignard MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
925cdfbff78SBenjamin Gaignard MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
926cdfbff78SBenjamin Gaignard MODULE_LICENSE("GPL");
927