1cdfbff78SBenjamin Gaignard /* 2cdfbff78SBenjamin Gaignard * Copyright (C) STMicroelectronics SA 2014 3cdfbff78SBenjamin Gaignard * Authors: Benjamin Gaignard <benjamin.gaignard@st.com> 4cdfbff78SBenjamin Gaignard * Vincent Abriou <vincent.abriou@st.com> 5cdfbff78SBenjamin Gaignard * for STMicroelectronics. 6cdfbff78SBenjamin Gaignard * License terms: GNU General Public License (GPL), version 2 7cdfbff78SBenjamin Gaignard */ 8cdfbff78SBenjamin Gaignard 9cdfbff78SBenjamin Gaignard #include <linux/clk.h> 10cdfbff78SBenjamin Gaignard #include <linux/component.h> 11cdfbff78SBenjamin Gaignard #include <linux/module.h> 12cdfbff78SBenjamin Gaignard #include <linux/of_platform.h> 13cdfbff78SBenjamin Gaignard #include <linux/platform_device.h> 14cdfbff78SBenjamin Gaignard #include <linux/reset.h> 15cdfbff78SBenjamin Gaignard 16cdfbff78SBenjamin Gaignard #include <drm/drmP.h> 17cdfbff78SBenjamin Gaignard #include <drm/drm_crtc_helper.h> 18cdfbff78SBenjamin Gaignard 199e1f05b2SVincent Abriou #include "sti_crtc.h" 20*503290ceSVincent Abriou #include "sti_vtg.h" 215e03abc5SBenjamin Gaignard 22cdfbff78SBenjamin Gaignard /* glue registers */ 23cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M0 0x000 24cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M1 0x004 25cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M2 0x008 26cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M3 0x00c 27cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M4 0x010 28cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M5 0x014 29cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M6 0x018 30cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M7 0x01c 31cdfbff78SBenjamin Gaignard #define TVO_MAIN_IN_VID_FORMAT 0x030 32cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M0 0x100 33cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M1 0x104 34cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M2 0x108 35cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M3 0x10c 36cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M4 0x110 37cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M5 0x114 38cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M6 0x118 39cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M7 0x11c 40cdfbff78SBenjamin Gaignard #define TVO_AUX_IN_VID_FORMAT 0x130 41cdfbff78SBenjamin Gaignard #define TVO_VIP_HDF 0x400 42cdfbff78SBenjamin Gaignard #define TVO_HD_SYNC_SEL 0x418 43cdfbff78SBenjamin Gaignard #define TVO_HD_DAC_CFG_OFF 0x420 44cdfbff78SBenjamin Gaignard #define TVO_VIP_HDMI 0x500 45cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_0 0x504 46cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_1 0x508 47cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_B_CB 0x50c 48cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_Y_G 0x510 49cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_R_CR 0x514 50cdfbff78SBenjamin Gaignard #define TVO_HDMI_SYNC_SEL 0x518 51cdfbff78SBenjamin Gaignard #define TVO_HDMI_DFV_OBS 0x540 52f32c4c50SBenjamin Gaignard #define TVO_VIP_DVO 0x600 53f32c4c50SBenjamin Gaignard #define TVO_DVO_SYNC_SEL 0x618 54f32c4c50SBenjamin Gaignard #define TVO_DVO_CONFIG 0x620 55cdfbff78SBenjamin Gaignard 56cdfbff78SBenjamin Gaignard #define TVO_IN_FMT_SIGNED BIT(0) 57cdfbff78SBenjamin Gaignard #define TVO_SYNC_EXT BIT(4) 58cdfbff78SBenjamin Gaignard 59cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_R_SHIFT 24 60cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_G_SHIFT 20 61cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_B_SHIFT 16 62cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_MASK 0x3 63cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_Y_G_SEL 0 64cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CB_B_SEL 1 65cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CR_R_SEL 2 66cdfbff78SBenjamin Gaignard 67cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_SHIFT 8 68cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_MASK 0x7 69cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_DISABLED 0 70cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_EAV_SAV 1 71cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y 2 72cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_CB_CR 3 73cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_PROG_RANGE 4 74cdfbff78SBenjamin Gaignard 75cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_SHIFT 4 76cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_MASK 0x3 77cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_8BIT_ROUNDED 0 78cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_10BIT_ROUNDED 1 79cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_12BIT_ROUNDED 2 80cdfbff78SBenjamin Gaignard 81cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MASK 0xf 82cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MAIN 0x0 83cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_AUX 0x8 84cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_FORCE_COLOR 0xf 85cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASS_MASK 0x1 86cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASSED 1 87cdfbff78SBenjamin Gaignard 88cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_REF 0x00 89cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_REF 0x10 90cdfbff78SBenjamin Gaignard 91cdfbff78SBenjamin Gaignard #define TVO_SYNC_HD_DCS_SHIFT 8 92cdfbff78SBenjamin Gaignard 93f32c4c50SBenjamin Gaignard #define TVO_SYNC_DVO_PAD_HSYNC_SHIFT 8 94f32c4c50SBenjamin Gaignard #define TVO_SYNC_DVO_PAD_VSYNC_SHIFT 16 95f32c4c50SBenjamin Gaignard 965e03abc5SBenjamin Gaignard #define ENCODER_CRTC_MASK (BIT(0) | BIT(1)) 97cdfbff78SBenjamin Gaignard 98cdfbff78SBenjamin Gaignard /* enum listing the supported output data format */ 99cdfbff78SBenjamin Gaignard enum sti_tvout_video_out_type { 100cdfbff78SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_RGB, 101cdfbff78SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_YUV, 102cdfbff78SBenjamin Gaignard }; 103cdfbff78SBenjamin Gaignard 104cdfbff78SBenjamin Gaignard struct sti_tvout { 105cdfbff78SBenjamin Gaignard struct device *dev; 106cdfbff78SBenjamin Gaignard struct drm_device *drm_dev; 107cdfbff78SBenjamin Gaignard void __iomem *regs; 108cdfbff78SBenjamin Gaignard struct reset_control *reset; 109cdfbff78SBenjamin Gaignard struct drm_encoder *hdmi; 110cdfbff78SBenjamin Gaignard struct drm_encoder *hda; 111f32c4c50SBenjamin Gaignard struct drm_encoder *dvo; 112cdfbff78SBenjamin Gaignard }; 113cdfbff78SBenjamin Gaignard 114cdfbff78SBenjamin Gaignard struct sti_tvout_encoder { 115cdfbff78SBenjamin Gaignard struct drm_encoder encoder; 116cdfbff78SBenjamin Gaignard struct sti_tvout *tvout; 117cdfbff78SBenjamin Gaignard }; 118cdfbff78SBenjamin Gaignard 119cdfbff78SBenjamin Gaignard #define to_sti_tvout_encoder(x) \ 120cdfbff78SBenjamin Gaignard container_of(x, struct sti_tvout_encoder, encoder) 121cdfbff78SBenjamin Gaignard 122cdfbff78SBenjamin Gaignard #define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout 123cdfbff78SBenjamin Gaignard 124cdfbff78SBenjamin Gaignard /* preformatter conversion matrix */ 125cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_601[8] = { 126cdfbff78SBenjamin Gaignard 0xF927082E, 0x04C9FEAB, 0x01D30964, 0xFA95FD3D, 127cdfbff78SBenjamin Gaignard 0x0000082E, 0x00002000, 0x00002000, 0x00000000 128cdfbff78SBenjamin Gaignard }; 129cdfbff78SBenjamin Gaignard 130cdfbff78SBenjamin Gaignard /* 709 RGB to YCbCr */ 131cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_709[8] = { 132cdfbff78SBenjamin Gaignard 0xF891082F, 0x0367FF40, 0x01280B71, 0xF9B1FE20, 133cdfbff78SBenjamin Gaignard 0x0000082F, 0x00002000, 0x00002000, 0x00000000 134cdfbff78SBenjamin Gaignard }; 135cdfbff78SBenjamin Gaignard 136cdfbff78SBenjamin Gaignard static u32 tvout_read(struct sti_tvout *tvout, int offset) 137cdfbff78SBenjamin Gaignard { 138cdfbff78SBenjamin Gaignard return readl(tvout->regs + offset); 139cdfbff78SBenjamin Gaignard } 140cdfbff78SBenjamin Gaignard 141cdfbff78SBenjamin Gaignard static void tvout_write(struct sti_tvout *tvout, u32 val, int offset) 142cdfbff78SBenjamin Gaignard { 143cdfbff78SBenjamin Gaignard writel(val, tvout->regs + offset); 144cdfbff78SBenjamin Gaignard } 145cdfbff78SBenjamin Gaignard 146cdfbff78SBenjamin Gaignard /** 147cdfbff78SBenjamin Gaignard * Set the clipping mode of a VIP 148cdfbff78SBenjamin Gaignard * 149cdfbff78SBenjamin Gaignard * @tvout: tvout structure 150ca279601SBenjamin Gaignard * @reg: register to set 151cdfbff78SBenjamin Gaignard * @cr_r: 152cdfbff78SBenjamin Gaignard * @y_g: 153cdfbff78SBenjamin Gaignard * @cb_b: 154cdfbff78SBenjamin Gaignard */ 155ca279601SBenjamin Gaignard static void tvout_vip_set_color_order(struct sti_tvout *tvout, int reg, 156cdfbff78SBenjamin Gaignard u32 cr_r, u32 y_g, u32 cb_b) 157cdfbff78SBenjamin Gaignard { 158ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 159cdfbff78SBenjamin Gaignard 160cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT); 161cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT); 162cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT); 163cdfbff78SBenjamin Gaignard val |= cr_r << TVO_VIP_REORDER_R_SHIFT; 164cdfbff78SBenjamin Gaignard val |= y_g << TVO_VIP_REORDER_G_SHIFT; 165cdfbff78SBenjamin Gaignard val |= cb_b << TVO_VIP_REORDER_B_SHIFT; 166cdfbff78SBenjamin Gaignard 167ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 168cdfbff78SBenjamin Gaignard } 169cdfbff78SBenjamin Gaignard 170cdfbff78SBenjamin Gaignard /** 171cdfbff78SBenjamin Gaignard * Set the clipping mode of a VIP 172cdfbff78SBenjamin Gaignard * 173cdfbff78SBenjamin Gaignard * @tvout: tvout structure 174ca279601SBenjamin Gaignard * @reg: register to set 175cdfbff78SBenjamin Gaignard * @range: clipping range 176cdfbff78SBenjamin Gaignard */ 177ca279601SBenjamin Gaignard static void tvout_vip_set_clip_mode(struct sti_tvout *tvout, int reg, u32 range) 178cdfbff78SBenjamin Gaignard { 179ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 180cdfbff78SBenjamin Gaignard 181cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT); 182cdfbff78SBenjamin Gaignard val |= range << TVO_VIP_CLIP_SHIFT; 183ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 184cdfbff78SBenjamin Gaignard } 185cdfbff78SBenjamin Gaignard 186cdfbff78SBenjamin Gaignard /** 187cdfbff78SBenjamin Gaignard * Set the rounded value of a VIP 188cdfbff78SBenjamin Gaignard * 189cdfbff78SBenjamin Gaignard * @tvout: tvout structure 190ca279601SBenjamin Gaignard * @reg: register to set 191cdfbff78SBenjamin Gaignard * @rnd: rounded val per component 192cdfbff78SBenjamin Gaignard */ 193ca279601SBenjamin Gaignard static void tvout_vip_set_rnd(struct sti_tvout *tvout, int reg, u32 rnd) 194cdfbff78SBenjamin Gaignard { 195ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 196cdfbff78SBenjamin Gaignard 197cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT); 198cdfbff78SBenjamin Gaignard val |= rnd << TVO_VIP_RND_SHIFT; 199ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 200cdfbff78SBenjamin Gaignard } 201cdfbff78SBenjamin Gaignard 202cdfbff78SBenjamin Gaignard /** 203cdfbff78SBenjamin Gaignard * Select the VIP input 204cdfbff78SBenjamin Gaignard * 205cdfbff78SBenjamin Gaignard * @tvout: tvout structure 206ca279601SBenjamin Gaignard * @reg: register to set 207ca279601SBenjamin Gaignard * @main_path: main or auxiliary path 208ca279601SBenjamin Gaignard * @sel_input_logic_inverted: need to invert the logic 209cdfbff78SBenjamin Gaignard * @sel_input: selected_input (main/aux + conv) 210cdfbff78SBenjamin Gaignard */ 211cdfbff78SBenjamin Gaignard static void tvout_vip_set_sel_input(struct sti_tvout *tvout, 212ca279601SBenjamin Gaignard int reg, 213cdfbff78SBenjamin Gaignard bool main_path, 214cdfbff78SBenjamin Gaignard bool sel_input_logic_inverted, 215cdfbff78SBenjamin Gaignard enum sti_tvout_video_out_type video_out) 216cdfbff78SBenjamin Gaignard { 217cdfbff78SBenjamin Gaignard u32 sel_input; 218ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 219cdfbff78SBenjamin Gaignard 220cdfbff78SBenjamin Gaignard if (main_path) 221cdfbff78SBenjamin Gaignard sel_input = TVO_VIP_SEL_INPUT_MAIN; 222cdfbff78SBenjamin Gaignard else 223cdfbff78SBenjamin Gaignard sel_input = TVO_VIP_SEL_INPUT_AUX; 224cdfbff78SBenjamin Gaignard 225cdfbff78SBenjamin Gaignard switch (video_out) { 226cdfbff78SBenjamin Gaignard case STI_TVOUT_VIDEO_OUT_RGB: 227cdfbff78SBenjamin Gaignard sel_input |= TVO_VIP_SEL_INPUT_BYPASSED; 228cdfbff78SBenjamin Gaignard break; 229cdfbff78SBenjamin Gaignard case STI_TVOUT_VIDEO_OUT_YUV: 230cdfbff78SBenjamin Gaignard sel_input &= ~TVO_VIP_SEL_INPUT_BYPASSED; 231cdfbff78SBenjamin Gaignard break; 232cdfbff78SBenjamin Gaignard } 233cdfbff78SBenjamin Gaignard 234cdfbff78SBenjamin Gaignard /* on stih407 chip the sel_input bypass mode logic is inverted */ 235cdfbff78SBenjamin Gaignard if (sel_input_logic_inverted) 236cdfbff78SBenjamin Gaignard sel_input = sel_input ^ TVO_VIP_SEL_INPUT_BYPASS_MASK; 237cdfbff78SBenjamin Gaignard 238cdfbff78SBenjamin Gaignard val &= ~TVO_VIP_SEL_INPUT_MASK; 239cdfbff78SBenjamin Gaignard val |= sel_input; 240ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 241cdfbff78SBenjamin Gaignard } 242cdfbff78SBenjamin Gaignard 243cdfbff78SBenjamin Gaignard /** 244cdfbff78SBenjamin Gaignard * Select the input video signed or unsigned 245cdfbff78SBenjamin Gaignard * 246cdfbff78SBenjamin Gaignard * @tvout: tvout structure 247ca279601SBenjamin Gaignard * @reg: register to set 248cdfbff78SBenjamin Gaignard * @in_vid_signed: used video input format 249cdfbff78SBenjamin Gaignard */ 250ca279601SBenjamin Gaignard static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout, 251ca279601SBenjamin Gaignard int reg, u32 in_vid_fmt) 252cdfbff78SBenjamin Gaignard { 253ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 254cdfbff78SBenjamin Gaignard 255cdfbff78SBenjamin Gaignard val &= ~TVO_IN_FMT_SIGNED; 256cdfbff78SBenjamin Gaignard val |= in_vid_fmt; 257ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 258cdfbff78SBenjamin Gaignard } 259cdfbff78SBenjamin Gaignard 260cdfbff78SBenjamin Gaignard /** 261f32c4c50SBenjamin Gaignard * Start VIP block for DVO output 262f32c4c50SBenjamin Gaignard * 263f32c4c50SBenjamin Gaignard * @tvout: pointer on tvout structure 264f32c4c50SBenjamin Gaignard * @main_path: true if main path has to be used in the vip configuration 265f32c4c50SBenjamin Gaignard * else aux path is used. 266f32c4c50SBenjamin Gaignard */ 267f32c4c50SBenjamin Gaignard static void tvout_dvo_start(struct sti_tvout *tvout, bool main_path) 268f32c4c50SBenjamin Gaignard { 269f32c4c50SBenjamin Gaignard struct device_node *node = tvout->dev->of_node; 270f32c4c50SBenjamin Gaignard bool sel_input_logic_inverted = false; 271f32c4c50SBenjamin Gaignard u32 tvo_in_vid_format; 272*503290ceSVincent Abriou int val, tmp; 273f32c4c50SBenjamin Gaignard 274f32c4c50SBenjamin Gaignard dev_dbg(tvout->dev, "%s\n", __func__); 275f32c4c50SBenjamin Gaignard 276f32c4c50SBenjamin Gaignard if (main_path) { 277f32c4c50SBenjamin Gaignard DRM_DEBUG_DRIVER("main vip for DVO\n"); 278*503290ceSVincent Abriou /* Select the input sync for dvo */ 279*503290ceSVincent Abriou tmp = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_DVO; 280*503290ceSVincent Abriou val = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT; 281*503290ceSVincent Abriou val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT; 282*503290ceSVincent Abriou val |= tmp; 283f32c4c50SBenjamin Gaignard tvout_write(tvout, val, TVO_DVO_SYNC_SEL); 284f32c4c50SBenjamin Gaignard tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT; 285f32c4c50SBenjamin Gaignard } else { 286f32c4c50SBenjamin Gaignard DRM_DEBUG_DRIVER("aux vip for DVO\n"); 287*503290ceSVincent Abriou /* Select the input sync for dvo */ 288*503290ceSVincent Abriou tmp = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_DVO; 289*503290ceSVincent Abriou val = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT; 290*503290ceSVincent Abriou val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT; 291*503290ceSVincent Abriou val |= tmp; 292f32c4c50SBenjamin Gaignard tvout_write(tvout, val, TVO_DVO_SYNC_SEL); 293f32c4c50SBenjamin Gaignard tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT; 294f32c4c50SBenjamin Gaignard } 295f32c4c50SBenjamin Gaignard 296f32c4c50SBenjamin Gaignard /* Set color channel order */ 297f32c4c50SBenjamin Gaignard tvout_vip_set_color_order(tvout, TVO_VIP_DVO, 298f32c4c50SBenjamin Gaignard TVO_VIP_REORDER_CR_R_SEL, 299f32c4c50SBenjamin Gaignard TVO_VIP_REORDER_Y_G_SEL, 300f32c4c50SBenjamin Gaignard TVO_VIP_REORDER_CB_B_SEL); 301f32c4c50SBenjamin Gaignard 302f32c4c50SBenjamin Gaignard /* Set clipping mode (Limited range RGB/Y) */ 303f32c4c50SBenjamin Gaignard tvout_vip_set_clip_mode(tvout, TVO_VIP_DVO, 304f32c4c50SBenjamin Gaignard TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y); 305f32c4c50SBenjamin Gaignard 306f32c4c50SBenjamin Gaignard /* Set round mode (rounded to 8-bit per component) */ 307f32c4c50SBenjamin Gaignard tvout_vip_set_rnd(tvout, TVO_VIP_DVO, TVO_VIP_RND_8BIT_ROUNDED); 308f32c4c50SBenjamin Gaignard 309f32c4c50SBenjamin Gaignard if (of_device_is_compatible(node, "st,stih407-tvout")) { 310f32c4c50SBenjamin Gaignard /* Set input video format */ 311f32c4c50SBenjamin Gaignard tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, 312f32c4c50SBenjamin Gaignard TVO_IN_FMT_SIGNED); 313f32c4c50SBenjamin Gaignard sel_input_logic_inverted = true; 314f32c4c50SBenjamin Gaignard } 315f32c4c50SBenjamin Gaignard 316f32c4c50SBenjamin Gaignard /* Input selection */ 317f32c4c50SBenjamin Gaignard tvout_vip_set_sel_input(tvout, TVO_VIP_DVO, main_path, 318f32c4c50SBenjamin Gaignard sel_input_logic_inverted, 319f32c4c50SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_RGB); 320f32c4c50SBenjamin Gaignard } 321f32c4c50SBenjamin Gaignard 322f32c4c50SBenjamin Gaignard /** 323cdfbff78SBenjamin Gaignard * Start VIP block for HDMI output 324cdfbff78SBenjamin Gaignard * 325cdfbff78SBenjamin Gaignard * @tvout: pointer on tvout structure 326cdfbff78SBenjamin Gaignard * @main_path: true if main path has to be used in the vip configuration 327cdfbff78SBenjamin Gaignard * else aux path is used. 328cdfbff78SBenjamin Gaignard */ 329cdfbff78SBenjamin Gaignard static void tvout_hdmi_start(struct sti_tvout *tvout, bool main_path) 330cdfbff78SBenjamin Gaignard { 331cdfbff78SBenjamin Gaignard struct device_node *node = tvout->dev->of_node; 332cdfbff78SBenjamin Gaignard bool sel_input_logic_inverted = false; 333ca279601SBenjamin Gaignard u32 tvo_in_vid_format; 334cdfbff78SBenjamin Gaignard 335cdfbff78SBenjamin Gaignard dev_dbg(tvout->dev, "%s\n", __func__); 336cdfbff78SBenjamin Gaignard 337cdfbff78SBenjamin Gaignard if (main_path) { 338cdfbff78SBenjamin Gaignard DRM_DEBUG_DRIVER("main vip for hdmi\n"); 339*503290ceSVincent Abriou /* select the input sync for hdmi */ 340*503290ceSVincent Abriou tvout_write(tvout, 341*503290ceSVincent Abriou TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDMI, 342*503290ceSVincent Abriou TVO_HDMI_SYNC_SEL); 343ca279601SBenjamin Gaignard tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT; 344cdfbff78SBenjamin Gaignard } else { 345cdfbff78SBenjamin Gaignard DRM_DEBUG_DRIVER("aux vip for hdmi\n"); 346*503290ceSVincent Abriou /* select the input sync for hdmi */ 347*503290ceSVincent Abriou tvout_write(tvout, 348*503290ceSVincent Abriou TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDMI, 349*503290ceSVincent Abriou TVO_HDMI_SYNC_SEL); 350ca279601SBenjamin Gaignard tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT; 351cdfbff78SBenjamin Gaignard } 352cdfbff78SBenjamin Gaignard 353cdfbff78SBenjamin Gaignard /* set color channel order */ 354ca279601SBenjamin Gaignard tvout_vip_set_color_order(tvout, TVO_VIP_HDMI, 355cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CR_R_SEL, 356cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_Y_G_SEL, 357cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CB_B_SEL); 358cdfbff78SBenjamin Gaignard 359cdfbff78SBenjamin Gaignard /* set clipping mode (Limited range RGB/Y) */ 360ca279601SBenjamin Gaignard tvout_vip_set_clip_mode(tvout, TVO_VIP_HDMI, 361ca279601SBenjamin Gaignard TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y); 362cdfbff78SBenjamin Gaignard 363cdfbff78SBenjamin Gaignard /* set round mode (rounded to 8-bit per component) */ 364ca279601SBenjamin Gaignard tvout_vip_set_rnd(tvout, TVO_VIP_HDMI, TVO_VIP_RND_8BIT_ROUNDED); 365cdfbff78SBenjamin Gaignard 366cdfbff78SBenjamin Gaignard if (of_device_is_compatible(node, "st,stih407-tvout")) { 367cdfbff78SBenjamin Gaignard /* set input video format */ 368ca279601SBenjamin Gaignard tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, 369cdfbff78SBenjamin Gaignard TVO_IN_FMT_SIGNED); 370cdfbff78SBenjamin Gaignard sel_input_logic_inverted = true; 371cdfbff78SBenjamin Gaignard } 372cdfbff78SBenjamin Gaignard 373cdfbff78SBenjamin Gaignard /* input selection */ 374ca279601SBenjamin Gaignard tvout_vip_set_sel_input(tvout, TVO_VIP_HDMI, main_path, 375cdfbff78SBenjamin Gaignard sel_input_logic_inverted, STI_TVOUT_VIDEO_OUT_RGB); 376cdfbff78SBenjamin Gaignard } 377cdfbff78SBenjamin Gaignard 378cdfbff78SBenjamin Gaignard /** 379cdfbff78SBenjamin Gaignard * Start HDF VIP and HD DAC 380cdfbff78SBenjamin Gaignard * 381cdfbff78SBenjamin Gaignard * @tvout: pointer on tvout structure 382cdfbff78SBenjamin Gaignard * @main_path: true if main path has to be used in the vip configuration 383cdfbff78SBenjamin Gaignard * else aux path is used. 384cdfbff78SBenjamin Gaignard */ 385cdfbff78SBenjamin Gaignard static void tvout_hda_start(struct sti_tvout *tvout, bool main_path) 386cdfbff78SBenjamin Gaignard { 387cdfbff78SBenjamin Gaignard struct device_node *node = tvout->dev->of_node; 388cdfbff78SBenjamin Gaignard bool sel_input_logic_inverted = false; 389ca279601SBenjamin Gaignard u32 tvo_in_vid_format; 390ca279601SBenjamin Gaignard int val; 391cdfbff78SBenjamin Gaignard 392cdfbff78SBenjamin Gaignard dev_dbg(tvout->dev, "%s\n", __func__); 393cdfbff78SBenjamin Gaignard 394ca279601SBenjamin Gaignard if (main_path) { 395*503290ceSVincent Abriou DRM_DEBUG_DRIVER("main vip for HDF\n"); 396*503290ceSVincent Abriou /* Select the input sync for HD analog and HD DCS */ 397*503290ceSVincent Abriou val = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDDCS; 398*503290ceSVincent Abriou val = val << TVO_SYNC_HD_DCS_SHIFT; 399*503290ceSVincent Abriou val |= TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDF; 400ca279601SBenjamin Gaignard tvout_write(tvout, val, TVO_HD_SYNC_SEL); 401ca279601SBenjamin Gaignard tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT; 402ca279601SBenjamin Gaignard } else { 403*503290ceSVincent Abriou DRM_DEBUG_DRIVER("aux vip for HDF\n"); 404*503290ceSVincent Abriou /* Select the input sync for HD analog and HD DCS */ 405*503290ceSVincent Abriou val = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDDCS; 406*503290ceSVincent Abriou val = val << TVO_SYNC_HD_DCS_SHIFT; 407*503290ceSVincent Abriou val |= TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDF; 408ca279601SBenjamin Gaignard tvout_write(tvout, val, TVO_HD_SYNC_SEL); 409ca279601SBenjamin Gaignard tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT; 410cdfbff78SBenjamin Gaignard } 411cdfbff78SBenjamin Gaignard 412cdfbff78SBenjamin Gaignard /* set color channel order */ 413ca279601SBenjamin Gaignard tvout_vip_set_color_order(tvout, TVO_VIP_HDF, 414cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CR_R_SEL, 415cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_Y_G_SEL, 416cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CB_B_SEL); 417cdfbff78SBenjamin Gaignard 418ca279601SBenjamin Gaignard /* set clipping mode (EAV/SAV clipping) */ 419ca279601SBenjamin Gaignard tvout_vip_set_clip_mode(tvout, TVO_VIP_HDF, TVO_VIP_CLIP_EAV_SAV); 420cdfbff78SBenjamin Gaignard 421cdfbff78SBenjamin Gaignard /* set round mode (rounded to 10-bit per component) */ 422ca279601SBenjamin Gaignard tvout_vip_set_rnd(tvout, TVO_VIP_HDF, TVO_VIP_RND_10BIT_ROUNDED); 423cdfbff78SBenjamin Gaignard 424cdfbff78SBenjamin Gaignard if (of_device_is_compatible(node, "st,stih407-tvout")) { 425cdfbff78SBenjamin Gaignard /* set input video format */ 426ca279601SBenjamin Gaignard tvout_vip_set_in_vid_fmt(tvout, 427ca279601SBenjamin Gaignard tvo_in_vid_format, TVO_IN_FMT_SIGNED); 428cdfbff78SBenjamin Gaignard sel_input_logic_inverted = true; 429cdfbff78SBenjamin Gaignard } 430cdfbff78SBenjamin Gaignard 431cdfbff78SBenjamin Gaignard /* Input selection */ 432ca279601SBenjamin Gaignard tvout_vip_set_sel_input(tvout, TVO_VIP_HDF, main_path, 433cdfbff78SBenjamin Gaignard sel_input_logic_inverted, 434cdfbff78SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_YUV); 435cdfbff78SBenjamin Gaignard 436cdfbff78SBenjamin Gaignard /* power up HD DAC */ 437cdfbff78SBenjamin Gaignard tvout_write(tvout, 0, TVO_HD_DAC_CFG_OFF); 438cdfbff78SBenjamin Gaignard } 439cdfbff78SBenjamin Gaignard 440cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_dpms(struct drm_encoder *encoder, int mode) 441cdfbff78SBenjamin Gaignard { 442cdfbff78SBenjamin Gaignard } 443cdfbff78SBenjamin Gaignard 444cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder, 445cdfbff78SBenjamin Gaignard struct drm_display_mode *mode, 446cdfbff78SBenjamin Gaignard struct drm_display_mode *adjusted_mode) 447cdfbff78SBenjamin Gaignard { 448cdfbff78SBenjamin Gaignard } 449cdfbff78SBenjamin Gaignard 450cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_prepare(struct drm_encoder *encoder) 451cdfbff78SBenjamin Gaignard { 452cdfbff78SBenjamin Gaignard } 453cdfbff78SBenjamin Gaignard 454cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_destroy(struct drm_encoder *encoder) 455cdfbff78SBenjamin Gaignard { 456cdfbff78SBenjamin Gaignard struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder); 457cdfbff78SBenjamin Gaignard 458cdfbff78SBenjamin Gaignard drm_encoder_cleanup(encoder); 459cdfbff78SBenjamin Gaignard kfree(sti_encoder); 460cdfbff78SBenjamin Gaignard } 461cdfbff78SBenjamin Gaignard 462cdfbff78SBenjamin Gaignard static const struct drm_encoder_funcs sti_tvout_encoder_funcs = { 463cdfbff78SBenjamin Gaignard .destroy = sti_tvout_encoder_destroy, 464cdfbff78SBenjamin Gaignard }; 465cdfbff78SBenjamin Gaignard 466f32c4c50SBenjamin Gaignard static void sti_dvo_encoder_commit(struct drm_encoder *encoder) 467f32c4c50SBenjamin Gaignard { 468f32c4c50SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 469f32c4c50SBenjamin Gaignard 4709e1f05b2SVincent Abriou tvout_dvo_start(tvout, sti_crtc_is_main(encoder->crtc)); 471f32c4c50SBenjamin Gaignard } 472f32c4c50SBenjamin Gaignard 473f32c4c50SBenjamin Gaignard static void sti_dvo_encoder_disable(struct drm_encoder *encoder) 474f32c4c50SBenjamin Gaignard { 475f32c4c50SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 476f32c4c50SBenjamin Gaignard 477f32c4c50SBenjamin Gaignard /* Reset VIP register */ 478f32c4c50SBenjamin Gaignard tvout_write(tvout, 0x0, TVO_VIP_DVO); 479f32c4c50SBenjamin Gaignard } 480f32c4c50SBenjamin Gaignard 481f32c4c50SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_dvo_encoder_helper_funcs = { 482f32c4c50SBenjamin Gaignard .dpms = sti_tvout_encoder_dpms, 483f32c4c50SBenjamin Gaignard .mode_set = sti_tvout_encoder_mode_set, 484f32c4c50SBenjamin Gaignard .prepare = sti_tvout_encoder_prepare, 485f32c4c50SBenjamin Gaignard .commit = sti_dvo_encoder_commit, 486f32c4c50SBenjamin Gaignard .disable = sti_dvo_encoder_disable, 487f32c4c50SBenjamin Gaignard }; 488f32c4c50SBenjamin Gaignard 489f32c4c50SBenjamin Gaignard static struct drm_encoder * 490f32c4c50SBenjamin Gaignard sti_tvout_create_dvo_encoder(struct drm_device *dev, 491f32c4c50SBenjamin Gaignard struct sti_tvout *tvout) 492f32c4c50SBenjamin Gaignard { 493f32c4c50SBenjamin Gaignard struct sti_tvout_encoder *encoder; 494f32c4c50SBenjamin Gaignard struct drm_encoder *drm_encoder; 495f32c4c50SBenjamin Gaignard 496f32c4c50SBenjamin Gaignard encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL); 497f32c4c50SBenjamin Gaignard if (!encoder) 498f32c4c50SBenjamin Gaignard return NULL; 499f32c4c50SBenjamin Gaignard 500f32c4c50SBenjamin Gaignard encoder->tvout = tvout; 501f32c4c50SBenjamin Gaignard 502f32c4c50SBenjamin Gaignard drm_encoder = (struct drm_encoder *)encoder; 503f32c4c50SBenjamin Gaignard 504f32c4c50SBenjamin Gaignard drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; 505f32c4c50SBenjamin Gaignard drm_encoder->possible_clones = 1 << 0; 506f32c4c50SBenjamin Gaignard 507f32c4c50SBenjamin Gaignard drm_encoder_init(dev, drm_encoder, 50813a3d91fSVille Syrjälä &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS, 50913a3d91fSVille Syrjälä NULL); 510f32c4c50SBenjamin Gaignard 511f32c4c50SBenjamin Gaignard drm_encoder_helper_add(drm_encoder, &sti_dvo_encoder_helper_funcs); 512f32c4c50SBenjamin Gaignard 513f32c4c50SBenjamin Gaignard return drm_encoder; 514f32c4c50SBenjamin Gaignard } 515f32c4c50SBenjamin Gaignard 516cdfbff78SBenjamin Gaignard static void sti_hda_encoder_commit(struct drm_encoder *encoder) 517cdfbff78SBenjamin Gaignard { 518cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 519cdfbff78SBenjamin Gaignard 5209e1f05b2SVincent Abriou tvout_hda_start(tvout, sti_crtc_is_main(encoder->crtc)); 521cdfbff78SBenjamin Gaignard } 522cdfbff78SBenjamin Gaignard 523cdfbff78SBenjamin Gaignard static void sti_hda_encoder_disable(struct drm_encoder *encoder) 524cdfbff78SBenjamin Gaignard { 525cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 526cdfbff78SBenjamin Gaignard 527cdfbff78SBenjamin Gaignard /* reset VIP register */ 528cdfbff78SBenjamin Gaignard tvout_write(tvout, 0x0, TVO_VIP_HDF); 529cdfbff78SBenjamin Gaignard 530cdfbff78SBenjamin Gaignard /* power down HD DAC */ 531cdfbff78SBenjamin Gaignard tvout_write(tvout, 1, TVO_HD_DAC_CFG_OFF); 532cdfbff78SBenjamin Gaignard } 533cdfbff78SBenjamin Gaignard 534cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = { 535cdfbff78SBenjamin Gaignard .dpms = sti_tvout_encoder_dpms, 536cdfbff78SBenjamin Gaignard .mode_set = sti_tvout_encoder_mode_set, 537cdfbff78SBenjamin Gaignard .prepare = sti_tvout_encoder_prepare, 538cdfbff78SBenjamin Gaignard .commit = sti_hda_encoder_commit, 539cdfbff78SBenjamin Gaignard .disable = sti_hda_encoder_disable, 540cdfbff78SBenjamin Gaignard }; 541cdfbff78SBenjamin Gaignard 542cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev, 543cdfbff78SBenjamin Gaignard struct sti_tvout *tvout) 544cdfbff78SBenjamin Gaignard { 545cdfbff78SBenjamin Gaignard struct sti_tvout_encoder *encoder; 546cdfbff78SBenjamin Gaignard struct drm_encoder *drm_encoder; 547cdfbff78SBenjamin Gaignard 548cdfbff78SBenjamin Gaignard encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL); 549cdfbff78SBenjamin Gaignard if (!encoder) 550cdfbff78SBenjamin Gaignard return NULL; 551cdfbff78SBenjamin Gaignard 552cdfbff78SBenjamin Gaignard encoder->tvout = tvout; 553cdfbff78SBenjamin Gaignard 554cdfbff78SBenjamin Gaignard drm_encoder = (struct drm_encoder *) encoder; 555cdfbff78SBenjamin Gaignard 5565e03abc5SBenjamin Gaignard drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; 557cdfbff78SBenjamin Gaignard drm_encoder->possible_clones = 1 << 0; 558cdfbff78SBenjamin Gaignard 559cdfbff78SBenjamin Gaignard drm_encoder_init(dev, drm_encoder, 56013a3d91fSVille Syrjälä &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL); 561cdfbff78SBenjamin Gaignard 562cdfbff78SBenjamin Gaignard drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs); 563cdfbff78SBenjamin Gaignard 564cdfbff78SBenjamin Gaignard return drm_encoder; 565cdfbff78SBenjamin Gaignard } 566cdfbff78SBenjamin Gaignard 567cdfbff78SBenjamin Gaignard static void sti_hdmi_encoder_commit(struct drm_encoder *encoder) 568cdfbff78SBenjamin Gaignard { 569cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 570cdfbff78SBenjamin Gaignard 5719e1f05b2SVincent Abriou tvout_hdmi_start(tvout, sti_crtc_is_main(encoder->crtc)); 572cdfbff78SBenjamin Gaignard } 573cdfbff78SBenjamin Gaignard 574cdfbff78SBenjamin Gaignard static void sti_hdmi_encoder_disable(struct drm_encoder *encoder) 575cdfbff78SBenjamin Gaignard { 576cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 577cdfbff78SBenjamin Gaignard 578cdfbff78SBenjamin Gaignard /* reset VIP register */ 579cdfbff78SBenjamin Gaignard tvout_write(tvout, 0x0, TVO_VIP_HDMI); 580cdfbff78SBenjamin Gaignard } 581cdfbff78SBenjamin Gaignard 582cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = { 583cdfbff78SBenjamin Gaignard .dpms = sti_tvout_encoder_dpms, 584cdfbff78SBenjamin Gaignard .mode_set = sti_tvout_encoder_mode_set, 585cdfbff78SBenjamin Gaignard .prepare = sti_tvout_encoder_prepare, 586cdfbff78SBenjamin Gaignard .commit = sti_hdmi_encoder_commit, 587cdfbff78SBenjamin Gaignard .disable = sti_hdmi_encoder_disable, 588cdfbff78SBenjamin Gaignard }; 589cdfbff78SBenjamin Gaignard 590cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev, 591cdfbff78SBenjamin Gaignard struct sti_tvout *tvout) 592cdfbff78SBenjamin Gaignard { 593cdfbff78SBenjamin Gaignard struct sti_tvout_encoder *encoder; 594cdfbff78SBenjamin Gaignard struct drm_encoder *drm_encoder; 595cdfbff78SBenjamin Gaignard 596cdfbff78SBenjamin Gaignard encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL); 597cdfbff78SBenjamin Gaignard if (!encoder) 598cdfbff78SBenjamin Gaignard return NULL; 599cdfbff78SBenjamin Gaignard 600cdfbff78SBenjamin Gaignard encoder->tvout = tvout; 601cdfbff78SBenjamin Gaignard 602cdfbff78SBenjamin Gaignard drm_encoder = (struct drm_encoder *) encoder; 603cdfbff78SBenjamin Gaignard 6045e03abc5SBenjamin Gaignard drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; 605cdfbff78SBenjamin Gaignard drm_encoder->possible_clones = 1 << 1; 606cdfbff78SBenjamin Gaignard 607cdfbff78SBenjamin Gaignard drm_encoder_init(dev, drm_encoder, 60813a3d91fSVille Syrjälä &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS, NULL); 609cdfbff78SBenjamin Gaignard 610cdfbff78SBenjamin Gaignard drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs); 611cdfbff78SBenjamin Gaignard 612cdfbff78SBenjamin Gaignard return drm_encoder; 613cdfbff78SBenjamin Gaignard } 614cdfbff78SBenjamin Gaignard 615cdfbff78SBenjamin Gaignard static void sti_tvout_create_encoders(struct drm_device *dev, 616cdfbff78SBenjamin Gaignard struct sti_tvout *tvout) 617cdfbff78SBenjamin Gaignard { 618cdfbff78SBenjamin Gaignard tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout); 619cdfbff78SBenjamin Gaignard tvout->hda = sti_tvout_create_hda_encoder(dev, tvout); 620f32c4c50SBenjamin Gaignard tvout->dvo = sti_tvout_create_dvo_encoder(dev, tvout); 621cdfbff78SBenjamin Gaignard } 622cdfbff78SBenjamin Gaignard 623cdfbff78SBenjamin Gaignard static void sti_tvout_destroy_encoders(struct sti_tvout *tvout) 624cdfbff78SBenjamin Gaignard { 625cdfbff78SBenjamin Gaignard if (tvout->hdmi) 626cdfbff78SBenjamin Gaignard drm_encoder_cleanup(tvout->hdmi); 627cdfbff78SBenjamin Gaignard tvout->hdmi = NULL; 628cdfbff78SBenjamin Gaignard 629cdfbff78SBenjamin Gaignard if (tvout->hda) 630cdfbff78SBenjamin Gaignard drm_encoder_cleanup(tvout->hda); 631cdfbff78SBenjamin Gaignard tvout->hda = NULL; 632cdfbff78SBenjamin Gaignard } 633cdfbff78SBenjamin Gaignard 634cdfbff78SBenjamin Gaignard static int sti_tvout_bind(struct device *dev, struct device *master, void *data) 635cdfbff78SBenjamin Gaignard { 636cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = dev_get_drvdata(dev); 637cdfbff78SBenjamin Gaignard struct drm_device *drm_dev = data; 638cdfbff78SBenjamin Gaignard unsigned int i; 639cdfbff78SBenjamin Gaignard 640cdfbff78SBenjamin Gaignard tvout->drm_dev = drm_dev; 641cdfbff78SBenjamin Gaignard 642cdfbff78SBenjamin Gaignard /* set preformatter matrix */ 643cdfbff78SBenjamin Gaignard for (i = 0; i < 8; i++) { 644cdfbff78SBenjamin Gaignard tvout_write(tvout, rgb_to_ycbcr_601[i], 645cdfbff78SBenjamin Gaignard TVO_CSC_MAIN_M0 + (i * 4)); 646cdfbff78SBenjamin Gaignard tvout_write(tvout, rgb_to_ycbcr_601[i], 647cdfbff78SBenjamin Gaignard TVO_CSC_AUX_M0 + (i * 4)); 648cdfbff78SBenjamin Gaignard } 649cdfbff78SBenjamin Gaignard 650cdfbff78SBenjamin Gaignard sti_tvout_create_encoders(drm_dev, tvout); 651cdfbff78SBenjamin Gaignard 65253bdcf5fSBenjamin Gaignard return 0; 653cdfbff78SBenjamin Gaignard } 654cdfbff78SBenjamin Gaignard 655cdfbff78SBenjamin Gaignard static void sti_tvout_unbind(struct device *dev, struct device *master, 656cdfbff78SBenjamin Gaignard void *data) 657cdfbff78SBenjamin Gaignard { 65853bdcf5fSBenjamin Gaignard struct sti_tvout *tvout = dev_get_drvdata(dev); 65953bdcf5fSBenjamin Gaignard 66053bdcf5fSBenjamin Gaignard sti_tvout_destroy_encoders(tvout); 661cdfbff78SBenjamin Gaignard } 662cdfbff78SBenjamin Gaignard 663cdfbff78SBenjamin Gaignard static const struct component_ops sti_tvout_ops = { 664cdfbff78SBenjamin Gaignard .bind = sti_tvout_bind, 665cdfbff78SBenjamin Gaignard .unbind = sti_tvout_unbind, 666cdfbff78SBenjamin Gaignard }; 667cdfbff78SBenjamin Gaignard 668cdfbff78SBenjamin Gaignard static int sti_tvout_probe(struct platform_device *pdev) 669cdfbff78SBenjamin Gaignard { 670cdfbff78SBenjamin Gaignard struct device *dev = &pdev->dev; 671cdfbff78SBenjamin Gaignard struct device_node *node = dev->of_node; 672cdfbff78SBenjamin Gaignard struct sti_tvout *tvout; 673cdfbff78SBenjamin Gaignard struct resource *res; 674cdfbff78SBenjamin Gaignard 675cdfbff78SBenjamin Gaignard DRM_INFO("%s\n", __func__); 676cdfbff78SBenjamin Gaignard 677cdfbff78SBenjamin Gaignard if (!node) 678cdfbff78SBenjamin Gaignard return -ENODEV; 679cdfbff78SBenjamin Gaignard 680cdfbff78SBenjamin Gaignard tvout = devm_kzalloc(dev, sizeof(*tvout), GFP_KERNEL); 681cdfbff78SBenjamin Gaignard if (!tvout) 682cdfbff78SBenjamin Gaignard return -ENOMEM; 683cdfbff78SBenjamin Gaignard 684cdfbff78SBenjamin Gaignard tvout->dev = dev; 685cdfbff78SBenjamin Gaignard 686cdfbff78SBenjamin Gaignard /* get Memory ressources */ 687cdfbff78SBenjamin Gaignard res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tvout-reg"); 688cdfbff78SBenjamin Gaignard if (!res) { 689cdfbff78SBenjamin Gaignard DRM_ERROR("Invalid glue resource\n"); 690cdfbff78SBenjamin Gaignard return -ENOMEM; 691cdfbff78SBenjamin Gaignard } 692cdfbff78SBenjamin Gaignard tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); 69331f32a21SWei Yongjun if (!tvout->regs) 69431f32a21SWei Yongjun return -ENOMEM; 695cdfbff78SBenjamin Gaignard 696cdfbff78SBenjamin Gaignard /* get reset resources */ 697cdfbff78SBenjamin Gaignard tvout->reset = devm_reset_control_get(dev, "tvout"); 698cdfbff78SBenjamin Gaignard /* take tvout out of reset */ 699cdfbff78SBenjamin Gaignard if (!IS_ERR(tvout->reset)) 700cdfbff78SBenjamin Gaignard reset_control_deassert(tvout->reset); 701cdfbff78SBenjamin Gaignard 702cdfbff78SBenjamin Gaignard platform_set_drvdata(pdev, tvout); 703cdfbff78SBenjamin Gaignard 704cdfbff78SBenjamin Gaignard return component_add(dev, &sti_tvout_ops); 705cdfbff78SBenjamin Gaignard } 706cdfbff78SBenjamin Gaignard 707cdfbff78SBenjamin Gaignard static int sti_tvout_remove(struct platform_device *pdev) 708cdfbff78SBenjamin Gaignard { 709cdfbff78SBenjamin Gaignard component_del(&pdev->dev, &sti_tvout_ops); 710cdfbff78SBenjamin Gaignard return 0; 711cdfbff78SBenjamin Gaignard } 712cdfbff78SBenjamin Gaignard 7138e932cf0SKiran Padwal static const struct of_device_id tvout_of_match[] = { 714cdfbff78SBenjamin Gaignard { .compatible = "st,stih416-tvout", }, 715cdfbff78SBenjamin Gaignard { .compatible = "st,stih407-tvout", }, 716cdfbff78SBenjamin Gaignard { /* end node */ } 717cdfbff78SBenjamin Gaignard }; 718cdfbff78SBenjamin Gaignard MODULE_DEVICE_TABLE(of, tvout_of_match); 719cdfbff78SBenjamin Gaignard 720cdfbff78SBenjamin Gaignard struct platform_driver sti_tvout_driver = { 721cdfbff78SBenjamin Gaignard .driver = { 722cdfbff78SBenjamin Gaignard .name = "sti-tvout", 723cdfbff78SBenjamin Gaignard .owner = THIS_MODULE, 724cdfbff78SBenjamin Gaignard .of_match_table = tvout_of_match, 725cdfbff78SBenjamin Gaignard }, 726cdfbff78SBenjamin Gaignard .probe = sti_tvout_probe, 727cdfbff78SBenjamin Gaignard .remove = sti_tvout_remove, 728cdfbff78SBenjamin Gaignard }; 729cdfbff78SBenjamin Gaignard 730cdfbff78SBenjamin Gaignard MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 731cdfbff78SBenjamin Gaignard MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver"); 732cdfbff78SBenjamin Gaignard MODULE_LICENSE("GPL"); 733