1cdfbff78SBenjamin Gaignard /* 2cdfbff78SBenjamin Gaignard * Copyright (C) STMicroelectronics SA 2014 3cdfbff78SBenjamin Gaignard * Authors: Benjamin Gaignard <benjamin.gaignard@st.com> 4cdfbff78SBenjamin Gaignard * Vincent Abriou <vincent.abriou@st.com> 5cdfbff78SBenjamin Gaignard * for STMicroelectronics. 6cdfbff78SBenjamin Gaignard * License terms: GNU General Public License (GPL), version 2 7cdfbff78SBenjamin Gaignard */ 8cdfbff78SBenjamin Gaignard 9cdfbff78SBenjamin Gaignard #include <linux/clk.h> 10cdfbff78SBenjamin Gaignard #include <linux/component.h> 11cdfbff78SBenjamin Gaignard #include <linux/module.h> 12cdfbff78SBenjamin Gaignard #include <linux/of_platform.h> 13cdfbff78SBenjamin Gaignard #include <linux/platform_device.h> 14cdfbff78SBenjamin Gaignard #include <linux/reset.h> 15cdfbff78SBenjamin Gaignard 16cdfbff78SBenjamin Gaignard #include <drm/drmP.h> 17cdfbff78SBenjamin Gaignard #include <drm/drm_crtc_helper.h> 18cdfbff78SBenjamin Gaignard 199e1f05b2SVincent Abriou #include "sti_crtc.h" 205e03abc5SBenjamin Gaignard 21cdfbff78SBenjamin Gaignard /* glue registers */ 22cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M0 0x000 23cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M1 0x004 24cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M2 0x008 25cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M3 0x00c 26cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M4 0x010 27cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M5 0x014 28cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M6 0x018 29cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M7 0x01c 30cdfbff78SBenjamin Gaignard #define TVO_MAIN_IN_VID_FORMAT 0x030 31cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M0 0x100 32cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M1 0x104 33cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M2 0x108 34cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M3 0x10c 35cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M4 0x110 36cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M5 0x114 37cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M6 0x118 38cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M7 0x11c 39cdfbff78SBenjamin Gaignard #define TVO_AUX_IN_VID_FORMAT 0x130 40cdfbff78SBenjamin Gaignard #define TVO_VIP_HDF 0x400 41cdfbff78SBenjamin Gaignard #define TVO_HD_SYNC_SEL 0x418 42cdfbff78SBenjamin Gaignard #define TVO_HD_DAC_CFG_OFF 0x420 43cdfbff78SBenjamin Gaignard #define TVO_VIP_HDMI 0x500 44cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_0 0x504 45cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_1 0x508 46cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_B_CB 0x50c 47cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_Y_G 0x510 48cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_R_CR 0x514 49cdfbff78SBenjamin Gaignard #define TVO_HDMI_SYNC_SEL 0x518 50cdfbff78SBenjamin Gaignard #define TVO_HDMI_DFV_OBS 0x540 51f32c4c50SBenjamin Gaignard #define TVO_VIP_DVO 0x600 52f32c4c50SBenjamin Gaignard #define TVO_DVO_SYNC_SEL 0x618 53f32c4c50SBenjamin Gaignard #define TVO_DVO_CONFIG 0x620 54cdfbff78SBenjamin Gaignard 55cdfbff78SBenjamin Gaignard #define TVO_IN_FMT_SIGNED BIT(0) 56cdfbff78SBenjamin Gaignard #define TVO_SYNC_EXT BIT(4) 57cdfbff78SBenjamin Gaignard 58cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_R_SHIFT 24 59cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_G_SHIFT 20 60cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_B_SHIFT 16 61cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_MASK 0x3 62cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_Y_G_SEL 0 63cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CB_B_SEL 1 64cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CR_R_SEL 2 65cdfbff78SBenjamin Gaignard 66cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_SHIFT 8 67cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_MASK 0x7 68cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_DISABLED 0 69cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_EAV_SAV 1 70cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y 2 71cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_CB_CR 3 72cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_PROG_RANGE 4 73cdfbff78SBenjamin Gaignard 74cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_SHIFT 4 75cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_MASK 0x3 76cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_8BIT_ROUNDED 0 77cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_10BIT_ROUNDED 1 78cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_12BIT_ROUNDED 2 79cdfbff78SBenjamin Gaignard 80cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MASK 0xf 81cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MAIN 0x0 82cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_AUX 0x8 83cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_FORCE_COLOR 0xf 84cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASS_MASK 0x1 85cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASSED 1 86cdfbff78SBenjamin Gaignard 87cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_REF 0x00 88cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_1 0x01 89cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_2 0x02 90cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_3 0x03 91cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_4 0x04 92cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_5 0x05 93cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_6 0x06 94cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_REF 0x10 95cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_1 0x11 96cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_2 0x12 97cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_3 0x13 98cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_4 0x14 99cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_5 0x15 100cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_6 0x16 101cdfbff78SBenjamin Gaignard 102cdfbff78SBenjamin Gaignard #define TVO_SYNC_HD_DCS_SHIFT 8 103cdfbff78SBenjamin Gaignard 104f32c4c50SBenjamin Gaignard #define TVO_SYNC_DVO_PAD_HSYNC_SHIFT 8 105f32c4c50SBenjamin Gaignard #define TVO_SYNC_DVO_PAD_VSYNC_SHIFT 16 106f32c4c50SBenjamin Gaignard 1075e03abc5SBenjamin Gaignard #define ENCODER_CRTC_MASK (BIT(0) | BIT(1)) 108cdfbff78SBenjamin Gaignard 109cdfbff78SBenjamin Gaignard /* enum listing the supported output data format */ 110cdfbff78SBenjamin Gaignard enum sti_tvout_video_out_type { 111cdfbff78SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_RGB, 112cdfbff78SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_YUV, 113cdfbff78SBenjamin Gaignard }; 114cdfbff78SBenjamin Gaignard 115cdfbff78SBenjamin Gaignard struct sti_tvout { 116cdfbff78SBenjamin Gaignard struct device *dev; 117cdfbff78SBenjamin Gaignard struct drm_device *drm_dev; 118cdfbff78SBenjamin Gaignard void __iomem *regs; 119cdfbff78SBenjamin Gaignard struct reset_control *reset; 120cdfbff78SBenjamin Gaignard struct drm_encoder *hdmi; 121cdfbff78SBenjamin Gaignard struct drm_encoder *hda; 122f32c4c50SBenjamin Gaignard struct drm_encoder *dvo; 123cdfbff78SBenjamin Gaignard }; 124cdfbff78SBenjamin Gaignard 125cdfbff78SBenjamin Gaignard struct sti_tvout_encoder { 126cdfbff78SBenjamin Gaignard struct drm_encoder encoder; 127cdfbff78SBenjamin Gaignard struct sti_tvout *tvout; 128cdfbff78SBenjamin Gaignard }; 129cdfbff78SBenjamin Gaignard 130cdfbff78SBenjamin Gaignard #define to_sti_tvout_encoder(x) \ 131cdfbff78SBenjamin Gaignard container_of(x, struct sti_tvout_encoder, encoder) 132cdfbff78SBenjamin Gaignard 133cdfbff78SBenjamin Gaignard #define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout 134cdfbff78SBenjamin Gaignard 135cdfbff78SBenjamin Gaignard /* preformatter conversion matrix */ 136cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_601[8] = { 137cdfbff78SBenjamin Gaignard 0xF927082E, 0x04C9FEAB, 0x01D30964, 0xFA95FD3D, 138cdfbff78SBenjamin Gaignard 0x0000082E, 0x00002000, 0x00002000, 0x00000000 139cdfbff78SBenjamin Gaignard }; 140cdfbff78SBenjamin Gaignard 141cdfbff78SBenjamin Gaignard /* 709 RGB to YCbCr */ 142cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_709[8] = { 143cdfbff78SBenjamin Gaignard 0xF891082F, 0x0367FF40, 0x01280B71, 0xF9B1FE20, 144cdfbff78SBenjamin Gaignard 0x0000082F, 0x00002000, 0x00002000, 0x00000000 145cdfbff78SBenjamin Gaignard }; 146cdfbff78SBenjamin Gaignard 147cdfbff78SBenjamin Gaignard static u32 tvout_read(struct sti_tvout *tvout, int offset) 148cdfbff78SBenjamin Gaignard { 149cdfbff78SBenjamin Gaignard return readl(tvout->regs + offset); 150cdfbff78SBenjamin Gaignard } 151cdfbff78SBenjamin Gaignard 152cdfbff78SBenjamin Gaignard static void tvout_write(struct sti_tvout *tvout, u32 val, int offset) 153cdfbff78SBenjamin Gaignard { 154cdfbff78SBenjamin Gaignard writel(val, tvout->regs + offset); 155cdfbff78SBenjamin Gaignard } 156cdfbff78SBenjamin Gaignard 157cdfbff78SBenjamin Gaignard /** 158cdfbff78SBenjamin Gaignard * Set the clipping mode of a VIP 159cdfbff78SBenjamin Gaignard * 160cdfbff78SBenjamin Gaignard * @tvout: tvout structure 161ca279601SBenjamin Gaignard * @reg: register to set 162cdfbff78SBenjamin Gaignard * @cr_r: 163cdfbff78SBenjamin Gaignard * @y_g: 164cdfbff78SBenjamin Gaignard * @cb_b: 165cdfbff78SBenjamin Gaignard */ 166ca279601SBenjamin Gaignard static void tvout_vip_set_color_order(struct sti_tvout *tvout, int reg, 167cdfbff78SBenjamin Gaignard u32 cr_r, u32 y_g, u32 cb_b) 168cdfbff78SBenjamin Gaignard { 169ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 170cdfbff78SBenjamin Gaignard 171cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT); 172cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT); 173cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT); 174cdfbff78SBenjamin Gaignard val |= cr_r << TVO_VIP_REORDER_R_SHIFT; 175cdfbff78SBenjamin Gaignard val |= y_g << TVO_VIP_REORDER_G_SHIFT; 176cdfbff78SBenjamin Gaignard val |= cb_b << TVO_VIP_REORDER_B_SHIFT; 177cdfbff78SBenjamin Gaignard 178ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 179cdfbff78SBenjamin Gaignard } 180cdfbff78SBenjamin Gaignard 181cdfbff78SBenjamin Gaignard /** 182cdfbff78SBenjamin Gaignard * Set the clipping mode of a VIP 183cdfbff78SBenjamin Gaignard * 184cdfbff78SBenjamin Gaignard * @tvout: tvout structure 185ca279601SBenjamin Gaignard * @reg: register to set 186cdfbff78SBenjamin Gaignard * @range: clipping range 187cdfbff78SBenjamin Gaignard */ 188ca279601SBenjamin Gaignard static void tvout_vip_set_clip_mode(struct sti_tvout *tvout, int reg, u32 range) 189cdfbff78SBenjamin Gaignard { 190ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 191cdfbff78SBenjamin Gaignard 192cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT); 193cdfbff78SBenjamin Gaignard val |= range << TVO_VIP_CLIP_SHIFT; 194ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 195cdfbff78SBenjamin Gaignard } 196cdfbff78SBenjamin Gaignard 197cdfbff78SBenjamin Gaignard /** 198cdfbff78SBenjamin Gaignard * Set the rounded value of a VIP 199cdfbff78SBenjamin Gaignard * 200cdfbff78SBenjamin Gaignard * @tvout: tvout structure 201ca279601SBenjamin Gaignard * @reg: register to set 202cdfbff78SBenjamin Gaignard * @rnd: rounded val per component 203cdfbff78SBenjamin Gaignard */ 204ca279601SBenjamin Gaignard static void tvout_vip_set_rnd(struct sti_tvout *tvout, int reg, u32 rnd) 205cdfbff78SBenjamin Gaignard { 206ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 207cdfbff78SBenjamin Gaignard 208cdfbff78SBenjamin Gaignard val &= ~(TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT); 209cdfbff78SBenjamin Gaignard val |= rnd << TVO_VIP_RND_SHIFT; 210ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 211cdfbff78SBenjamin Gaignard } 212cdfbff78SBenjamin Gaignard 213cdfbff78SBenjamin Gaignard /** 214cdfbff78SBenjamin Gaignard * Select the VIP input 215cdfbff78SBenjamin Gaignard * 216cdfbff78SBenjamin Gaignard * @tvout: tvout structure 217ca279601SBenjamin Gaignard * @reg: register to set 218ca279601SBenjamin Gaignard * @main_path: main or auxiliary path 219ca279601SBenjamin Gaignard * @sel_input_logic_inverted: need to invert the logic 220cdfbff78SBenjamin Gaignard * @sel_input: selected_input (main/aux + conv) 221cdfbff78SBenjamin Gaignard */ 222cdfbff78SBenjamin Gaignard static void tvout_vip_set_sel_input(struct sti_tvout *tvout, 223ca279601SBenjamin Gaignard int reg, 224cdfbff78SBenjamin Gaignard bool main_path, 225cdfbff78SBenjamin Gaignard bool sel_input_logic_inverted, 226cdfbff78SBenjamin Gaignard enum sti_tvout_video_out_type video_out) 227cdfbff78SBenjamin Gaignard { 228cdfbff78SBenjamin Gaignard u32 sel_input; 229ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 230cdfbff78SBenjamin Gaignard 231cdfbff78SBenjamin Gaignard if (main_path) 232cdfbff78SBenjamin Gaignard sel_input = TVO_VIP_SEL_INPUT_MAIN; 233cdfbff78SBenjamin Gaignard else 234cdfbff78SBenjamin Gaignard sel_input = TVO_VIP_SEL_INPUT_AUX; 235cdfbff78SBenjamin Gaignard 236cdfbff78SBenjamin Gaignard switch (video_out) { 237cdfbff78SBenjamin Gaignard case STI_TVOUT_VIDEO_OUT_RGB: 238cdfbff78SBenjamin Gaignard sel_input |= TVO_VIP_SEL_INPUT_BYPASSED; 239cdfbff78SBenjamin Gaignard break; 240cdfbff78SBenjamin Gaignard case STI_TVOUT_VIDEO_OUT_YUV: 241cdfbff78SBenjamin Gaignard sel_input &= ~TVO_VIP_SEL_INPUT_BYPASSED; 242cdfbff78SBenjamin Gaignard break; 243cdfbff78SBenjamin Gaignard } 244cdfbff78SBenjamin Gaignard 245cdfbff78SBenjamin Gaignard /* on stih407 chip the sel_input bypass mode logic is inverted */ 246cdfbff78SBenjamin Gaignard if (sel_input_logic_inverted) 247cdfbff78SBenjamin Gaignard sel_input = sel_input ^ TVO_VIP_SEL_INPUT_BYPASS_MASK; 248cdfbff78SBenjamin Gaignard 249cdfbff78SBenjamin Gaignard val &= ~TVO_VIP_SEL_INPUT_MASK; 250cdfbff78SBenjamin Gaignard val |= sel_input; 251ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 252cdfbff78SBenjamin Gaignard } 253cdfbff78SBenjamin Gaignard 254cdfbff78SBenjamin Gaignard /** 255cdfbff78SBenjamin Gaignard * Select the input video signed or unsigned 256cdfbff78SBenjamin Gaignard * 257cdfbff78SBenjamin Gaignard * @tvout: tvout structure 258ca279601SBenjamin Gaignard * @reg: register to set 259cdfbff78SBenjamin Gaignard * @in_vid_signed: used video input format 260cdfbff78SBenjamin Gaignard */ 261ca279601SBenjamin Gaignard static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout, 262ca279601SBenjamin Gaignard int reg, u32 in_vid_fmt) 263cdfbff78SBenjamin Gaignard { 264ca279601SBenjamin Gaignard u32 val = tvout_read(tvout, reg); 265cdfbff78SBenjamin Gaignard 266cdfbff78SBenjamin Gaignard val &= ~TVO_IN_FMT_SIGNED; 267cdfbff78SBenjamin Gaignard val |= in_vid_fmt; 268ca279601SBenjamin Gaignard tvout_write(tvout, val, reg); 269cdfbff78SBenjamin Gaignard } 270cdfbff78SBenjamin Gaignard 271cdfbff78SBenjamin Gaignard /** 272f32c4c50SBenjamin Gaignard * Start VIP block for DVO output 273f32c4c50SBenjamin Gaignard * 274f32c4c50SBenjamin Gaignard * @tvout: pointer on tvout structure 275f32c4c50SBenjamin Gaignard * @main_path: true if main path has to be used in the vip configuration 276f32c4c50SBenjamin Gaignard * else aux path is used. 277f32c4c50SBenjamin Gaignard */ 278f32c4c50SBenjamin Gaignard static void tvout_dvo_start(struct sti_tvout *tvout, bool main_path) 279f32c4c50SBenjamin Gaignard { 280f32c4c50SBenjamin Gaignard struct device_node *node = tvout->dev->of_node; 281f32c4c50SBenjamin Gaignard bool sel_input_logic_inverted = false; 282f32c4c50SBenjamin Gaignard u32 tvo_in_vid_format; 283f32c4c50SBenjamin Gaignard int val; 284f32c4c50SBenjamin Gaignard 285f32c4c50SBenjamin Gaignard dev_dbg(tvout->dev, "%s\n", __func__); 286f32c4c50SBenjamin Gaignard 287f32c4c50SBenjamin Gaignard if (main_path) { 288f32c4c50SBenjamin Gaignard DRM_DEBUG_DRIVER("main vip for DVO\n"); 289f32c4c50SBenjamin Gaignard /* Select the input sync for dvo = VTG set 4 */ 290f32c4c50SBenjamin Gaignard val = TVO_SYNC_MAIN_VTG_SET_4 << TVO_SYNC_DVO_PAD_VSYNC_SHIFT; 291f32c4c50SBenjamin Gaignard val |= TVO_SYNC_MAIN_VTG_SET_4 << TVO_SYNC_DVO_PAD_HSYNC_SHIFT; 292f32c4c50SBenjamin Gaignard val |= TVO_SYNC_MAIN_VTG_SET_4; 293f32c4c50SBenjamin Gaignard tvout_write(tvout, val, TVO_DVO_SYNC_SEL); 294f32c4c50SBenjamin Gaignard tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT; 295f32c4c50SBenjamin Gaignard } else { 296f32c4c50SBenjamin Gaignard DRM_DEBUG_DRIVER("aux vip for DVO\n"); 297f32c4c50SBenjamin Gaignard /* Select the input sync for dvo = VTG set 4 */ 298f32c4c50SBenjamin Gaignard val = TVO_SYNC_AUX_VTG_SET_4 << TVO_SYNC_DVO_PAD_VSYNC_SHIFT; 299f32c4c50SBenjamin Gaignard val |= TVO_SYNC_AUX_VTG_SET_4 << TVO_SYNC_DVO_PAD_HSYNC_SHIFT; 300f32c4c50SBenjamin Gaignard val |= TVO_SYNC_AUX_VTG_SET_4; 301f32c4c50SBenjamin Gaignard tvout_write(tvout, val, TVO_DVO_SYNC_SEL); 302f32c4c50SBenjamin Gaignard tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT; 303f32c4c50SBenjamin Gaignard } 304f32c4c50SBenjamin Gaignard 305f32c4c50SBenjamin Gaignard /* Set color channel order */ 306f32c4c50SBenjamin Gaignard tvout_vip_set_color_order(tvout, TVO_VIP_DVO, 307f32c4c50SBenjamin Gaignard TVO_VIP_REORDER_CR_R_SEL, 308f32c4c50SBenjamin Gaignard TVO_VIP_REORDER_Y_G_SEL, 309f32c4c50SBenjamin Gaignard TVO_VIP_REORDER_CB_B_SEL); 310f32c4c50SBenjamin Gaignard 311f32c4c50SBenjamin Gaignard /* Set clipping mode (Limited range RGB/Y) */ 312f32c4c50SBenjamin Gaignard tvout_vip_set_clip_mode(tvout, TVO_VIP_DVO, 313f32c4c50SBenjamin Gaignard TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y); 314f32c4c50SBenjamin Gaignard 315f32c4c50SBenjamin Gaignard /* Set round mode (rounded to 8-bit per component) */ 316f32c4c50SBenjamin Gaignard tvout_vip_set_rnd(tvout, TVO_VIP_DVO, TVO_VIP_RND_8BIT_ROUNDED); 317f32c4c50SBenjamin Gaignard 318f32c4c50SBenjamin Gaignard if (of_device_is_compatible(node, "st,stih407-tvout")) { 319f32c4c50SBenjamin Gaignard /* Set input video format */ 320f32c4c50SBenjamin Gaignard tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, 321f32c4c50SBenjamin Gaignard TVO_IN_FMT_SIGNED); 322f32c4c50SBenjamin Gaignard sel_input_logic_inverted = true; 323f32c4c50SBenjamin Gaignard } 324f32c4c50SBenjamin Gaignard 325f32c4c50SBenjamin Gaignard /* Input selection */ 326f32c4c50SBenjamin Gaignard tvout_vip_set_sel_input(tvout, TVO_VIP_DVO, main_path, 327f32c4c50SBenjamin Gaignard sel_input_logic_inverted, 328f32c4c50SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_RGB); 329f32c4c50SBenjamin Gaignard } 330f32c4c50SBenjamin Gaignard 331f32c4c50SBenjamin Gaignard /** 332cdfbff78SBenjamin Gaignard * Start VIP block for HDMI output 333cdfbff78SBenjamin Gaignard * 334cdfbff78SBenjamin Gaignard * @tvout: pointer on tvout structure 335cdfbff78SBenjamin Gaignard * @main_path: true if main path has to be used in the vip configuration 336cdfbff78SBenjamin Gaignard * else aux path is used. 337cdfbff78SBenjamin Gaignard */ 338cdfbff78SBenjamin Gaignard static void tvout_hdmi_start(struct sti_tvout *tvout, bool main_path) 339cdfbff78SBenjamin Gaignard { 340cdfbff78SBenjamin Gaignard struct device_node *node = tvout->dev->of_node; 341cdfbff78SBenjamin Gaignard bool sel_input_logic_inverted = false; 342ca279601SBenjamin Gaignard u32 tvo_in_vid_format; 343cdfbff78SBenjamin Gaignard 344cdfbff78SBenjamin Gaignard dev_dbg(tvout->dev, "%s\n", __func__); 345cdfbff78SBenjamin Gaignard 346cdfbff78SBenjamin Gaignard if (main_path) { 347cdfbff78SBenjamin Gaignard DRM_DEBUG_DRIVER("main vip for hdmi\n"); 348cdfbff78SBenjamin Gaignard /* select the input sync for hdmi = VTG set 1 */ 349cdfbff78SBenjamin Gaignard tvout_write(tvout, TVO_SYNC_MAIN_VTG_SET_1, TVO_HDMI_SYNC_SEL); 350ca279601SBenjamin Gaignard tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT; 351cdfbff78SBenjamin Gaignard } else { 352cdfbff78SBenjamin Gaignard DRM_DEBUG_DRIVER("aux vip for hdmi\n"); 353cdfbff78SBenjamin Gaignard /* select the input sync for hdmi = VTG set 1 */ 354cdfbff78SBenjamin Gaignard tvout_write(tvout, TVO_SYNC_AUX_VTG_SET_1, TVO_HDMI_SYNC_SEL); 355ca279601SBenjamin Gaignard tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT; 356cdfbff78SBenjamin Gaignard } 357cdfbff78SBenjamin Gaignard 358cdfbff78SBenjamin Gaignard /* set color channel order */ 359ca279601SBenjamin Gaignard tvout_vip_set_color_order(tvout, TVO_VIP_HDMI, 360cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CR_R_SEL, 361cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_Y_G_SEL, 362cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CB_B_SEL); 363cdfbff78SBenjamin Gaignard 364cdfbff78SBenjamin Gaignard /* set clipping mode (Limited range RGB/Y) */ 365ca279601SBenjamin Gaignard tvout_vip_set_clip_mode(tvout, TVO_VIP_HDMI, 366ca279601SBenjamin Gaignard TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y); 367cdfbff78SBenjamin Gaignard 368cdfbff78SBenjamin Gaignard /* set round mode (rounded to 8-bit per component) */ 369ca279601SBenjamin Gaignard tvout_vip_set_rnd(tvout, TVO_VIP_HDMI, TVO_VIP_RND_8BIT_ROUNDED); 370cdfbff78SBenjamin Gaignard 371cdfbff78SBenjamin Gaignard if (of_device_is_compatible(node, "st,stih407-tvout")) { 372cdfbff78SBenjamin Gaignard /* set input video format */ 373ca279601SBenjamin Gaignard tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, 374cdfbff78SBenjamin Gaignard TVO_IN_FMT_SIGNED); 375cdfbff78SBenjamin Gaignard sel_input_logic_inverted = true; 376cdfbff78SBenjamin Gaignard } 377cdfbff78SBenjamin Gaignard 378cdfbff78SBenjamin Gaignard /* input selection */ 379ca279601SBenjamin Gaignard tvout_vip_set_sel_input(tvout, TVO_VIP_HDMI, main_path, 380cdfbff78SBenjamin Gaignard sel_input_logic_inverted, STI_TVOUT_VIDEO_OUT_RGB); 381cdfbff78SBenjamin Gaignard } 382cdfbff78SBenjamin Gaignard 383cdfbff78SBenjamin Gaignard /** 384cdfbff78SBenjamin Gaignard * Start HDF VIP and HD DAC 385cdfbff78SBenjamin Gaignard * 386cdfbff78SBenjamin Gaignard * @tvout: pointer on tvout structure 387cdfbff78SBenjamin Gaignard * @main_path: true if main path has to be used in the vip configuration 388cdfbff78SBenjamin Gaignard * else aux path is used. 389cdfbff78SBenjamin Gaignard */ 390cdfbff78SBenjamin Gaignard static void tvout_hda_start(struct sti_tvout *tvout, bool main_path) 391cdfbff78SBenjamin Gaignard { 392cdfbff78SBenjamin Gaignard struct device_node *node = tvout->dev->of_node; 393cdfbff78SBenjamin Gaignard bool sel_input_logic_inverted = false; 394ca279601SBenjamin Gaignard u32 tvo_in_vid_format; 395ca279601SBenjamin Gaignard int val; 396cdfbff78SBenjamin Gaignard 397cdfbff78SBenjamin Gaignard dev_dbg(tvout->dev, "%s\n", __func__); 398cdfbff78SBenjamin Gaignard 399ca279601SBenjamin Gaignard if (main_path) { 400ca279601SBenjamin Gaignard val = TVO_SYNC_MAIN_VTG_SET_2 << TVO_SYNC_HD_DCS_SHIFT; 401ca279601SBenjamin Gaignard val |= TVO_SYNC_MAIN_VTG_SET_3; 402ca279601SBenjamin Gaignard tvout_write(tvout, val, TVO_HD_SYNC_SEL); 403ca279601SBenjamin Gaignard tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT; 404ca279601SBenjamin Gaignard } else { 405ca279601SBenjamin Gaignard val = TVO_SYNC_AUX_VTG_SET_2 << TVO_SYNC_HD_DCS_SHIFT; 406ca279601SBenjamin Gaignard val |= TVO_SYNC_AUX_VTG_SET_3; 407ca279601SBenjamin Gaignard tvout_write(tvout, val, TVO_HD_SYNC_SEL); 408ca279601SBenjamin Gaignard tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT; 409cdfbff78SBenjamin Gaignard } 410cdfbff78SBenjamin Gaignard 411cdfbff78SBenjamin Gaignard /* set color channel order */ 412ca279601SBenjamin Gaignard tvout_vip_set_color_order(tvout, TVO_VIP_HDF, 413cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CR_R_SEL, 414cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_Y_G_SEL, 415cdfbff78SBenjamin Gaignard TVO_VIP_REORDER_CB_B_SEL); 416cdfbff78SBenjamin Gaignard 417ca279601SBenjamin Gaignard /* set clipping mode (EAV/SAV clipping) */ 418ca279601SBenjamin Gaignard tvout_vip_set_clip_mode(tvout, TVO_VIP_HDF, TVO_VIP_CLIP_EAV_SAV); 419cdfbff78SBenjamin Gaignard 420cdfbff78SBenjamin Gaignard /* set round mode (rounded to 10-bit per component) */ 421ca279601SBenjamin Gaignard tvout_vip_set_rnd(tvout, TVO_VIP_HDF, TVO_VIP_RND_10BIT_ROUNDED); 422cdfbff78SBenjamin Gaignard 423cdfbff78SBenjamin Gaignard if (of_device_is_compatible(node, "st,stih407-tvout")) { 424cdfbff78SBenjamin Gaignard /* set input video format */ 425ca279601SBenjamin Gaignard tvout_vip_set_in_vid_fmt(tvout, 426ca279601SBenjamin Gaignard tvo_in_vid_format, TVO_IN_FMT_SIGNED); 427cdfbff78SBenjamin Gaignard sel_input_logic_inverted = true; 428cdfbff78SBenjamin Gaignard } 429cdfbff78SBenjamin Gaignard 430cdfbff78SBenjamin Gaignard /* Input selection */ 431ca279601SBenjamin Gaignard tvout_vip_set_sel_input(tvout, TVO_VIP_HDF, main_path, 432cdfbff78SBenjamin Gaignard sel_input_logic_inverted, 433cdfbff78SBenjamin Gaignard STI_TVOUT_VIDEO_OUT_YUV); 434cdfbff78SBenjamin Gaignard 435cdfbff78SBenjamin Gaignard /* power up HD DAC */ 436cdfbff78SBenjamin Gaignard tvout_write(tvout, 0, TVO_HD_DAC_CFG_OFF); 437cdfbff78SBenjamin Gaignard } 438cdfbff78SBenjamin Gaignard 439cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_dpms(struct drm_encoder *encoder, int mode) 440cdfbff78SBenjamin Gaignard { 441cdfbff78SBenjamin Gaignard } 442cdfbff78SBenjamin Gaignard 443cdfbff78SBenjamin Gaignard static bool sti_tvout_encoder_mode_fixup(struct drm_encoder *encoder, 444cdfbff78SBenjamin Gaignard const struct drm_display_mode *mode, 445cdfbff78SBenjamin Gaignard struct drm_display_mode *adjusted_mode) 446cdfbff78SBenjamin Gaignard { 447cdfbff78SBenjamin Gaignard return true; 448cdfbff78SBenjamin Gaignard } 449cdfbff78SBenjamin Gaignard 450cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder, 451cdfbff78SBenjamin Gaignard struct drm_display_mode *mode, 452cdfbff78SBenjamin Gaignard struct drm_display_mode *adjusted_mode) 453cdfbff78SBenjamin Gaignard { 454cdfbff78SBenjamin Gaignard } 455cdfbff78SBenjamin Gaignard 456cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_prepare(struct drm_encoder *encoder) 457cdfbff78SBenjamin Gaignard { 458cdfbff78SBenjamin Gaignard } 459cdfbff78SBenjamin Gaignard 460cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_destroy(struct drm_encoder *encoder) 461cdfbff78SBenjamin Gaignard { 462cdfbff78SBenjamin Gaignard struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder); 463cdfbff78SBenjamin Gaignard 464cdfbff78SBenjamin Gaignard drm_encoder_cleanup(encoder); 465cdfbff78SBenjamin Gaignard kfree(sti_encoder); 466cdfbff78SBenjamin Gaignard } 467cdfbff78SBenjamin Gaignard 468cdfbff78SBenjamin Gaignard static const struct drm_encoder_funcs sti_tvout_encoder_funcs = { 469cdfbff78SBenjamin Gaignard .destroy = sti_tvout_encoder_destroy, 470cdfbff78SBenjamin Gaignard }; 471cdfbff78SBenjamin Gaignard 472f32c4c50SBenjamin Gaignard static void sti_dvo_encoder_commit(struct drm_encoder *encoder) 473f32c4c50SBenjamin Gaignard { 474f32c4c50SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 475f32c4c50SBenjamin Gaignard 4769e1f05b2SVincent Abriou tvout_dvo_start(tvout, sti_crtc_is_main(encoder->crtc)); 477f32c4c50SBenjamin Gaignard } 478f32c4c50SBenjamin Gaignard 479f32c4c50SBenjamin Gaignard static void sti_dvo_encoder_disable(struct drm_encoder *encoder) 480f32c4c50SBenjamin Gaignard { 481f32c4c50SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 482f32c4c50SBenjamin Gaignard 483f32c4c50SBenjamin Gaignard /* Reset VIP register */ 484f32c4c50SBenjamin Gaignard tvout_write(tvout, 0x0, TVO_VIP_DVO); 485f32c4c50SBenjamin Gaignard } 486f32c4c50SBenjamin Gaignard 487f32c4c50SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_dvo_encoder_helper_funcs = { 488f32c4c50SBenjamin Gaignard .dpms = sti_tvout_encoder_dpms, 489f32c4c50SBenjamin Gaignard .mode_fixup = sti_tvout_encoder_mode_fixup, 490f32c4c50SBenjamin Gaignard .mode_set = sti_tvout_encoder_mode_set, 491f32c4c50SBenjamin Gaignard .prepare = sti_tvout_encoder_prepare, 492f32c4c50SBenjamin Gaignard .commit = sti_dvo_encoder_commit, 493f32c4c50SBenjamin Gaignard .disable = sti_dvo_encoder_disable, 494f32c4c50SBenjamin Gaignard }; 495f32c4c50SBenjamin Gaignard 496f32c4c50SBenjamin Gaignard static struct drm_encoder * 497f32c4c50SBenjamin Gaignard sti_tvout_create_dvo_encoder(struct drm_device *dev, 498f32c4c50SBenjamin Gaignard struct sti_tvout *tvout) 499f32c4c50SBenjamin Gaignard { 500f32c4c50SBenjamin Gaignard struct sti_tvout_encoder *encoder; 501f32c4c50SBenjamin Gaignard struct drm_encoder *drm_encoder; 502f32c4c50SBenjamin Gaignard 503f32c4c50SBenjamin Gaignard encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL); 504f32c4c50SBenjamin Gaignard if (!encoder) 505f32c4c50SBenjamin Gaignard return NULL; 506f32c4c50SBenjamin Gaignard 507f32c4c50SBenjamin Gaignard encoder->tvout = tvout; 508f32c4c50SBenjamin Gaignard 509f32c4c50SBenjamin Gaignard drm_encoder = (struct drm_encoder *)encoder; 510f32c4c50SBenjamin Gaignard 511f32c4c50SBenjamin Gaignard drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; 512f32c4c50SBenjamin Gaignard drm_encoder->possible_clones = 1 << 0; 513f32c4c50SBenjamin Gaignard 514f32c4c50SBenjamin Gaignard drm_encoder_init(dev, drm_encoder, 515*13a3d91fSVille Syrjälä &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS, 516*13a3d91fSVille Syrjälä NULL); 517f32c4c50SBenjamin Gaignard 518f32c4c50SBenjamin Gaignard drm_encoder_helper_add(drm_encoder, &sti_dvo_encoder_helper_funcs); 519f32c4c50SBenjamin Gaignard 520f32c4c50SBenjamin Gaignard return drm_encoder; 521f32c4c50SBenjamin Gaignard } 522f32c4c50SBenjamin Gaignard 523cdfbff78SBenjamin Gaignard static void sti_hda_encoder_commit(struct drm_encoder *encoder) 524cdfbff78SBenjamin Gaignard { 525cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 526cdfbff78SBenjamin Gaignard 5279e1f05b2SVincent Abriou tvout_hda_start(tvout, sti_crtc_is_main(encoder->crtc)); 528cdfbff78SBenjamin Gaignard } 529cdfbff78SBenjamin Gaignard 530cdfbff78SBenjamin Gaignard static void sti_hda_encoder_disable(struct drm_encoder *encoder) 531cdfbff78SBenjamin Gaignard { 532cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 533cdfbff78SBenjamin Gaignard 534cdfbff78SBenjamin Gaignard /* reset VIP register */ 535cdfbff78SBenjamin Gaignard tvout_write(tvout, 0x0, TVO_VIP_HDF); 536cdfbff78SBenjamin Gaignard 537cdfbff78SBenjamin Gaignard /* power down HD DAC */ 538cdfbff78SBenjamin Gaignard tvout_write(tvout, 1, TVO_HD_DAC_CFG_OFF); 539cdfbff78SBenjamin Gaignard } 540cdfbff78SBenjamin Gaignard 541cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = { 542cdfbff78SBenjamin Gaignard .dpms = sti_tvout_encoder_dpms, 543cdfbff78SBenjamin Gaignard .mode_fixup = sti_tvout_encoder_mode_fixup, 544cdfbff78SBenjamin Gaignard .mode_set = sti_tvout_encoder_mode_set, 545cdfbff78SBenjamin Gaignard .prepare = sti_tvout_encoder_prepare, 546cdfbff78SBenjamin Gaignard .commit = sti_hda_encoder_commit, 547cdfbff78SBenjamin Gaignard .disable = sti_hda_encoder_disable, 548cdfbff78SBenjamin Gaignard }; 549cdfbff78SBenjamin Gaignard 550cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev, 551cdfbff78SBenjamin Gaignard struct sti_tvout *tvout) 552cdfbff78SBenjamin Gaignard { 553cdfbff78SBenjamin Gaignard struct sti_tvout_encoder *encoder; 554cdfbff78SBenjamin Gaignard struct drm_encoder *drm_encoder; 555cdfbff78SBenjamin Gaignard 556cdfbff78SBenjamin Gaignard encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL); 557cdfbff78SBenjamin Gaignard if (!encoder) 558cdfbff78SBenjamin Gaignard return NULL; 559cdfbff78SBenjamin Gaignard 560cdfbff78SBenjamin Gaignard encoder->tvout = tvout; 561cdfbff78SBenjamin Gaignard 562cdfbff78SBenjamin Gaignard drm_encoder = (struct drm_encoder *) encoder; 563cdfbff78SBenjamin Gaignard 5645e03abc5SBenjamin Gaignard drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; 565cdfbff78SBenjamin Gaignard drm_encoder->possible_clones = 1 << 0; 566cdfbff78SBenjamin Gaignard 567cdfbff78SBenjamin Gaignard drm_encoder_init(dev, drm_encoder, 568*13a3d91fSVille Syrjälä &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL); 569cdfbff78SBenjamin Gaignard 570cdfbff78SBenjamin Gaignard drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs); 571cdfbff78SBenjamin Gaignard 572cdfbff78SBenjamin Gaignard return drm_encoder; 573cdfbff78SBenjamin Gaignard } 574cdfbff78SBenjamin Gaignard 575cdfbff78SBenjamin Gaignard static void sti_hdmi_encoder_commit(struct drm_encoder *encoder) 576cdfbff78SBenjamin Gaignard { 577cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 578cdfbff78SBenjamin Gaignard 5799e1f05b2SVincent Abriou tvout_hdmi_start(tvout, sti_crtc_is_main(encoder->crtc)); 580cdfbff78SBenjamin Gaignard } 581cdfbff78SBenjamin Gaignard 582cdfbff78SBenjamin Gaignard static void sti_hdmi_encoder_disable(struct drm_encoder *encoder) 583cdfbff78SBenjamin Gaignard { 584cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = to_sti_tvout(encoder); 585cdfbff78SBenjamin Gaignard 586cdfbff78SBenjamin Gaignard /* reset VIP register */ 587cdfbff78SBenjamin Gaignard tvout_write(tvout, 0x0, TVO_VIP_HDMI); 588cdfbff78SBenjamin Gaignard } 589cdfbff78SBenjamin Gaignard 590cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = { 591cdfbff78SBenjamin Gaignard .dpms = sti_tvout_encoder_dpms, 592cdfbff78SBenjamin Gaignard .mode_fixup = sti_tvout_encoder_mode_fixup, 593cdfbff78SBenjamin Gaignard .mode_set = sti_tvout_encoder_mode_set, 594cdfbff78SBenjamin Gaignard .prepare = sti_tvout_encoder_prepare, 595cdfbff78SBenjamin Gaignard .commit = sti_hdmi_encoder_commit, 596cdfbff78SBenjamin Gaignard .disable = sti_hdmi_encoder_disable, 597cdfbff78SBenjamin Gaignard }; 598cdfbff78SBenjamin Gaignard 599cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev, 600cdfbff78SBenjamin Gaignard struct sti_tvout *tvout) 601cdfbff78SBenjamin Gaignard { 602cdfbff78SBenjamin Gaignard struct sti_tvout_encoder *encoder; 603cdfbff78SBenjamin Gaignard struct drm_encoder *drm_encoder; 604cdfbff78SBenjamin Gaignard 605cdfbff78SBenjamin Gaignard encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL); 606cdfbff78SBenjamin Gaignard if (!encoder) 607cdfbff78SBenjamin Gaignard return NULL; 608cdfbff78SBenjamin Gaignard 609cdfbff78SBenjamin Gaignard encoder->tvout = tvout; 610cdfbff78SBenjamin Gaignard 611cdfbff78SBenjamin Gaignard drm_encoder = (struct drm_encoder *) encoder; 612cdfbff78SBenjamin Gaignard 6135e03abc5SBenjamin Gaignard drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; 614cdfbff78SBenjamin Gaignard drm_encoder->possible_clones = 1 << 1; 615cdfbff78SBenjamin Gaignard 616cdfbff78SBenjamin Gaignard drm_encoder_init(dev, drm_encoder, 617*13a3d91fSVille Syrjälä &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS, NULL); 618cdfbff78SBenjamin Gaignard 619cdfbff78SBenjamin Gaignard drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs); 620cdfbff78SBenjamin Gaignard 621cdfbff78SBenjamin Gaignard return drm_encoder; 622cdfbff78SBenjamin Gaignard } 623cdfbff78SBenjamin Gaignard 624cdfbff78SBenjamin Gaignard static void sti_tvout_create_encoders(struct drm_device *dev, 625cdfbff78SBenjamin Gaignard struct sti_tvout *tvout) 626cdfbff78SBenjamin Gaignard { 627cdfbff78SBenjamin Gaignard tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout); 628cdfbff78SBenjamin Gaignard tvout->hda = sti_tvout_create_hda_encoder(dev, tvout); 629f32c4c50SBenjamin Gaignard tvout->dvo = sti_tvout_create_dvo_encoder(dev, tvout); 630cdfbff78SBenjamin Gaignard } 631cdfbff78SBenjamin Gaignard 632cdfbff78SBenjamin Gaignard static void sti_tvout_destroy_encoders(struct sti_tvout *tvout) 633cdfbff78SBenjamin Gaignard { 634cdfbff78SBenjamin Gaignard if (tvout->hdmi) 635cdfbff78SBenjamin Gaignard drm_encoder_cleanup(tvout->hdmi); 636cdfbff78SBenjamin Gaignard tvout->hdmi = NULL; 637cdfbff78SBenjamin Gaignard 638cdfbff78SBenjamin Gaignard if (tvout->hda) 639cdfbff78SBenjamin Gaignard drm_encoder_cleanup(tvout->hda); 640cdfbff78SBenjamin Gaignard tvout->hda = NULL; 641cdfbff78SBenjamin Gaignard } 642cdfbff78SBenjamin Gaignard 643cdfbff78SBenjamin Gaignard static int sti_tvout_bind(struct device *dev, struct device *master, void *data) 644cdfbff78SBenjamin Gaignard { 645cdfbff78SBenjamin Gaignard struct sti_tvout *tvout = dev_get_drvdata(dev); 646cdfbff78SBenjamin Gaignard struct drm_device *drm_dev = data; 647cdfbff78SBenjamin Gaignard unsigned int i; 648cdfbff78SBenjamin Gaignard 649cdfbff78SBenjamin Gaignard tvout->drm_dev = drm_dev; 650cdfbff78SBenjamin Gaignard 651cdfbff78SBenjamin Gaignard /* set preformatter matrix */ 652cdfbff78SBenjamin Gaignard for (i = 0; i < 8; i++) { 653cdfbff78SBenjamin Gaignard tvout_write(tvout, rgb_to_ycbcr_601[i], 654cdfbff78SBenjamin Gaignard TVO_CSC_MAIN_M0 + (i * 4)); 655cdfbff78SBenjamin Gaignard tvout_write(tvout, rgb_to_ycbcr_601[i], 656cdfbff78SBenjamin Gaignard TVO_CSC_AUX_M0 + (i * 4)); 657cdfbff78SBenjamin Gaignard } 658cdfbff78SBenjamin Gaignard 659cdfbff78SBenjamin Gaignard sti_tvout_create_encoders(drm_dev, tvout); 660cdfbff78SBenjamin Gaignard 66153bdcf5fSBenjamin Gaignard return 0; 662cdfbff78SBenjamin Gaignard } 663cdfbff78SBenjamin Gaignard 664cdfbff78SBenjamin Gaignard static void sti_tvout_unbind(struct device *dev, struct device *master, 665cdfbff78SBenjamin Gaignard void *data) 666cdfbff78SBenjamin Gaignard { 66753bdcf5fSBenjamin Gaignard struct sti_tvout *tvout = dev_get_drvdata(dev); 66853bdcf5fSBenjamin Gaignard 66953bdcf5fSBenjamin Gaignard sti_tvout_destroy_encoders(tvout); 670cdfbff78SBenjamin Gaignard } 671cdfbff78SBenjamin Gaignard 672cdfbff78SBenjamin Gaignard static const struct component_ops sti_tvout_ops = { 673cdfbff78SBenjamin Gaignard .bind = sti_tvout_bind, 674cdfbff78SBenjamin Gaignard .unbind = sti_tvout_unbind, 675cdfbff78SBenjamin Gaignard }; 676cdfbff78SBenjamin Gaignard 677cdfbff78SBenjamin Gaignard static int sti_tvout_probe(struct platform_device *pdev) 678cdfbff78SBenjamin Gaignard { 679cdfbff78SBenjamin Gaignard struct device *dev = &pdev->dev; 680cdfbff78SBenjamin Gaignard struct device_node *node = dev->of_node; 681cdfbff78SBenjamin Gaignard struct sti_tvout *tvout; 682cdfbff78SBenjamin Gaignard struct resource *res; 683cdfbff78SBenjamin Gaignard 684cdfbff78SBenjamin Gaignard DRM_INFO("%s\n", __func__); 685cdfbff78SBenjamin Gaignard 686cdfbff78SBenjamin Gaignard if (!node) 687cdfbff78SBenjamin Gaignard return -ENODEV; 688cdfbff78SBenjamin Gaignard 689cdfbff78SBenjamin Gaignard tvout = devm_kzalloc(dev, sizeof(*tvout), GFP_KERNEL); 690cdfbff78SBenjamin Gaignard if (!tvout) 691cdfbff78SBenjamin Gaignard return -ENOMEM; 692cdfbff78SBenjamin Gaignard 693cdfbff78SBenjamin Gaignard tvout->dev = dev; 694cdfbff78SBenjamin Gaignard 695cdfbff78SBenjamin Gaignard /* get Memory ressources */ 696cdfbff78SBenjamin Gaignard res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tvout-reg"); 697cdfbff78SBenjamin Gaignard if (!res) { 698cdfbff78SBenjamin Gaignard DRM_ERROR("Invalid glue resource\n"); 699cdfbff78SBenjamin Gaignard return -ENOMEM; 700cdfbff78SBenjamin Gaignard } 701cdfbff78SBenjamin Gaignard tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); 70231f32a21SWei Yongjun if (!tvout->regs) 70331f32a21SWei Yongjun return -ENOMEM; 704cdfbff78SBenjamin Gaignard 705cdfbff78SBenjamin Gaignard /* get reset resources */ 706cdfbff78SBenjamin Gaignard tvout->reset = devm_reset_control_get(dev, "tvout"); 707cdfbff78SBenjamin Gaignard /* take tvout out of reset */ 708cdfbff78SBenjamin Gaignard if (!IS_ERR(tvout->reset)) 709cdfbff78SBenjamin Gaignard reset_control_deassert(tvout->reset); 710cdfbff78SBenjamin Gaignard 711cdfbff78SBenjamin Gaignard platform_set_drvdata(pdev, tvout); 712cdfbff78SBenjamin Gaignard 713cdfbff78SBenjamin Gaignard return component_add(dev, &sti_tvout_ops); 714cdfbff78SBenjamin Gaignard } 715cdfbff78SBenjamin Gaignard 716cdfbff78SBenjamin Gaignard static int sti_tvout_remove(struct platform_device *pdev) 717cdfbff78SBenjamin Gaignard { 718cdfbff78SBenjamin Gaignard component_del(&pdev->dev, &sti_tvout_ops); 719cdfbff78SBenjamin Gaignard return 0; 720cdfbff78SBenjamin Gaignard } 721cdfbff78SBenjamin Gaignard 7228e932cf0SKiran Padwal static const struct of_device_id tvout_of_match[] = { 723cdfbff78SBenjamin Gaignard { .compatible = "st,stih416-tvout", }, 724cdfbff78SBenjamin Gaignard { .compatible = "st,stih407-tvout", }, 725cdfbff78SBenjamin Gaignard { /* end node */ } 726cdfbff78SBenjamin Gaignard }; 727cdfbff78SBenjamin Gaignard MODULE_DEVICE_TABLE(of, tvout_of_match); 728cdfbff78SBenjamin Gaignard 729cdfbff78SBenjamin Gaignard struct platform_driver sti_tvout_driver = { 730cdfbff78SBenjamin Gaignard .driver = { 731cdfbff78SBenjamin Gaignard .name = "sti-tvout", 732cdfbff78SBenjamin Gaignard .owner = THIS_MODULE, 733cdfbff78SBenjamin Gaignard .of_match_table = tvout_of_match, 734cdfbff78SBenjamin Gaignard }, 735cdfbff78SBenjamin Gaignard .probe = sti_tvout_probe, 736cdfbff78SBenjamin Gaignard .remove = sti_tvout_remove, 737cdfbff78SBenjamin Gaignard }; 738cdfbff78SBenjamin Gaignard 739cdfbff78SBenjamin Gaignard MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 740cdfbff78SBenjamin Gaignard MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver"); 741cdfbff78SBenjamin Gaignard MODULE_LICENSE("GPL"); 742