xref: /openbmc/linux/drivers/gpu/drm/sti/sti_tvout.c (revision 0f3e15618d5b2c47a14236be66ed0d3a1324a049)
1cdfbff78SBenjamin Gaignard /*
2cdfbff78SBenjamin Gaignard  * Copyright (C) STMicroelectronics SA 2014
3cdfbff78SBenjamin Gaignard  * Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
4cdfbff78SBenjamin Gaignard  *          Vincent Abriou <vincent.abriou@st.com>
5cdfbff78SBenjamin Gaignard  *          for STMicroelectronics.
6cdfbff78SBenjamin Gaignard  * License terms:  GNU General Public License (GPL), version 2
7cdfbff78SBenjamin Gaignard  */
8cdfbff78SBenjamin Gaignard 
9cdfbff78SBenjamin Gaignard #include <linux/clk.h>
10cdfbff78SBenjamin Gaignard #include <linux/component.h>
11cdfbff78SBenjamin Gaignard #include <linux/module.h>
12cdfbff78SBenjamin Gaignard #include <linux/of_platform.h>
13cdfbff78SBenjamin Gaignard #include <linux/platform_device.h>
14cdfbff78SBenjamin Gaignard #include <linux/reset.h>
15*0f3e1561SArnd Bergmann #include <linux/seq_file.h>
16cdfbff78SBenjamin Gaignard 
17cdfbff78SBenjamin Gaignard #include <drm/drmP.h>
18cdfbff78SBenjamin Gaignard #include <drm/drm_crtc_helper.h>
19cdfbff78SBenjamin Gaignard 
209e1f05b2SVincent Abriou #include "sti_crtc.h"
21503290ceSVincent Abriou #include "sti_vtg.h"
225e03abc5SBenjamin Gaignard 
23cdfbff78SBenjamin Gaignard /* glue registers */
24cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M0                  0x000
25cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M1                  0x004
26cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M2                  0x008
27cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M3                  0x00c
28cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M4                  0x010
29cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M5                  0x014
30cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M6                  0x018
31cdfbff78SBenjamin Gaignard #define TVO_CSC_MAIN_M7                  0x01c
32cdfbff78SBenjamin Gaignard #define TVO_MAIN_IN_VID_FORMAT           0x030
33cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M0                   0x100
34cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M1                   0x104
35cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M2                   0x108
36cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M3                   0x10c
37cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M4                   0x110
38cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M5                   0x114
39cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M6                   0x118
40cdfbff78SBenjamin Gaignard #define TVO_CSC_AUX_M7                   0x11c
41cdfbff78SBenjamin Gaignard #define TVO_AUX_IN_VID_FORMAT            0x130
42cdfbff78SBenjamin Gaignard #define TVO_VIP_HDF                      0x400
43cdfbff78SBenjamin Gaignard #define TVO_HD_SYNC_SEL                  0x418
44cdfbff78SBenjamin Gaignard #define TVO_HD_DAC_CFG_OFF               0x420
45cdfbff78SBenjamin Gaignard #define TVO_VIP_HDMI                     0x500
46cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_0           0x504
47cdfbff78SBenjamin Gaignard #define TVO_HDMI_FORCE_COLOR_1           0x508
48cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_B_CB         0x50c
49cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_Y_G          0x510
50cdfbff78SBenjamin Gaignard #define TVO_HDMI_CLIP_VALUE_R_CR         0x514
51cdfbff78SBenjamin Gaignard #define TVO_HDMI_SYNC_SEL                0x518
52cdfbff78SBenjamin Gaignard #define TVO_HDMI_DFV_OBS                 0x540
53f32c4c50SBenjamin Gaignard #define TVO_VIP_DVO                      0x600
54f32c4c50SBenjamin Gaignard #define TVO_DVO_SYNC_SEL                 0x618
55f32c4c50SBenjamin Gaignard #define TVO_DVO_CONFIG                   0x620
56cdfbff78SBenjamin Gaignard 
57cdfbff78SBenjamin Gaignard #define TVO_IN_FMT_SIGNED                BIT(0)
58cdfbff78SBenjamin Gaignard #define TVO_SYNC_EXT                     BIT(4)
59cdfbff78SBenjamin Gaignard 
60cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_R_SHIFT          24
61cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_G_SHIFT          20
62cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_B_SHIFT          16
63cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_MASK             0x3
64cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_Y_G_SEL          0
65cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CB_B_SEL         1
66cdfbff78SBenjamin Gaignard #define TVO_VIP_REORDER_CR_R_SEL         2
67cdfbff78SBenjamin Gaignard 
68cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_SHIFT               8
69cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_MASK                0x7
70cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_DISABLED            0
71cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_EAV_SAV             1
72cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y 2
73cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_LIMITED_RANGE_CB_CR 3
74cdfbff78SBenjamin Gaignard #define TVO_VIP_CLIP_PROG_RANGE          4
75cdfbff78SBenjamin Gaignard 
76cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_SHIFT                4
77cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_MASK                 0x3
78cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_8BIT_ROUNDED         0
79cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_10BIT_ROUNDED        1
80cdfbff78SBenjamin Gaignard #define TVO_VIP_RND_12BIT_ROUNDED        2
81cdfbff78SBenjamin Gaignard 
82cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MASK           0xf
83cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_MAIN           0x0
84cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_AUX            0x8
85cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_FORCE_COLOR    0xf
86cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASS_MASK    0x1
87cdfbff78SBenjamin Gaignard #define TVO_VIP_SEL_INPUT_BYPASSED       1
88cdfbff78SBenjamin Gaignard 
89cdfbff78SBenjamin Gaignard #define TVO_SYNC_MAIN_VTG_SET_REF        0x00
90cdfbff78SBenjamin Gaignard #define TVO_SYNC_AUX_VTG_SET_REF         0x10
91cdfbff78SBenjamin Gaignard 
92cdfbff78SBenjamin Gaignard #define TVO_SYNC_HD_DCS_SHIFT            8
93cdfbff78SBenjamin Gaignard 
94f32c4c50SBenjamin Gaignard #define TVO_SYNC_DVO_PAD_HSYNC_SHIFT     8
95f32c4c50SBenjamin Gaignard #define TVO_SYNC_DVO_PAD_VSYNC_SHIFT     16
96f32c4c50SBenjamin Gaignard 
975e03abc5SBenjamin Gaignard #define ENCODER_CRTC_MASK                (BIT(0) | BIT(1))
98cdfbff78SBenjamin Gaignard 
9905a142c2SBich Hemon #define TVO_MIN_HD_HEIGHT                720
10005a142c2SBich Hemon 
101cdfbff78SBenjamin Gaignard /* enum listing the supported output data format */
102cdfbff78SBenjamin Gaignard enum sti_tvout_video_out_type {
103cdfbff78SBenjamin Gaignard 	STI_TVOUT_VIDEO_OUT_RGB,
104cdfbff78SBenjamin Gaignard 	STI_TVOUT_VIDEO_OUT_YUV,
105cdfbff78SBenjamin Gaignard };
106cdfbff78SBenjamin Gaignard 
107cdfbff78SBenjamin Gaignard struct sti_tvout {
108cdfbff78SBenjamin Gaignard 	struct device *dev;
109cdfbff78SBenjamin Gaignard 	struct drm_device *drm_dev;
110cdfbff78SBenjamin Gaignard 	void __iomem *regs;
111cdfbff78SBenjamin Gaignard 	struct reset_control *reset;
112cdfbff78SBenjamin Gaignard 	struct drm_encoder *hdmi;
113cdfbff78SBenjamin Gaignard 	struct drm_encoder *hda;
114f32c4c50SBenjamin Gaignard 	struct drm_encoder *dvo;
115cdfbff78SBenjamin Gaignard };
116cdfbff78SBenjamin Gaignard 
117cdfbff78SBenjamin Gaignard struct sti_tvout_encoder {
118cdfbff78SBenjamin Gaignard 	struct drm_encoder encoder;
119cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout;
120cdfbff78SBenjamin Gaignard };
121cdfbff78SBenjamin Gaignard 
122cdfbff78SBenjamin Gaignard #define to_sti_tvout_encoder(x) \
123cdfbff78SBenjamin Gaignard 	container_of(x, struct sti_tvout_encoder, encoder)
124cdfbff78SBenjamin Gaignard 
125cdfbff78SBenjamin Gaignard #define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout
126cdfbff78SBenjamin Gaignard 
127cdfbff78SBenjamin Gaignard /* preformatter conversion matrix */
128cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_601[8] = {
129cdfbff78SBenjamin Gaignard 	0xF927082E, 0x04C9FEAB, 0x01D30964, 0xFA95FD3D,
130cdfbff78SBenjamin Gaignard 	0x0000082E, 0x00002000, 0x00002000, 0x00000000
131cdfbff78SBenjamin Gaignard };
132cdfbff78SBenjamin Gaignard 
133cdfbff78SBenjamin Gaignard /* 709 RGB to YCbCr */
134cdfbff78SBenjamin Gaignard static const u32 rgb_to_ycbcr_709[8] = {
135cdfbff78SBenjamin Gaignard 	0xF891082F, 0x0367FF40, 0x01280B71, 0xF9B1FE20,
136cdfbff78SBenjamin Gaignard 	0x0000082F, 0x00002000, 0x00002000, 0x00000000
137cdfbff78SBenjamin Gaignard };
138cdfbff78SBenjamin Gaignard 
139cdfbff78SBenjamin Gaignard static u32 tvout_read(struct sti_tvout *tvout, int offset)
140cdfbff78SBenjamin Gaignard {
141cdfbff78SBenjamin Gaignard 	return readl(tvout->regs + offset);
142cdfbff78SBenjamin Gaignard }
143cdfbff78SBenjamin Gaignard 
144cdfbff78SBenjamin Gaignard static void tvout_write(struct sti_tvout *tvout, u32 val, int offset)
145cdfbff78SBenjamin Gaignard {
146cdfbff78SBenjamin Gaignard 	writel(val, tvout->regs + offset);
147cdfbff78SBenjamin Gaignard }
148cdfbff78SBenjamin Gaignard 
149cdfbff78SBenjamin Gaignard /**
150cdfbff78SBenjamin Gaignard  * Set the clipping mode of a VIP
151cdfbff78SBenjamin Gaignard  *
152cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
153ca279601SBenjamin Gaignard  * @reg: register to set
154cdfbff78SBenjamin Gaignard  * @cr_r:
155cdfbff78SBenjamin Gaignard  * @y_g:
156cdfbff78SBenjamin Gaignard  * @cb_b:
157cdfbff78SBenjamin Gaignard  */
158ca279601SBenjamin Gaignard static void tvout_vip_set_color_order(struct sti_tvout *tvout, int reg,
159cdfbff78SBenjamin Gaignard 				      u32 cr_r, u32 y_g, u32 cb_b)
160cdfbff78SBenjamin Gaignard {
161ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
162cdfbff78SBenjamin Gaignard 
163cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT);
164cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT);
165cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT);
166cdfbff78SBenjamin Gaignard 	val |= cr_r << TVO_VIP_REORDER_R_SHIFT;
167cdfbff78SBenjamin Gaignard 	val |= y_g << TVO_VIP_REORDER_G_SHIFT;
168cdfbff78SBenjamin Gaignard 	val |= cb_b << TVO_VIP_REORDER_B_SHIFT;
169cdfbff78SBenjamin Gaignard 
170ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
171cdfbff78SBenjamin Gaignard }
172cdfbff78SBenjamin Gaignard 
173cdfbff78SBenjamin Gaignard /**
174cdfbff78SBenjamin Gaignard  * Set the clipping mode of a VIP
175cdfbff78SBenjamin Gaignard  *
176cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
177ca279601SBenjamin Gaignard  * @reg: register to set
178cdfbff78SBenjamin Gaignard  * @range: clipping range
179cdfbff78SBenjamin Gaignard  */
180ca279601SBenjamin Gaignard static void tvout_vip_set_clip_mode(struct sti_tvout *tvout, int reg, u32 range)
181cdfbff78SBenjamin Gaignard {
182ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
183cdfbff78SBenjamin Gaignard 
184cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT);
185cdfbff78SBenjamin Gaignard 	val |= range << TVO_VIP_CLIP_SHIFT;
186ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
187cdfbff78SBenjamin Gaignard }
188cdfbff78SBenjamin Gaignard 
189cdfbff78SBenjamin Gaignard /**
190cdfbff78SBenjamin Gaignard  * Set the rounded value of a VIP
191cdfbff78SBenjamin Gaignard  *
192cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
193ca279601SBenjamin Gaignard  * @reg: register to set
194cdfbff78SBenjamin Gaignard  * @rnd: rounded val per component
195cdfbff78SBenjamin Gaignard  */
196ca279601SBenjamin Gaignard static void tvout_vip_set_rnd(struct sti_tvout *tvout, int reg, u32 rnd)
197cdfbff78SBenjamin Gaignard {
198ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
199cdfbff78SBenjamin Gaignard 
200cdfbff78SBenjamin Gaignard 	val &= ~(TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT);
201cdfbff78SBenjamin Gaignard 	val |= rnd << TVO_VIP_RND_SHIFT;
202ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
203cdfbff78SBenjamin Gaignard }
204cdfbff78SBenjamin Gaignard 
205cdfbff78SBenjamin Gaignard /**
206cdfbff78SBenjamin Gaignard  * Select the VIP input
207cdfbff78SBenjamin Gaignard  *
208cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
209ca279601SBenjamin Gaignard  * @reg: register to set
210ca279601SBenjamin Gaignard  * @main_path: main or auxiliary path
211ca279601SBenjamin Gaignard  * @sel_input_logic_inverted: need to invert the logic
212cdfbff78SBenjamin Gaignard  * @sel_input: selected_input (main/aux + conv)
213cdfbff78SBenjamin Gaignard  */
214cdfbff78SBenjamin Gaignard static void tvout_vip_set_sel_input(struct sti_tvout *tvout,
215ca279601SBenjamin Gaignard 				    int reg,
216cdfbff78SBenjamin Gaignard 				    bool main_path,
217cdfbff78SBenjamin Gaignard 				    bool sel_input_logic_inverted,
218cdfbff78SBenjamin Gaignard 				    enum sti_tvout_video_out_type video_out)
219cdfbff78SBenjamin Gaignard {
220cdfbff78SBenjamin Gaignard 	u32 sel_input;
221ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
222cdfbff78SBenjamin Gaignard 
223cdfbff78SBenjamin Gaignard 	if (main_path)
224cdfbff78SBenjamin Gaignard 		sel_input = TVO_VIP_SEL_INPUT_MAIN;
225cdfbff78SBenjamin Gaignard 	else
226cdfbff78SBenjamin Gaignard 		sel_input = TVO_VIP_SEL_INPUT_AUX;
227cdfbff78SBenjamin Gaignard 
228cdfbff78SBenjamin Gaignard 	switch (video_out) {
229cdfbff78SBenjamin Gaignard 	case STI_TVOUT_VIDEO_OUT_RGB:
230cdfbff78SBenjamin Gaignard 		sel_input |= TVO_VIP_SEL_INPUT_BYPASSED;
231cdfbff78SBenjamin Gaignard 		break;
232cdfbff78SBenjamin Gaignard 	case STI_TVOUT_VIDEO_OUT_YUV:
233cdfbff78SBenjamin Gaignard 		sel_input &= ~TVO_VIP_SEL_INPUT_BYPASSED;
234cdfbff78SBenjamin Gaignard 		break;
235cdfbff78SBenjamin Gaignard 	}
236cdfbff78SBenjamin Gaignard 
237cdfbff78SBenjamin Gaignard 	/* on stih407 chip the sel_input bypass mode logic is inverted */
238cdfbff78SBenjamin Gaignard 	if (sel_input_logic_inverted)
239cdfbff78SBenjamin Gaignard 		sel_input = sel_input ^ TVO_VIP_SEL_INPUT_BYPASS_MASK;
240cdfbff78SBenjamin Gaignard 
241cdfbff78SBenjamin Gaignard 	val &= ~TVO_VIP_SEL_INPUT_MASK;
242cdfbff78SBenjamin Gaignard 	val |= sel_input;
243ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
244cdfbff78SBenjamin Gaignard }
245cdfbff78SBenjamin Gaignard 
246cdfbff78SBenjamin Gaignard /**
247cdfbff78SBenjamin Gaignard  * Select the input video signed or unsigned
248cdfbff78SBenjamin Gaignard  *
249cdfbff78SBenjamin Gaignard  * @tvout: tvout structure
250ca279601SBenjamin Gaignard  * @reg: register to set
251cdfbff78SBenjamin Gaignard  * @in_vid_signed: used video input format
252cdfbff78SBenjamin Gaignard  */
253ca279601SBenjamin Gaignard static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout,
254ca279601SBenjamin Gaignard 		int reg, u32 in_vid_fmt)
255cdfbff78SBenjamin Gaignard {
256ca279601SBenjamin Gaignard 	u32 val = tvout_read(tvout, reg);
257cdfbff78SBenjamin Gaignard 
258cdfbff78SBenjamin Gaignard 	val &= ~TVO_IN_FMT_SIGNED;
259cdfbff78SBenjamin Gaignard 	val |= in_vid_fmt;
260ca279601SBenjamin Gaignard 	tvout_write(tvout, val, reg);
261cdfbff78SBenjamin Gaignard }
262cdfbff78SBenjamin Gaignard 
263cdfbff78SBenjamin Gaignard /**
26405a142c2SBich Hemon  * Set preformatter matrix
26505a142c2SBich Hemon  *
26605a142c2SBich Hemon  * @tvout: tvout structure
26705a142c2SBich Hemon  * @mode: display mode structure
26805a142c2SBich Hemon  */
26905a142c2SBich Hemon static void tvout_preformatter_set_matrix(struct sti_tvout *tvout,
27005a142c2SBich Hemon 					  struct drm_display_mode *mode)
27105a142c2SBich Hemon {
27205a142c2SBich Hemon 	unsigned int i;
27305a142c2SBich Hemon 	const u32 *pf_matrix;
27405a142c2SBich Hemon 
27505a142c2SBich Hemon 	if (mode->vdisplay >= TVO_MIN_HD_HEIGHT)
27605a142c2SBich Hemon 		pf_matrix = rgb_to_ycbcr_709;
27705a142c2SBich Hemon 	else
27805a142c2SBich Hemon 		pf_matrix = rgb_to_ycbcr_601;
27905a142c2SBich Hemon 
28005a142c2SBich Hemon 	for (i = 0; i < 8; i++) {
28105a142c2SBich Hemon 		tvout_write(tvout, *(pf_matrix + i),
28205a142c2SBich Hemon 			    TVO_CSC_MAIN_M0 + (i * 4));
28305a142c2SBich Hemon 		tvout_write(tvout, *(pf_matrix + i),
28405a142c2SBich Hemon 			    TVO_CSC_AUX_M0 + (i * 4));
28505a142c2SBich Hemon 	}
28605a142c2SBich Hemon }
28705a142c2SBich Hemon 
28805a142c2SBich Hemon /**
289f32c4c50SBenjamin Gaignard  * Start VIP block for DVO output
290f32c4c50SBenjamin Gaignard  *
291f32c4c50SBenjamin Gaignard  * @tvout: pointer on tvout structure
292f32c4c50SBenjamin Gaignard  * @main_path: true if main path has to be used in the vip configuration
293f32c4c50SBenjamin Gaignard  *	  else aux path is used.
294f32c4c50SBenjamin Gaignard  */
295f32c4c50SBenjamin Gaignard static void tvout_dvo_start(struct sti_tvout *tvout, bool main_path)
296f32c4c50SBenjamin Gaignard {
297f32c4c50SBenjamin Gaignard 	struct device_node *node = tvout->dev->of_node;
298f32c4c50SBenjamin Gaignard 	bool sel_input_logic_inverted = false;
299f32c4c50SBenjamin Gaignard 	u32 tvo_in_vid_format;
300503290ceSVincent Abriou 	int val, tmp;
301f32c4c50SBenjamin Gaignard 
302f32c4c50SBenjamin Gaignard 	dev_dbg(tvout->dev, "%s\n", __func__);
303f32c4c50SBenjamin Gaignard 
304f32c4c50SBenjamin Gaignard 	if (main_path) {
305f32c4c50SBenjamin Gaignard 		DRM_DEBUG_DRIVER("main vip for DVO\n");
306503290ceSVincent Abriou 		/* Select the input sync for dvo */
307503290ceSVincent Abriou 		tmp = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_DVO;
308503290ceSVincent Abriou 		val  = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
309503290ceSVincent Abriou 		val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
310503290ceSVincent Abriou 		val |= tmp;
311f32c4c50SBenjamin Gaignard 		tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
312f32c4c50SBenjamin Gaignard 		tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
313f32c4c50SBenjamin Gaignard 	} else {
314f32c4c50SBenjamin Gaignard 		DRM_DEBUG_DRIVER("aux vip for DVO\n");
315503290ceSVincent Abriou 		/* Select the input sync for dvo */
316503290ceSVincent Abriou 		tmp = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_DVO;
317503290ceSVincent Abriou 		val  = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
318503290ceSVincent Abriou 		val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
319503290ceSVincent Abriou 		val |= tmp;
320f32c4c50SBenjamin Gaignard 		tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
321f32c4c50SBenjamin Gaignard 		tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
322f32c4c50SBenjamin Gaignard 	}
323f32c4c50SBenjamin Gaignard 
324f32c4c50SBenjamin Gaignard 	/* Set color channel order */
325f32c4c50SBenjamin Gaignard 	tvout_vip_set_color_order(tvout, TVO_VIP_DVO,
326f32c4c50SBenjamin Gaignard 				  TVO_VIP_REORDER_CR_R_SEL,
327f32c4c50SBenjamin Gaignard 				  TVO_VIP_REORDER_Y_G_SEL,
328f32c4c50SBenjamin Gaignard 				  TVO_VIP_REORDER_CB_B_SEL);
329f32c4c50SBenjamin Gaignard 
3301834b84dSVincent Abriou 	/* Set clipping mode */
3311834b84dSVincent Abriou 	tvout_vip_set_clip_mode(tvout, TVO_VIP_DVO, TVO_VIP_CLIP_DISABLED);
332f32c4c50SBenjamin Gaignard 
333f32c4c50SBenjamin Gaignard 	/* Set round mode (rounded to 8-bit per component) */
334f32c4c50SBenjamin Gaignard 	tvout_vip_set_rnd(tvout, TVO_VIP_DVO, TVO_VIP_RND_8BIT_ROUNDED);
335f32c4c50SBenjamin Gaignard 
336f32c4c50SBenjamin Gaignard 	if (of_device_is_compatible(node, "st,stih407-tvout")) {
337f32c4c50SBenjamin Gaignard 		/* Set input video format */
338f32c4c50SBenjamin Gaignard 		tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format,
339f32c4c50SBenjamin Gaignard 					 TVO_IN_FMT_SIGNED);
340f32c4c50SBenjamin Gaignard 		sel_input_logic_inverted = true;
341f32c4c50SBenjamin Gaignard 	}
342f32c4c50SBenjamin Gaignard 
343f32c4c50SBenjamin Gaignard 	/* Input selection */
344f32c4c50SBenjamin Gaignard 	tvout_vip_set_sel_input(tvout, TVO_VIP_DVO, main_path,
345f32c4c50SBenjamin Gaignard 				sel_input_logic_inverted,
346f32c4c50SBenjamin Gaignard 				STI_TVOUT_VIDEO_OUT_RGB);
347f32c4c50SBenjamin Gaignard }
348f32c4c50SBenjamin Gaignard 
349f32c4c50SBenjamin Gaignard /**
350cdfbff78SBenjamin Gaignard  * Start VIP block for HDMI output
351cdfbff78SBenjamin Gaignard  *
352cdfbff78SBenjamin Gaignard  * @tvout: pointer on tvout structure
353cdfbff78SBenjamin Gaignard  * @main_path: true if main path has to be used in the vip configuration
354cdfbff78SBenjamin Gaignard  *	  else aux path is used.
355cdfbff78SBenjamin Gaignard  */
356cdfbff78SBenjamin Gaignard static void tvout_hdmi_start(struct sti_tvout *tvout, bool main_path)
357cdfbff78SBenjamin Gaignard {
358cdfbff78SBenjamin Gaignard 	struct device_node *node = tvout->dev->of_node;
359cdfbff78SBenjamin Gaignard 	bool sel_input_logic_inverted = false;
360ca279601SBenjamin Gaignard 	u32 tvo_in_vid_format;
361cdfbff78SBenjamin Gaignard 
362cdfbff78SBenjamin Gaignard 	dev_dbg(tvout->dev, "%s\n", __func__);
363cdfbff78SBenjamin Gaignard 
364cdfbff78SBenjamin Gaignard 	if (main_path) {
365cdfbff78SBenjamin Gaignard 		DRM_DEBUG_DRIVER("main vip for hdmi\n");
366503290ceSVincent Abriou 		/* select the input sync for hdmi */
367503290ceSVincent Abriou 		tvout_write(tvout,
368503290ceSVincent Abriou 			    TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDMI,
369503290ceSVincent Abriou 			    TVO_HDMI_SYNC_SEL);
370ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
371cdfbff78SBenjamin Gaignard 	} else {
372cdfbff78SBenjamin Gaignard 		DRM_DEBUG_DRIVER("aux vip for hdmi\n");
373503290ceSVincent Abriou 		/* select the input sync for hdmi */
374503290ceSVincent Abriou 		tvout_write(tvout,
375503290ceSVincent Abriou 			    TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDMI,
376503290ceSVincent Abriou 			    TVO_HDMI_SYNC_SEL);
377ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
378cdfbff78SBenjamin Gaignard 	}
379cdfbff78SBenjamin Gaignard 
380cdfbff78SBenjamin Gaignard 	/* set color channel order */
381ca279601SBenjamin Gaignard 	tvout_vip_set_color_order(tvout, TVO_VIP_HDMI,
382cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CR_R_SEL,
383cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_Y_G_SEL,
384cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CB_B_SEL);
385cdfbff78SBenjamin Gaignard 
3861834b84dSVincent Abriou 	/* set clipping mode */
3871834b84dSVincent Abriou 	tvout_vip_set_clip_mode(tvout, TVO_VIP_HDMI, TVO_VIP_CLIP_DISABLED);
388cdfbff78SBenjamin Gaignard 
389cdfbff78SBenjamin Gaignard 	/* set round mode (rounded to 8-bit per component) */
390ca279601SBenjamin Gaignard 	tvout_vip_set_rnd(tvout, TVO_VIP_HDMI, TVO_VIP_RND_8BIT_ROUNDED);
391cdfbff78SBenjamin Gaignard 
392cdfbff78SBenjamin Gaignard 	if (of_device_is_compatible(node, "st,stih407-tvout")) {
393cdfbff78SBenjamin Gaignard 		/* set input video format */
394ca279601SBenjamin Gaignard 		tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format,
395cdfbff78SBenjamin Gaignard 					TVO_IN_FMT_SIGNED);
396cdfbff78SBenjamin Gaignard 		sel_input_logic_inverted = true;
397cdfbff78SBenjamin Gaignard 	}
398cdfbff78SBenjamin Gaignard 
399cdfbff78SBenjamin Gaignard 	/* input selection */
400ca279601SBenjamin Gaignard 	tvout_vip_set_sel_input(tvout, TVO_VIP_HDMI, main_path,
401cdfbff78SBenjamin Gaignard 			sel_input_logic_inverted, STI_TVOUT_VIDEO_OUT_RGB);
402cdfbff78SBenjamin Gaignard }
403cdfbff78SBenjamin Gaignard 
404cdfbff78SBenjamin Gaignard /**
405cdfbff78SBenjamin Gaignard  * Start HDF VIP and HD DAC
406cdfbff78SBenjamin Gaignard  *
407cdfbff78SBenjamin Gaignard  * @tvout: pointer on tvout structure
408cdfbff78SBenjamin Gaignard  * @main_path: true if main path has to be used in the vip configuration
409cdfbff78SBenjamin Gaignard  *	  else aux path is used.
410cdfbff78SBenjamin Gaignard  */
411cdfbff78SBenjamin Gaignard static void tvout_hda_start(struct sti_tvout *tvout, bool main_path)
412cdfbff78SBenjamin Gaignard {
413cdfbff78SBenjamin Gaignard 	struct device_node *node = tvout->dev->of_node;
414cdfbff78SBenjamin Gaignard 	bool sel_input_logic_inverted = false;
415ca279601SBenjamin Gaignard 	u32 tvo_in_vid_format;
416ca279601SBenjamin Gaignard 	int val;
417cdfbff78SBenjamin Gaignard 
418cdfbff78SBenjamin Gaignard 	dev_dbg(tvout->dev, "%s\n", __func__);
419cdfbff78SBenjamin Gaignard 
420ca279601SBenjamin Gaignard 	if (main_path) {
421503290ceSVincent Abriou 		DRM_DEBUG_DRIVER("main vip for HDF\n");
422503290ceSVincent Abriou 		/* Select the input sync for HD analog and HD DCS */
423503290ceSVincent Abriou 		val  = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDDCS;
424503290ceSVincent Abriou 		val  = val << TVO_SYNC_HD_DCS_SHIFT;
425503290ceSVincent Abriou 		val |= TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDF;
426ca279601SBenjamin Gaignard 		tvout_write(tvout, val, TVO_HD_SYNC_SEL);
427ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
428ca279601SBenjamin Gaignard 	} else {
429503290ceSVincent Abriou 		DRM_DEBUG_DRIVER("aux vip for HDF\n");
430503290ceSVincent Abriou 		/* Select the input sync for HD analog and HD DCS */
431503290ceSVincent Abriou 		val  = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDDCS;
432503290ceSVincent Abriou 		val  = val << TVO_SYNC_HD_DCS_SHIFT;
433503290ceSVincent Abriou 		val |= TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDF;
434ca279601SBenjamin Gaignard 		tvout_write(tvout, val, TVO_HD_SYNC_SEL);
435ca279601SBenjamin Gaignard 		tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
436cdfbff78SBenjamin Gaignard 	}
437cdfbff78SBenjamin Gaignard 
438cdfbff78SBenjamin Gaignard 	/* set color channel order */
439ca279601SBenjamin Gaignard 	tvout_vip_set_color_order(tvout, TVO_VIP_HDF,
440cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CR_R_SEL,
441cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_Y_G_SEL,
442cdfbff78SBenjamin Gaignard 				  TVO_VIP_REORDER_CB_B_SEL);
443cdfbff78SBenjamin Gaignard 
4441834b84dSVincent Abriou 	/* set clipping mode */
4451834b84dSVincent Abriou 	tvout_vip_set_clip_mode(tvout, TVO_VIP_HDF, TVO_VIP_CLIP_DISABLED);
446cdfbff78SBenjamin Gaignard 
447cdfbff78SBenjamin Gaignard 	/* set round mode (rounded to 10-bit per component) */
448ca279601SBenjamin Gaignard 	tvout_vip_set_rnd(tvout, TVO_VIP_HDF, TVO_VIP_RND_10BIT_ROUNDED);
449cdfbff78SBenjamin Gaignard 
450cdfbff78SBenjamin Gaignard 	if (of_device_is_compatible(node, "st,stih407-tvout")) {
451cdfbff78SBenjamin Gaignard 		/* set input video format */
452ca279601SBenjamin Gaignard 		tvout_vip_set_in_vid_fmt(tvout,
453ca279601SBenjamin Gaignard 			tvo_in_vid_format, TVO_IN_FMT_SIGNED);
454cdfbff78SBenjamin Gaignard 		sel_input_logic_inverted = true;
455cdfbff78SBenjamin Gaignard 	}
456cdfbff78SBenjamin Gaignard 
457cdfbff78SBenjamin Gaignard 	/* Input selection */
458ca279601SBenjamin Gaignard 	tvout_vip_set_sel_input(tvout, TVO_VIP_HDF, main_path,
459cdfbff78SBenjamin Gaignard 				sel_input_logic_inverted,
460cdfbff78SBenjamin Gaignard 				STI_TVOUT_VIDEO_OUT_YUV);
461cdfbff78SBenjamin Gaignard 
462cdfbff78SBenjamin Gaignard 	/* power up HD DAC */
463cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 0, TVO_HD_DAC_CFG_OFF);
464cdfbff78SBenjamin Gaignard }
465cdfbff78SBenjamin Gaignard 
466b514bee7SVincent Abriou #define DBGFS_DUMP(reg) seq_printf(s, "\n  %-25s 0x%08X", #reg, \
467b514bee7SVincent Abriou 				   readl(tvout->regs + reg))
468b514bee7SVincent Abriou 
469b514bee7SVincent Abriou static void tvout_dbg_vip(struct seq_file *s, int val)
470b514bee7SVincent Abriou {
471b514bee7SVincent Abriou 	int r, g, b, tmp, mask;
472b514bee7SVincent Abriou 	char *const reorder[] = {"Y_G", "Cb_B", "Cr_R"};
473b514bee7SVincent Abriou 	char *const clipping[] = {"No", "EAV/SAV", "Limited range RGB/Y",
474b514bee7SVincent Abriou 				  "Limited range Cb/Cr", "decided by register"};
475b514bee7SVincent Abriou 	char *const round[] = {"8-bit", "10-bit", "12-bit"};
476b514bee7SVincent Abriou 	char *const input_sel[] = {"Main (color matrix enabled)",
477b514bee7SVincent Abriou 				   "Main (color matrix by-passed)",
478b514bee7SVincent Abriou 				   "", "", "", "", "", "",
479b514bee7SVincent Abriou 				   "Aux (color matrix enabled)",
480b514bee7SVincent Abriou 				   "Aux (color matrix by-passed)",
481b514bee7SVincent Abriou 				   "", "", "", "", "", "Force value"};
482b514bee7SVincent Abriou 
483b514bee7SVincent Abriou 	seq_puts(s, "\t");
484b514bee7SVincent Abriou 	mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT;
485b514bee7SVincent Abriou 	r = (val & mask) >> TVO_VIP_REORDER_R_SHIFT;
486b514bee7SVincent Abriou 	mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT;
487b514bee7SVincent Abriou 	g = (val & mask) >> TVO_VIP_REORDER_G_SHIFT;
488b514bee7SVincent Abriou 	mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT;
489b514bee7SVincent Abriou 	b = (val & mask) >> TVO_VIP_REORDER_B_SHIFT;
490b514bee7SVincent Abriou 	seq_printf(s, "%-24s %s->%s %s->%s %s->%s\n", "Reorder:",
491b514bee7SVincent Abriou 		   reorder[r], reorder[TVO_VIP_REORDER_CR_R_SEL],
492b514bee7SVincent Abriou 		   reorder[g], reorder[TVO_VIP_REORDER_Y_G_SEL],
493b514bee7SVincent Abriou 		   reorder[b], reorder[TVO_VIP_REORDER_CB_B_SEL]);
494b514bee7SVincent Abriou 	seq_puts(s, "\t\t\t\t\t");
495b514bee7SVincent Abriou 	mask = TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT;
496b514bee7SVincent Abriou 	tmp = (val & mask) >> TVO_VIP_CLIP_SHIFT;
497b514bee7SVincent Abriou 	seq_printf(s, "%-24s %s\n", "Clipping:", clipping[tmp]);
498b514bee7SVincent Abriou 	seq_puts(s, "\t\t\t\t\t");
499b514bee7SVincent Abriou 	mask = TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT;
500b514bee7SVincent Abriou 	tmp = (val & mask) >> TVO_VIP_RND_SHIFT;
501b514bee7SVincent Abriou 	seq_printf(s, "%-24s input data rounded to %s per component\n",
502b514bee7SVincent Abriou 		   "Round:", round[tmp]);
503b514bee7SVincent Abriou 	seq_puts(s, "\t\t\t\t\t");
504b514bee7SVincent Abriou 	tmp = (val & TVO_VIP_SEL_INPUT_MASK);
505b514bee7SVincent Abriou 	seq_printf(s, "%-24s %s", "Input selection:", input_sel[tmp]);
506b514bee7SVincent Abriou }
507b514bee7SVincent Abriou 
508b514bee7SVincent Abriou static void tvout_dbg_hd_dac_cfg(struct seq_file *s, int val)
509b514bee7SVincent Abriou {
510b514bee7SVincent Abriou 	seq_printf(s, "\t%-24s %s", "HD DAC:",
511b514bee7SVincent Abriou 		   val & 1 ? "disabled" : "enabled");
512b514bee7SVincent Abriou }
513b514bee7SVincent Abriou 
514b514bee7SVincent Abriou static int tvout_dbg_show(struct seq_file *s, void *data)
515b514bee7SVincent Abriou {
516b514bee7SVincent Abriou 	struct drm_info_node *node = s->private;
517b514bee7SVincent Abriou 	struct sti_tvout *tvout = (struct sti_tvout *)node->info_ent->data;
518b514bee7SVincent Abriou 	struct drm_device *dev = node->minor->dev;
519b514bee7SVincent Abriou 	struct drm_crtc *crtc;
520b514bee7SVincent Abriou 	int ret;
521b514bee7SVincent Abriou 
522b514bee7SVincent Abriou 	ret = mutex_lock_interruptible(&dev->struct_mutex);
523b514bee7SVincent Abriou 	if (ret)
524b514bee7SVincent Abriou 		return ret;
525b514bee7SVincent Abriou 
526b514bee7SVincent Abriou 	seq_printf(s, "TVOUT: (vaddr = 0x%p)", tvout->regs);
527b514bee7SVincent Abriou 
528b514bee7SVincent Abriou 	seq_puts(s, "\n\n  HDMI encoder: ");
529b514bee7SVincent Abriou 	crtc = tvout->hdmi->crtc;
530b514bee7SVincent Abriou 	if (crtc) {
531b514bee7SVincent Abriou 		seq_printf(s, "connected to %s path",
532b514bee7SVincent Abriou 			   sti_crtc_is_main(crtc) ? "main" : "aux");
533b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_HDMI_SYNC_SEL);
534b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_VIP_HDMI);
535b514bee7SVincent Abriou 		tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDMI));
536b514bee7SVincent Abriou 	} else {
537b514bee7SVincent Abriou 		seq_puts(s, "disabled");
538b514bee7SVincent Abriou 	}
539b514bee7SVincent Abriou 
540b514bee7SVincent Abriou 	seq_puts(s, "\n\n  DVO encoder: ");
541b514bee7SVincent Abriou 	crtc = tvout->dvo->crtc;
542b514bee7SVincent Abriou 	if (crtc) {
543b514bee7SVincent Abriou 		seq_printf(s, "connected to %s path",
544b514bee7SVincent Abriou 			   sti_crtc_is_main(crtc) ? "main" : "aux");
545b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_DVO_SYNC_SEL);
546b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_DVO_CONFIG);
547b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_VIP_DVO);
548b514bee7SVincent Abriou 		tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_DVO));
549b514bee7SVincent Abriou 	} else {
550b514bee7SVincent Abriou 		seq_puts(s, "disabled");
551b514bee7SVincent Abriou 	}
552b514bee7SVincent Abriou 
553b514bee7SVincent Abriou 	seq_puts(s, "\n\n  HDA encoder: ");
554b514bee7SVincent Abriou 	crtc = tvout->hda->crtc;
555b514bee7SVincent Abriou 	if (crtc) {
556b514bee7SVincent Abriou 		seq_printf(s, "connected to %s path",
557b514bee7SVincent Abriou 			   sti_crtc_is_main(crtc) ? "main" : "aux");
558b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_HD_SYNC_SEL);
559b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_HD_DAC_CFG_OFF);
560b514bee7SVincent Abriou 		tvout_dbg_hd_dac_cfg(s,
561b514bee7SVincent Abriou 				     readl(tvout->regs + TVO_HD_DAC_CFG_OFF));
562b514bee7SVincent Abriou 		DBGFS_DUMP(TVO_VIP_HDF);
563b514bee7SVincent Abriou 		tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDF));
564b514bee7SVincent Abriou 	} else {
565b514bee7SVincent Abriou 		seq_puts(s, "disabled");
566b514bee7SVincent Abriou 	}
567b514bee7SVincent Abriou 
568b514bee7SVincent Abriou 	seq_puts(s, "\n\n  main path configuration");
569b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M0);
570b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M1);
571b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M2);
572b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M3);
573b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M4);
574b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M5);
575b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M6);
576b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_MAIN_M7);
577b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_MAIN_IN_VID_FORMAT);
578b514bee7SVincent Abriou 
579b514bee7SVincent Abriou 	seq_puts(s, "\n\n  auxiliary path configuration");
580b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M0);
581b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M2);
582b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M3);
583b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M4);
584b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M5);
585b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M6);
586b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_CSC_AUX_M7);
587b514bee7SVincent Abriou 	DBGFS_DUMP(TVO_AUX_IN_VID_FORMAT);
588b514bee7SVincent Abriou 	seq_puts(s, "\n");
589b514bee7SVincent Abriou 
590b514bee7SVincent Abriou 	mutex_unlock(&dev->struct_mutex);
591b514bee7SVincent Abriou 	return 0;
592b514bee7SVincent Abriou }
593b514bee7SVincent Abriou 
594b514bee7SVincent Abriou static struct drm_info_list tvout_debugfs_files[] = {
595b514bee7SVincent Abriou 	{ "tvout", tvout_dbg_show, 0, NULL },
596b514bee7SVincent Abriou };
597b514bee7SVincent Abriou 
598b514bee7SVincent Abriou static void tvout_debugfs_exit(struct sti_tvout *tvout, struct drm_minor *minor)
599b514bee7SVincent Abriou {
600b514bee7SVincent Abriou 	drm_debugfs_remove_files(tvout_debugfs_files,
601b514bee7SVincent Abriou 				 ARRAY_SIZE(tvout_debugfs_files),
602b514bee7SVincent Abriou 				 minor);
603b514bee7SVincent Abriou }
604b514bee7SVincent Abriou 
605b514bee7SVincent Abriou static int tvout_debugfs_init(struct sti_tvout *tvout, struct drm_minor *minor)
606b514bee7SVincent Abriou {
607b514bee7SVincent Abriou 	unsigned int i;
608b514bee7SVincent Abriou 
609b514bee7SVincent Abriou 	for (i = 0; i < ARRAY_SIZE(tvout_debugfs_files); i++)
610b514bee7SVincent Abriou 		tvout_debugfs_files[i].data = tvout;
611b514bee7SVincent Abriou 
612b514bee7SVincent Abriou 	return drm_debugfs_create_files(tvout_debugfs_files,
613b514bee7SVincent Abriou 					ARRAY_SIZE(tvout_debugfs_files),
614b514bee7SVincent Abriou 					minor->debugfs_root, minor);
615b514bee7SVincent Abriou }
616b514bee7SVincent Abriou 
617cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_dpms(struct drm_encoder *encoder, int mode)
618cdfbff78SBenjamin Gaignard {
619cdfbff78SBenjamin Gaignard }
620cdfbff78SBenjamin Gaignard 
621cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder,
622cdfbff78SBenjamin Gaignard 				       struct drm_display_mode *mode,
623cdfbff78SBenjamin Gaignard 				       struct drm_display_mode *adjusted_mode)
624cdfbff78SBenjamin Gaignard {
625cdfbff78SBenjamin Gaignard }
626cdfbff78SBenjamin Gaignard 
627cdfbff78SBenjamin Gaignard static void sti_tvout_encoder_destroy(struct drm_encoder *encoder)
628cdfbff78SBenjamin Gaignard {
629cdfbff78SBenjamin Gaignard 	struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder);
630cdfbff78SBenjamin Gaignard 
631cdfbff78SBenjamin Gaignard 	drm_encoder_cleanup(encoder);
632cdfbff78SBenjamin Gaignard 	kfree(sti_encoder);
633cdfbff78SBenjamin Gaignard }
634cdfbff78SBenjamin Gaignard 
635cdfbff78SBenjamin Gaignard static const struct drm_encoder_funcs sti_tvout_encoder_funcs = {
636cdfbff78SBenjamin Gaignard 	.destroy = sti_tvout_encoder_destroy,
637cdfbff78SBenjamin Gaignard };
638cdfbff78SBenjamin Gaignard 
63905a142c2SBich Hemon static void sti_dvo_encoder_enable(struct drm_encoder *encoder)
640f32c4c50SBenjamin Gaignard {
641f32c4c50SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
642f32c4c50SBenjamin Gaignard 
64305a142c2SBich Hemon 	tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
64405a142c2SBich Hemon 
6459e1f05b2SVincent Abriou 	tvout_dvo_start(tvout, sti_crtc_is_main(encoder->crtc));
646f32c4c50SBenjamin Gaignard }
647f32c4c50SBenjamin Gaignard 
648f32c4c50SBenjamin Gaignard static void sti_dvo_encoder_disable(struct drm_encoder *encoder)
649f32c4c50SBenjamin Gaignard {
650f32c4c50SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
651f32c4c50SBenjamin Gaignard 
652f32c4c50SBenjamin Gaignard 	/* Reset VIP register */
653f32c4c50SBenjamin Gaignard 	tvout_write(tvout, 0x0, TVO_VIP_DVO);
654f32c4c50SBenjamin Gaignard }
655f32c4c50SBenjamin Gaignard 
656f32c4c50SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_dvo_encoder_helper_funcs = {
657f32c4c50SBenjamin Gaignard 	.dpms = sti_tvout_encoder_dpms,
658f32c4c50SBenjamin Gaignard 	.mode_set = sti_tvout_encoder_mode_set,
65905a142c2SBich Hemon 	.enable = sti_dvo_encoder_enable,
660f32c4c50SBenjamin Gaignard 	.disable = sti_dvo_encoder_disable,
661f32c4c50SBenjamin Gaignard };
662f32c4c50SBenjamin Gaignard 
663f32c4c50SBenjamin Gaignard static struct drm_encoder *
664f32c4c50SBenjamin Gaignard sti_tvout_create_dvo_encoder(struct drm_device *dev,
665f32c4c50SBenjamin Gaignard 			     struct sti_tvout *tvout)
666f32c4c50SBenjamin Gaignard {
667f32c4c50SBenjamin Gaignard 	struct sti_tvout_encoder *encoder;
668f32c4c50SBenjamin Gaignard 	struct drm_encoder *drm_encoder;
669f32c4c50SBenjamin Gaignard 
670f32c4c50SBenjamin Gaignard 	encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
671f32c4c50SBenjamin Gaignard 	if (!encoder)
672f32c4c50SBenjamin Gaignard 		return NULL;
673f32c4c50SBenjamin Gaignard 
674f32c4c50SBenjamin Gaignard 	encoder->tvout = tvout;
675f32c4c50SBenjamin Gaignard 
676f32c4c50SBenjamin Gaignard 	drm_encoder = (struct drm_encoder *)encoder;
677f32c4c50SBenjamin Gaignard 
678f32c4c50SBenjamin Gaignard 	drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
679f32c4c50SBenjamin Gaignard 	drm_encoder->possible_clones = 1 << 0;
680f32c4c50SBenjamin Gaignard 
681f32c4c50SBenjamin Gaignard 	drm_encoder_init(dev, drm_encoder,
68213a3d91fSVille Syrjälä 			 &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS,
68313a3d91fSVille Syrjälä 			 NULL);
684f32c4c50SBenjamin Gaignard 
685f32c4c50SBenjamin Gaignard 	drm_encoder_helper_add(drm_encoder, &sti_dvo_encoder_helper_funcs);
686f32c4c50SBenjamin Gaignard 
687f32c4c50SBenjamin Gaignard 	return drm_encoder;
688f32c4c50SBenjamin Gaignard }
689f32c4c50SBenjamin Gaignard 
69005a142c2SBich Hemon static void sti_hda_encoder_enable(struct drm_encoder *encoder)
691cdfbff78SBenjamin Gaignard {
692cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
693cdfbff78SBenjamin Gaignard 
69405a142c2SBich Hemon 	tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
69505a142c2SBich Hemon 
6969e1f05b2SVincent Abriou 	tvout_hda_start(tvout, sti_crtc_is_main(encoder->crtc));
697cdfbff78SBenjamin Gaignard }
698cdfbff78SBenjamin Gaignard 
699cdfbff78SBenjamin Gaignard static void sti_hda_encoder_disable(struct drm_encoder *encoder)
700cdfbff78SBenjamin Gaignard {
701cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
702cdfbff78SBenjamin Gaignard 
703cdfbff78SBenjamin Gaignard 	/* reset VIP register */
704cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 0x0, TVO_VIP_HDF);
705cdfbff78SBenjamin Gaignard 
706cdfbff78SBenjamin Gaignard 	/* power down HD DAC */
707cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 1, TVO_HD_DAC_CFG_OFF);
708cdfbff78SBenjamin Gaignard }
709cdfbff78SBenjamin Gaignard 
710cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = {
711cdfbff78SBenjamin Gaignard 	.dpms = sti_tvout_encoder_dpms,
712cdfbff78SBenjamin Gaignard 	.mode_set = sti_tvout_encoder_mode_set,
71305a142c2SBich Hemon 	.commit = sti_hda_encoder_enable,
714cdfbff78SBenjamin Gaignard 	.disable = sti_hda_encoder_disable,
715cdfbff78SBenjamin Gaignard };
716cdfbff78SBenjamin Gaignard 
717cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev,
718cdfbff78SBenjamin Gaignard 		struct sti_tvout *tvout)
719cdfbff78SBenjamin Gaignard {
720cdfbff78SBenjamin Gaignard 	struct sti_tvout_encoder *encoder;
721cdfbff78SBenjamin Gaignard 	struct drm_encoder *drm_encoder;
722cdfbff78SBenjamin Gaignard 
723cdfbff78SBenjamin Gaignard 	encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
724cdfbff78SBenjamin Gaignard 	if (!encoder)
725cdfbff78SBenjamin Gaignard 		return NULL;
726cdfbff78SBenjamin Gaignard 
727cdfbff78SBenjamin Gaignard 	encoder->tvout = tvout;
728cdfbff78SBenjamin Gaignard 
729cdfbff78SBenjamin Gaignard 	drm_encoder = (struct drm_encoder *) encoder;
730cdfbff78SBenjamin Gaignard 
7315e03abc5SBenjamin Gaignard 	drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
732cdfbff78SBenjamin Gaignard 	drm_encoder->possible_clones = 1 << 0;
733cdfbff78SBenjamin Gaignard 
734cdfbff78SBenjamin Gaignard 	drm_encoder_init(dev, drm_encoder,
73513a3d91fSVille Syrjälä 			&sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL);
736cdfbff78SBenjamin Gaignard 
737cdfbff78SBenjamin Gaignard 	drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs);
738cdfbff78SBenjamin Gaignard 
739cdfbff78SBenjamin Gaignard 	return drm_encoder;
740cdfbff78SBenjamin Gaignard }
741cdfbff78SBenjamin Gaignard 
74205a142c2SBich Hemon static void sti_hdmi_encoder_enable(struct drm_encoder *encoder)
743cdfbff78SBenjamin Gaignard {
744cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
745cdfbff78SBenjamin Gaignard 
74605a142c2SBich Hemon 	tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
74705a142c2SBich Hemon 
7489e1f05b2SVincent Abriou 	tvout_hdmi_start(tvout, sti_crtc_is_main(encoder->crtc));
749cdfbff78SBenjamin Gaignard }
750cdfbff78SBenjamin Gaignard 
751cdfbff78SBenjamin Gaignard static void sti_hdmi_encoder_disable(struct drm_encoder *encoder)
752cdfbff78SBenjamin Gaignard {
753cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = to_sti_tvout(encoder);
754cdfbff78SBenjamin Gaignard 
755cdfbff78SBenjamin Gaignard 	/* reset VIP register */
756cdfbff78SBenjamin Gaignard 	tvout_write(tvout, 0x0, TVO_VIP_HDMI);
757cdfbff78SBenjamin Gaignard }
758cdfbff78SBenjamin Gaignard 
759cdfbff78SBenjamin Gaignard static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = {
760cdfbff78SBenjamin Gaignard 	.dpms = sti_tvout_encoder_dpms,
761cdfbff78SBenjamin Gaignard 	.mode_set = sti_tvout_encoder_mode_set,
76205a142c2SBich Hemon 	.commit = sti_hdmi_encoder_enable,
763cdfbff78SBenjamin Gaignard 	.disable = sti_hdmi_encoder_disable,
764cdfbff78SBenjamin Gaignard };
765cdfbff78SBenjamin Gaignard 
766cdfbff78SBenjamin Gaignard static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev,
767cdfbff78SBenjamin Gaignard 		struct sti_tvout *tvout)
768cdfbff78SBenjamin Gaignard {
769cdfbff78SBenjamin Gaignard 	struct sti_tvout_encoder *encoder;
770cdfbff78SBenjamin Gaignard 	struct drm_encoder *drm_encoder;
771cdfbff78SBenjamin Gaignard 
772cdfbff78SBenjamin Gaignard 	encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
773cdfbff78SBenjamin Gaignard 	if (!encoder)
774cdfbff78SBenjamin Gaignard 		return NULL;
775cdfbff78SBenjamin Gaignard 
776cdfbff78SBenjamin Gaignard 	encoder->tvout = tvout;
777cdfbff78SBenjamin Gaignard 
778cdfbff78SBenjamin Gaignard 	drm_encoder = (struct drm_encoder *) encoder;
779cdfbff78SBenjamin Gaignard 
7805e03abc5SBenjamin Gaignard 	drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
781cdfbff78SBenjamin Gaignard 	drm_encoder->possible_clones = 1 << 1;
782cdfbff78SBenjamin Gaignard 
783cdfbff78SBenjamin Gaignard 	drm_encoder_init(dev, drm_encoder,
78413a3d91fSVille Syrjälä 			&sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS, NULL);
785cdfbff78SBenjamin Gaignard 
786cdfbff78SBenjamin Gaignard 	drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs);
787cdfbff78SBenjamin Gaignard 
788cdfbff78SBenjamin Gaignard 	return drm_encoder;
789cdfbff78SBenjamin Gaignard }
790cdfbff78SBenjamin Gaignard 
791cdfbff78SBenjamin Gaignard static void sti_tvout_create_encoders(struct drm_device *dev,
792cdfbff78SBenjamin Gaignard 		struct sti_tvout *tvout)
793cdfbff78SBenjamin Gaignard {
794cdfbff78SBenjamin Gaignard 	tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout);
795cdfbff78SBenjamin Gaignard 	tvout->hda = sti_tvout_create_hda_encoder(dev, tvout);
796f32c4c50SBenjamin Gaignard 	tvout->dvo = sti_tvout_create_dvo_encoder(dev, tvout);
797cdfbff78SBenjamin Gaignard }
798cdfbff78SBenjamin Gaignard 
799cdfbff78SBenjamin Gaignard static void sti_tvout_destroy_encoders(struct sti_tvout *tvout)
800cdfbff78SBenjamin Gaignard {
801cdfbff78SBenjamin Gaignard 	if (tvout->hdmi)
802cdfbff78SBenjamin Gaignard 		drm_encoder_cleanup(tvout->hdmi);
803cdfbff78SBenjamin Gaignard 	tvout->hdmi = NULL;
804cdfbff78SBenjamin Gaignard 
805cdfbff78SBenjamin Gaignard 	if (tvout->hda)
806cdfbff78SBenjamin Gaignard 		drm_encoder_cleanup(tvout->hda);
807cdfbff78SBenjamin Gaignard 	tvout->hda = NULL;
8080a1dc29dSVincent Abriou 
8090a1dc29dSVincent Abriou 	if (tvout->dvo)
8100a1dc29dSVincent Abriou 		drm_encoder_cleanup(tvout->dvo);
8110a1dc29dSVincent Abriou 	tvout->dvo = NULL;
812cdfbff78SBenjamin Gaignard }
813cdfbff78SBenjamin Gaignard 
814cdfbff78SBenjamin Gaignard static int sti_tvout_bind(struct device *dev, struct device *master, void *data)
815cdfbff78SBenjamin Gaignard {
816cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout = dev_get_drvdata(dev);
817cdfbff78SBenjamin Gaignard 	struct drm_device *drm_dev = data;
818cdfbff78SBenjamin Gaignard 
819cdfbff78SBenjamin Gaignard 	tvout->drm_dev = drm_dev;
820cdfbff78SBenjamin Gaignard 
821cdfbff78SBenjamin Gaignard 	sti_tvout_create_encoders(drm_dev, tvout);
822cdfbff78SBenjamin Gaignard 
823b514bee7SVincent Abriou 	if (tvout_debugfs_init(tvout, drm_dev->primary))
824b514bee7SVincent Abriou 		DRM_ERROR("TVOUT debugfs setup failed\n");
825b514bee7SVincent Abriou 
82653bdcf5fSBenjamin Gaignard 	return 0;
827cdfbff78SBenjamin Gaignard }
828cdfbff78SBenjamin Gaignard 
829cdfbff78SBenjamin Gaignard static void sti_tvout_unbind(struct device *dev, struct device *master,
830cdfbff78SBenjamin Gaignard 	void *data)
831cdfbff78SBenjamin Gaignard {
83253bdcf5fSBenjamin Gaignard 	struct sti_tvout *tvout = dev_get_drvdata(dev);
833b514bee7SVincent Abriou 	struct drm_device *drm_dev = data;
83453bdcf5fSBenjamin Gaignard 
83553bdcf5fSBenjamin Gaignard 	sti_tvout_destroy_encoders(tvout);
836b514bee7SVincent Abriou 
837b514bee7SVincent Abriou 	tvout_debugfs_exit(tvout, drm_dev->primary);
838cdfbff78SBenjamin Gaignard }
839cdfbff78SBenjamin Gaignard 
840cdfbff78SBenjamin Gaignard static const struct component_ops sti_tvout_ops = {
841cdfbff78SBenjamin Gaignard 	.bind	= sti_tvout_bind,
842cdfbff78SBenjamin Gaignard 	.unbind	= sti_tvout_unbind,
843cdfbff78SBenjamin Gaignard };
844cdfbff78SBenjamin Gaignard 
845cdfbff78SBenjamin Gaignard static int sti_tvout_probe(struct platform_device *pdev)
846cdfbff78SBenjamin Gaignard {
847cdfbff78SBenjamin Gaignard 	struct device *dev = &pdev->dev;
848cdfbff78SBenjamin Gaignard 	struct device_node *node = dev->of_node;
849cdfbff78SBenjamin Gaignard 	struct sti_tvout *tvout;
850cdfbff78SBenjamin Gaignard 	struct resource *res;
851cdfbff78SBenjamin Gaignard 
852cdfbff78SBenjamin Gaignard 	DRM_INFO("%s\n", __func__);
853cdfbff78SBenjamin Gaignard 
854cdfbff78SBenjamin Gaignard 	if (!node)
855cdfbff78SBenjamin Gaignard 		return -ENODEV;
856cdfbff78SBenjamin Gaignard 
857cdfbff78SBenjamin Gaignard 	tvout = devm_kzalloc(dev, sizeof(*tvout), GFP_KERNEL);
858cdfbff78SBenjamin Gaignard 	if (!tvout)
859cdfbff78SBenjamin Gaignard 		return -ENOMEM;
860cdfbff78SBenjamin Gaignard 
861cdfbff78SBenjamin Gaignard 	tvout->dev = dev;
862cdfbff78SBenjamin Gaignard 
863cdfbff78SBenjamin Gaignard 	/* get Memory ressources */
864cdfbff78SBenjamin Gaignard 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tvout-reg");
865cdfbff78SBenjamin Gaignard 	if (!res) {
866cdfbff78SBenjamin Gaignard 		DRM_ERROR("Invalid glue resource\n");
867cdfbff78SBenjamin Gaignard 		return -ENOMEM;
868cdfbff78SBenjamin Gaignard 	}
869cdfbff78SBenjamin Gaignard 	tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
87031f32a21SWei Yongjun 	if (!tvout->regs)
87131f32a21SWei Yongjun 		return -ENOMEM;
872cdfbff78SBenjamin Gaignard 
873cdfbff78SBenjamin Gaignard 	/* get reset resources */
874cdfbff78SBenjamin Gaignard 	tvout->reset = devm_reset_control_get(dev, "tvout");
875cdfbff78SBenjamin Gaignard 	/* take tvout out of reset */
876cdfbff78SBenjamin Gaignard 	if (!IS_ERR(tvout->reset))
877cdfbff78SBenjamin Gaignard 		reset_control_deassert(tvout->reset);
878cdfbff78SBenjamin Gaignard 
879cdfbff78SBenjamin Gaignard 	platform_set_drvdata(pdev, tvout);
880cdfbff78SBenjamin Gaignard 
881cdfbff78SBenjamin Gaignard 	return component_add(dev, &sti_tvout_ops);
882cdfbff78SBenjamin Gaignard }
883cdfbff78SBenjamin Gaignard 
884cdfbff78SBenjamin Gaignard static int sti_tvout_remove(struct platform_device *pdev)
885cdfbff78SBenjamin Gaignard {
886cdfbff78SBenjamin Gaignard 	component_del(&pdev->dev, &sti_tvout_ops);
887cdfbff78SBenjamin Gaignard 	return 0;
888cdfbff78SBenjamin Gaignard }
889cdfbff78SBenjamin Gaignard 
8908e932cf0SKiran Padwal static const struct of_device_id tvout_of_match[] = {
891cdfbff78SBenjamin Gaignard 	{ .compatible = "st,stih416-tvout", },
892cdfbff78SBenjamin Gaignard 	{ .compatible = "st,stih407-tvout", },
893cdfbff78SBenjamin Gaignard 	{ /* end node */ }
894cdfbff78SBenjamin Gaignard };
895cdfbff78SBenjamin Gaignard MODULE_DEVICE_TABLE(of, tvout_of_match);
896cdfbff78SBenjamin Gaignard 
897cdfbff78SBenjamin Gaignard struct platform_driver sti_tvout_driver = {
898cdfbff78SBenjamin Gaignard 	.driver = {
899cdfbff78SBenjamin Gaignard 		.name = "sti-tvout",
900cdfbff78SBenjamin Gaignard 		.owner = THIS_MODULE,
901cdfbff78SBenjamin Gaignard 		.of_match_table = tvout_of_match,
902cdfbff78SBenjamin Gaignard 	},
903cdfbff78SBenjamin Gaignard 	.probe = sti_tvout_probe,
904cdfbff78SBenjamin Gaignard 	.remove = sti_tvout_remove,
905cdfbff78SBenjamin Gaignard };
906cdfbff78SBenjamin Gaignard 
907cdfbff78SBenjamin Gaignard MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
908cdfbff78SBenjamin Gaignard MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
909cdfbff78SBenjamin Gaignard MODULE_LICENSE("GPL");
910