1e2842570SBenjamin Gaignard // SPDX-License-Identifier: GPL-2.0
296006a77SBenjamin Gaignard /*
396006a77SBenjamin Gaignard * Copyright (C) STMicroelectronics SA 2014
496006a77SBenjamin Gaignard * Authors: Vincent Abriou <vincent.abriou@st.com>
596006a77SBenjamin Gaignard * Fabien Dessenne <fabien.dessenne@st.com>
696006a77SBenjamin Gaignard * for STMicroelectronics.
796006a77SBenjamin Gaignard */
896006a77SBenjamin Gaignard
95e2f97a9SSam Ravnborg #include <linux/dma-mapping.h>
100f3e1561SArnd Bergmann #include <linux/seq_file.h>
110f3e1561SArnd Bergmann
12dd86dc2fSVincent Abriou #include <drm/drm_atomic.h>
135e2f97a9SSam Ravnborg #include <drm/drm_device.h>
146bcfe8eaSDanilo Krummrich #include <drm/drm_fb_dma_helper.h>
15720cf96dSVille Syrjälä #include <drm/drm_framebuffer.h>
164a83c26aSDanilo Krummrich #include <drm/drm_gem_dma_helper.h>
1729d1dc62SVincent Abriou
1829d1dc62SVincent Abriou #include "sti_compositor.h"
1996006a77SBenjamin Gaignard #include "sti_cursor.h"
209e1f05b2SVincent Abriou #include "sti_plane.h"
2196006a77SBenjamin Gaignard #include "sti_vtg.h"
2296006a77SBenjamin Gaignard
2396006a77SBenjamin Gaignard /* Registers */
2496006a77SBenjamin Gaignard #define CUR_CTL 0x00
2596006a77SBenjamin Gaignard #define CUR_VPO 0x0C
2696006a77SBenjamin Gaignard #define CUR_PML 0x14
2796006a77SBenjamin Gaignard #define CUR_PMP 0x18
2896006a77SBenjamin Gaignard #define CUR_SIZE 0x1C
2996006a77SBenjamin Gaignard #define CUR_CML 0x20
3096006a77SBenjamin Gaignard #define CUR_AWS 0x28
3196006a77SBenjamin Gaignard #define CUR_AWE 0x2C
3296006a77SBenjamin Gaignard
3396006a77SBenjamin Gaignard #define CUR_CTL_CLUT_UPDATE BIT(1)
3496006a77SBenjamin Gaignard
3596006a77SBenjamin Gaignard #define STI_CURS_MIN_SIZE 1
3696006a77SBenjamin Gaignard #define STI_CURS_MAX_SIZE 128
3796006a77SBenjamin Gaignard
3896006a77SBenjamin Gaignard /*
39e1a22f90SMarkus Elfring * pixmap dma buffer structure
4096006a77SBenjamin Gaignard *
4196006a77SBenjamin Gaignard * @paddr: physical address
4296006a77SBenjamin Gaignard * @size: buffer size
4396006a77SBenjamin Gaignard * @base: virtual address
4496006a77SBenjamin Gaignard */
4596006a77SBenjamin Gaignard struct dma_pixmap {
4696006a77SBenjamin Gaignard dma_addr_t paddr;
4796006a77SBenjamin Gaignard size_t size;
4896006a77SBenjamin Gaignard void *base;
4996006a77SBenjamin Gaignard };
5096006a77SBenjamin Gaignard
515dec1affSBenjamin Gaignard /*
5296006a77SBenjamin Gaignard * STI Cursor structure
5396006a77SBenjamin Gaignard *
54871bcdfeSVincent Abriou * @sti_plane: sti_plane structure
55871bcdfeSVincent Abriou * @dev: driver device
56871bcdfeSVincent Abriou * @regs: cursor registers
5796006a77SBenjamin Gaignard * @width: cursor width
5896006a77SBenjamin Gaignard * @height: cursor height
5996006a77SBenjamin Gaignard * @clut: color look up table
6096006a77SBenjamin Gaignard * @clut_paddr: color look up table physical address
6196006a77SBenjamin Gaignard * @pixmap: pixmap dma buffer (clut8-format cursor)
6296006a77SBenjamin Gaignard */
6396006a77SBenjamin Gaignard struct sti_cursor {
64871bcdfeSVincent Abriou struct sti_plane plane;
65871bcdfeSVincent Abriou struct device *dev;
66871bcdfeSVincent Abriou void __iomem *regs;
6796006a77SBenjamin Gaignard unsigned int width;
6896006a77SBenjamin Gaignard unsigned int height;
6996006a77SBenjamin Gaignard unsigned short *clut;
7096006a77SBenjamin Gaignard dma_addr_t clut_paddr;
7196006a77SBenjamin Gaignard struct dma_pixmap pixmap;
7296006a77SBenjamin Gaignard };
7396006a77SBenjamin Gaignard
7496006a77SBenjamin Gaignard static const uint32_t cursor_supported_formats[] = {
7596006a77SBenjamin Gaignard DRM_FORMAT_ARGB8888,
7696006a77SBenjamin Gaignard };
7796006a77SBenjamin Gaignard
78871bcdfeSVincent Abriou #define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)
7996006a77SBenjamin Gaignard
80f46f3bebSVincent Abriou #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
81f46f3bebSVincent Abriou readl(cursor->regs + reg))
82f46f3bebSVincent Abriou
cursor_dbg_vpo(struct seq_file * s,u32 val)83f46f3bebSVincent Abriou static void cursor_dbg_vpo(struct seq_file *s, u32 val)
84f46f3bebSVincent Abriou {
85f46f3bebSVincent Abriou seq_printf(s, "\txdo:%4d\tydo:%4d", val & 0x0FFF, (val >> 16) & 0x0FFF);
86f46f3bebSVincent Abriou }
87f46f3bebSVincent Abriou
cursor_dbg_size(struct seq_file * s,u32 val)88f46f3bebSVincent Abriou static void cursor_dbg_size(struct seq_file *s, u32 val)
89f46f3bebSVincent Abriou {
90f46f3bebSVincent Abriou seq_printf(s, "\t%d x %d", val & 0x07FF, (val >> 16) & 0x07FF);
91f46f3bebSVincent Abriou }
92f46f3bebSVincent Abriou
cursor_dbg_pml(struct seq_file * s,struct sti_cursor * cursor,u32 val)93f46f3bebSVincent Abriou static void cursor_dbg_pml(struct seq_file *s,
94f46f3bebSVincent Abriou struct sti_cursor *cursor, u32 val)
95f46f3bebSVincent Abriou {
96f46f3bebSVincent Abriou if (cursor->pixmap.paddr == val)
97f46f3bebSVincent Abriou seq_printf(s, "\tVirt @: %p", cursor->pixmap.base);
98f46f3bebSVincent Abriou }
99f46f3bebSVincent Abriou
cursor_dbg_cml(struct seq_file * s,struct sti_cursor * cursor,u32 val)100f46f3bebSVincent Abriou static void cursor_dbg_cml(struct seq_file *s,
101f46f3bebSVincent Abriou struct sti_cursor *cursor, u32 val)
102f46f3bebSVincent Abriou {
103f46f3bebSVincent Abriou if (cursor->clut_paddr == val)
104f46f3bebSVincent Abriou seq_printf(s, "\tVirt @: %p", cursor->clut);
105f46f3bebSVincent Abriou }
106f46f3bebSVincent Abriou
cursor_dbg_show(struct seq_file * s,void * data)107f46f3bebSVincent Abriou static int cursor_dbg_show(struct seq_file *s, void *data)
108f46f3bebSVincent Abriou {
109f46f3bebSVincent Abriou struct drm_info_node *node = s->private;
110f46f3bebSVincent Abriou struct sti_cursor *cursor = (struct sti_cursor *)node->info_ent->data;
111f46f3bebSVincent Abriou
112f46f3bebSVincent Abriou seq_printf(s, "%s: (vaddr = 0x%p)",
113f46f3bebSVincent Abriou sti_plane_to_str(&cursor->plane), cursor->regs);
114f46f3bebSVincent Abriou
115f46f3bebSVincent Abriou DBGFS_DUMP(CUR_CTL);
116f46f3bebSVincent Abriou DBGFS_DUMP(CUR_VPO);
117f46f3bebSVincent Abriou cursor_dbg_vpo(s, readl(cursor->regs + CUR_VPO));
118f46f3bebSVincent Abriou DBGFS_DUMP(CUR_PML);
119f46f3bebSVincent Abriou cursor_dbg_pml(s, cursor, readl(cursor->regs + CUR_PML));
120f46f3bebSVincent Abriou DBGFS_DUMP(CUR_PMP);
121f46f3bebSVincent Abriou DBGFS_DUMP(CUR_SIZE);
122f46f3bebSVincent Abriou cursor_dbg_size(s, readl(cursor->regs + CUR_SIZE));
123f46f3bebSVincent Abriou DBGFS_DUMP(CUR_CML);
124f46f3bebSVincent Abriou cursor_dbg_cml(s, cursor, readl(cursor->regs + CUR_CML));
125f46f3bebSVincent Abriou DBGFS_DUMP(CUR_AWS);
126f46f3bebSVincent Abriou DBGFS_DUMP(CUR_AWE);
127e9635133SMarkus Elfring seq_putc(s, '\n');
128f46f3bebSVincent Abriou return 0;
129f46f3bebSVincent Abriou }
130f46f3bebSVincent Abriou
131f46f3bebSVincent Abriou static struct drm_info_list cursor_debugfs_files[] = {
132f46f3bebSVincent Abriou { "cursor", cursor_dbg_show, 0, NULL },
133f46f3bebSVincent Abriou };
134f46f3bebSVincent Abriou
cursor_debugfs_init(struct sti_cursor * cursor,struct drm_minor * minor)13554ac836bSWambui Karuga static void cursor_debugfs_init(struct sti_cursor *cursor,
136f46f3bebSVincent Abriou struct drm_minor *minor)
137f46f3bebSVincent Abriou {
138f46f3bebSVincent Abriou unsigned int i;
139f46f3bebSVincent Abriou
140f46f3bebSVincent Abriou for (i = 0; i < ARRAY_SIZE(cursor_debugfs_files); i++)
141f46f3bebSVincent Abriou cursor_debugfs_files[i].data = cursor;
142f46f3bebSVincent Abriou
14354ac836bSWambui Karuga drm_debugfs_create_files(cursor_debugfs_files,
144f46f3bebSVincent Abriou ARRAY_SIZE(cursor_debugfs_files),
145f46f3bebSVincent Abriou minor->debugfs_root, minor);
146f46f3bebSVincent Abriou }
147f46f3bebSVincent Abriou
sti_cursor_argb8888_to_clut8(struct sti_cursor * cursor,u32 * src)14829d1dc62SVincent Abriou static void sti_cursor_argb8888_to_clut8(struct sti_cursor *cursor, u32 *src)
14996006a77SBenjamin Gaignard {
15096006a77SBenjamin Gaignard u8 *dst = cursor->pixmap.base;
15196006a77SBenjamin Gaignard unsigned int i, j;
15296006a77SBenjamin Gaignard u32 a, r, g, b;
15396006a77SBenjamin Gaignard
15496006a77SBenjamin Gaignard for (i = 0; i < cursor->height; i++) {
15596006a77SBenjamin Gaignard for (j = 0; j < cursor->width; j++) {
15696006a77SBenjamin Gaignard /* Pick the 2 higher bits of each component */
15796006a77SBenjamin Gaignard a = (*src >> 30) & 3;
15896006a77SBenjamin Gaignard r = (*src >> 22) & 3;
15996006a77SBenjamin Gaignard g = (*src >> 14) & 3;
16096006a77SBenjamin Gaignard b = (*src >> 6) & 3;
16196006a77SBenjamin Gaignard *dst = a << 6 | r << 4 | g << 2 | b;
16296006a77SBenjamin Gaignard src++;
16396006a77SBenjamin Gaignard dst++;
16496006a77SBenjamin Gaignard }
16596006a77SBenjamin Gaignard }
16696006a77SBenjamin Gaignard }
16796006a77SBenjamin Gaignard
sti_cursor_init(struct sti_cursor * cursor)16829d1dc62SVincent Abriou static void sti_cursor_init(struct sti_cursor *cursor)
16996006a77SBenjamin Gaignard {
17029d1dc62SVincent Abriou unsigned short *base = cursor->clut;
17129d1dc62SVincent Abriou unsigned int a, r, g, b;
17229d1dc62SVincent Abriou
17329d1dc62SVincent Abriou /* Assign CLUT values, ARGB444 format */
17429d1dc62SVincent Abriou for (a = 0; a < 4; a++)
17529d1dc62SVincent Abriou for (r = 0; r < 4; r++)
17629d1dc62SVincent Abriou for (g = 0; g < 4; g++)
17729d1dc62SVincent Abriou for (b = 0; b < 4; b++)
17829d1dc62SVincent Abriou *base++ = (a * 5) << 12 |
17929d1dc62SVincent Abriou (r * 5) << 8 |
18029d1dc62SVincent Abriou (g * 5) << 4 |
18129d1dc62SVincent Abriou (b * 5);
18229d1dc62SVincent Abriou }
18329d1dc62SVincent Abriou
sti_cursor_atomic_check(struct drm_plane * drm_plane,struct drm_atomic_state * state)184dd86dc2fSVincent Abriou static int sti_cursor_atomic_check(struct drm_plane *drm_plane,
1857c11b99aSMaxime Ripard struct drm_atomic_state *state)
18629d1dc62SVincent Abriou {
1877c11b99aSMaxime Ripard struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
1887c11b99aSMaxime Ripard drm_plane);
18929d1dc62SVincent Abriou struct sti_plane *plane = to_sti_plane(drm_plane);
190871bcdfeSVincent Abriou struct sti_cursor *cursor = to_sti_cursor(plane);
191ba5c1649SMaxime Ripard struct drm_crtc *crtc = new_plane_state->crtc;
192ba5c1649SMaxime Ripard struct drm_framebuffer *fb = new_plane_state->fb;
193dd86dc2fSVincent Abriou struct drm_crtc_state *crtc_state;
194dd86dc2fSVincent Abriou struct drm_display_mode *mode;
195dd86dc2fSVincent Abriou int dst_x, dst_y, dst_w, dst_h;
196dd86dc2fSVincent Abriou int src_w, src_h;
197dd86dc2fSVincent Abriou
198dd86dc2fSVincent Abriou /* no need for further checks if the plane is being disabled */
199dd86dc2fSVincent Abriou if (!crtc || !fb)
200dd86dc2fSVincent Abriou return 0;
201dd86dc2fSVincent Abriou
202dec92020SMaxime Ripard crtc_state = drm_atomic_get_crtc_state(state, crtc);
203*8ab73ac9SMa Ke if (IS_ERR(crtc_state))
204*8ab73ac9SMa Ke return PTR_ERR(crtc_state);
205*8ab73ac9SMa Ke
206dd86dc2fSVincent Abriou mode = &crtc_state->mode;
207ba5c1649SMaxime Ripard dst_x = new_plane_state->crtc_x;
208ba5c1649SMaxime Ripard dst_y = new_plane_state->crtc_y;
209ba5c1649SMaxime Ripard dst_w = clamp_val(new_plane_state->crtc_w, 0,
210ba5c1649SMaxime Ripard mode->crtc_hdisplay - dst_x);
211ba5c1649SMaxime Ripard dst_h = clamp_val(new_plane_state->crtc_h, 0,
212ba5c1649SMaxime Ripard mode->crtc_vdisplay - dst_y);
21329d1dc62SVincent Abriou /* src_x are in 16.16 format */
214ba5c1649SMaxime Ripard src_w = new_plane_state->src_w >> 16;
215ba5c1649SMaxime Ripard src_h = new_plane_state->src_h >> 16;
21696006a77SBenjamin Gaignard
21729d1dc62SVincent Abriou if (src_w < STI_CURS_MIN_SIZE ||
21829d1dc62SVincent Abriou src_h < STI_CURS_MIN_SIZE ||
21929d1dc62SVincent Abriou src_w > STI_CURS_MAX_SIZE ||
22029d1dc62SVincent Abriou src_h > STI_CURS_MAX_SIZE) {
22196006a77SBenjamin Gaignard DRM_ERROR("Invalid cursor size (%dx%d)\n",
22229d1dc62SVincent Abriou src_w, src_h);
223dd86dc2fSVincent Abriou return -EINVAL;
22496006a77SBenjamin Gaignard }
22596006a77SBenjamin Gaignard
22696006a77SBenjamin Gaignard /* If the cursor size has changed, re-allocated the pixmap */
22796006a77SBenjamin Gaignard if (!cursor->pixmap.base ||
22829d1dc62SVincent Abriou (cursor->width != src_w) ||
22929d1dc62SVincent Abriou (cursor->height != src_h)) {
23029d1dc62SVincent Abriou cursor->width = src_w;
23129d1dc62SVincent Abriou cursor->height = src_h;
23296006a77SBenjamin Gaignard
23396006a77SBenjamin Gaignard if (cursor->pixmap.base)
234f6e45661SLuis R. Rodriguez dma_free_wc(cursor->dev, cursor->pixmap.size,
235f6e45661SLuis R. Rodriguez cursor->pixmap.base, cursor->pixmap.paddr);
23696006a77SBenjamin Gaignard
23796006a77SBenjamin Gaignard cursor->pixmap.size = cursor->width * cursor->height;
23896006a77SBenjamin Gaignard
239f6e45661SLuis R. Rodriguez cursor->pixmap.base = dma_alloc_wc(cursor->dev,
24096006a77SBenjamin Gaignard cursor->pixmap.size,
24196006a77SBenjamin Gaignard &cursor->pixmap.paddr,
24296006a77SBenjamin Gaignard GFP_KERNEL | GFP_DMA);
24396006a77SBenjamin Gaignard if (!cursor->pixmap.base) {
24496006a77SBenjamin Gaignard DRM_ERROR("Failed to allocate memory for pixmap\n");
245dd86dc2fSVincent Abriou return -EINVAL;
24696006a77SBenjamin Gaignard }
24796006a77SBenjamin Gaignard }
24896006a77SBenjamin Gaignard
2496bcfe8eaSDanilo Krummrich if (!drm_fb_dma_get_gem_obj(fb, 0)) {
2504a83c26aSDanilo Krummrich DRM_ERROR("Can't get DMA GEM object for fb\n");
251dd86dc2fSVincent Abriou return -EINVAL;
25229d1dc62SVincent Abriou }
25329d1dc62SVincent Abriou
254dd86dc2fSVincent Abriou DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
255dd86dc2fSVincent Abriou crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)),
256dd86dc2fSVincent Abriou drm_plane->base.id, sti_plane_to_str(plane));
257dd86dc2fSVincent Abriou DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y);
258dd86dc2fSVincent Abriou
259dd86dc2fSVincent Abriou return 0;
260dd86dc2fSVincent Abriou }
261dd86dc2fSVincent Abriou
sti_cursor_atomic_update(struct drm_plane * drm_plane,struct drm_atomic_state * state)262dd86dc2fSVincent Abriou static void sti_cursor_atomic_update(struct drm_plane *drm_plane,
263977697e2SMaxime Ripard struct drm_atomic_state *state)
264dd86dc2fSVincent Abriou {
26537418bf1SMaxime Ripard struct drm_plane_state *newstate = drm_atomic_get_new_plane_state(state,
26637418bf1SMaxime Ripard drm_plane);
267dd86dc2fSVincent Abriou struct sti_plane *plane = to_sti_plane(drm_plane);
268dd86dc2fSVincent Abriou struct sti_cursor *cursor = to_sti_cursor(plane);
26941016fe1SMaxime Ripard struct drm_crtc *crtc = newstate->crtc;
27041016fe1SMaxime Ripard struct drm_framebuffer *fb = newstate->fb;
271dd86dc2fSVincent Abriou struct drm_display_mode *mode;
272dd86dc2fSVincent Abriou int dst_x, dst_y;
2734a83c26aSDanilo Krummrich struct drm_gem_dma_object *dma_obj;
274dd86dc2fSVincent Abriou u32 y, x;
275dd86dc2fSVincent Abriou u32 val;
276dd86dc2fSVincent Abriou
277dd86dc2fSVincent Abriou if (!crtc || !fb)
278dd86dc2fSVincent Abriou return;
279dd86dc2fSVincent Abriou
280dd86dc2fSVincent Abriou mode = &crtc->mode;
28141016fe1SMaxime Ripard dst_x = newstate->crtc_x;
28241016fe1SMaxime Ripard dst_y = newstate->crtc_y;
283dd86dc2fSVincent Abriou
2844a83c26aSDanilo Krummrich dma_obj = drm_fb_dma_get_gem_obj(fb, 0);
285dd86dc2fSVincent Abriou
28696006a77SBenjamin Gaignard /* Convert ARGB8888 to CLUT8 */
2874a83c26aSDanilo Krummrich sti_cursor_argb8888_to_clut8(cursor, (u32 *)dma_obj->vaddr);
28896006a77SBenjamin Gaignard
28996006a77SBenjamin Gaignard /* AWS and AWE depend on the mode */
29096006a77SBenjamin Gaignard y = sti_vtg_get_line_number(*mode, 0);
29196006a77SBenjamin Gaignard x = sti_vtg_get_pixel_number(*mode, 0);
29296006a77SBenjamin Gaignard val = y << 16 | x;
293871bcdfeSVincent Abriou writel(val, cursor->regs + CUR_AWS);
29496006a77SBenjamin Gaignard y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
29596006a77SBenjamin Gaignard x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
29696006a77SBenjamin Gaignard val = y << 16 | x;
297871bcdfeSVincent Abriou writel(val, cursor->regs + CUR_AWE);
29896006a77SBenjamin Gaignard
29996006a77SBenjamin Gaignard /* Set memory location, size, and position */
300871bcdfeSVincent Abriou writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
301871bcdfeSVincent Abriou writel(cursor->width, cursor->regs + CUR_PMP);
302871bcdfeSVincent Abriou writel(cursor->height << 16 | cursor->width, cursor->regs + CUR_SIZE);
30396006a77SBenjamin Gaignard
30429d1dc62SVincent Abriou y = sti_vtg_get_line_number(*mode, dst_y);
305b83a8b53Sbenjamin.gaignard@linaro.org x = sti_vtg_get_pixel_number(*mode, dst_x);
30629d1dc62SVincent Abriou writel((y << 16) | x, cursor->regs + CUR_VPO);
30796006a77SBenjamin Gaignard
3080b9d0416SFabien Dessenne /* Set and fetch CLUT */
3090b9d0416SFabien Dessenne writel(cursor->clut_paddr, cursor->regs + CUR_CML);
3100b9d0416SFabien Dessenne writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);
3110b9d0416SFabien Dessenne
312bf8f9e4aSVincent Abriou sti_plane_update_fps(plane, true, false);
313bf8f9e4aSVincent Abriou
31429d1dc62SVincent Abriou plane->status = STI_PLANE_UPDATED;
31596006a77SBenjamin Gaignard }
31696006a77SBenjamin Gaignard
sti_cursor_atomic_disable(struct drm_plane * drm_plane,struct drm_atomic_state * state)31729d1dc62SVincent Abriou static void sti_cursor_atomic_disable(struct drm_plane *drm_plane,
318977697e2SMaxime Ripard struct drm_atomic_state *state)
31996006a77SBenjamin Gaignard {
320977697e2SMaxime Ripard struct drm_plane_state *oldstate = drm_atomic_get_old_plane_state(state,
321977697e2SMaxime Ripard drm_plane);
32229d1dc62SVincent Abriou struct sti_plane *plane = to_sti_plane(drm_plane);
32329d1dc62SVincent Abriou
3245552aad3SFabien Dessenne if (!oldstate->crtc) {
32529d1dc62SVincent Abriou DRM_DEBUG_DRIVER("drm plane:%d not enabled\n",
32629d1dc62SVincent Abriou drm_plane->base.id);
32729d1dc62SVincent Abriou return;
32896006a77SBenjamin Gaignard }
32996006a77SBenjamin Gaignard
33029d1dc62SVincent Abriou DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n",
3315552aad3SFabien Dessenne oldstate->crtc->base.id,
3325552aad3SFabien Dessenne sti_mixer_to_str(to_sti_mixer(oldstate->crtc)),
33329d1dc62SVincent Abriou drm_plane->base.id, sti_plane_to_str(plane));
33496006a77SBenjamin Gaignard
33529d1dc62SVincent Abriou plane->status = STI_PLANE_DISABLING;
33696006a77SBenjamin Gaignard }
33796006a77SBenjamin Gaignard
33829d1dc62SVincent Abriou static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = {
339dd86dc2fSVincent Abriou .atomic_check = sti_cursor_atomic_check,
34029d1dc62SVincent Abriou .atomic_update = sti_cursor_atomic_update,
34129d1dc62SVincent Abriou .atomic_disable = sti_cursor_atomic_disable,
34296006a77SBenjamin Gaignard };
34396006a77SBenjamin Gaignard
sti_cursor_late_register(struct drm_plane * drm_plane)34483af0a48SBenjamin Gaignard static int sti_cursor_late_register(struct drm_plane *drm_plane)
34583af0a48SBenjamin Gaignard {
34683af0a48SBenjamin Gaignard struct sti_plane *plane = to_sti_plane(drm_plane);
34783af0a48SBenjamin Gaignard struct sti_cursor *cursor = to_sti_cursor(plane);
34883af0a48SBenjamin Gaignard
34954ac836bSWambui Karuga cursor_debugfs_init(cursor, drm_plane->dev->primary);
35054ac836bSWambui Karuga
35154ac836bSWambui Karuga return 0;
35283af0a48SBenjamin Gaignard }
35383af0a48SBenjamin Gaignard
354bdfd36efSVille Syrjälä static const struct drm_plane_funcs sti_cursor_plane_helpers_funcs = {
35583af0a48SBenjamin Gaignard .update_plane = drm_atomic_helper_update_plane,
35683af0a48SBenjamin Gaignard .disable_plane = drm_atomic_helper_disable_plane,
357739fac48SLaurent Pinchart .destroy = drm_plane_cleanup,
35867f0f2e4SMaxime Ripard .reset = drm_atomic_helper_plane_reset,
35983af0a48SBenjamin Gaignard .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
36083af0a48SBenjamin Gaignard .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
36183af0a48SBenjamin Gaignard .late_register = sti_cursor_late_register,
36283af0a48SBenjamin Gaignard };
36383af0a48SBenjamin Gaignard
sti_cursor_create(struct drm_device * drm_dev,struct device * dev,int desc,void __iomem * baseaddr,unsigned int possible_crtcs)36429d1dc62SVincent Abriou struct drm_plane *sti_cursor_create(struct drm_device *drm_dev,
36529d1dc62SVincent Abriou struct device *dev, int desc,
36629d1dc62SVincent Abriou void __iomem *baseaddr,
36729d1dc62SVincent Abriou unsigned int possible_crtcs)
36896006a77SBenjamin Gaignard {
36996006a77SBenjamin Gaignard struct sti_cursor *cursor;
37029d1dc62SVincent Abriou size_t size;
37129d1dc62SVincent Abriou int res;
37296006a77SBenjamin Gaignard
37396006a77SBenjamin Gaignard cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
37496006a77SBenjamin Gaignard if (!cursor) {
37596006a77SBenjamin Gaignard DRM_ERROR("Failed to allocate memory for cursor\n");
37696006a77SBenjamin Gaignard return NULL;
37796006a77SBenjamin Gaignard }
37896006a77SBenjamin Gaignard
37996006a77SBenjamin Gaignard /* Allocate clut buffer */
38029d1dc62SVincent Abriou size = 0x100 * sizeof(unsigned short);
381f6e45661SLuis R. Rodriguez cursor->clut = dma_alloc_wc(dev, size, &cursor->clut_paddr,
38296006a77SBenjamin Gaignard GFP_KERNEL | GFP_DMA);
38396006a77SBenjamin Gaignard
38496006a77SBenjamin Gaignard if (!cursor->clut) {
38596006a77SBenjamin Gaignard DRM_ERROR("Failed to allocate memory for cursor clut\n");
38629d1dc62SVincent Abriou goto err_clut;
38796006a77SBenjamin Gaignard }
38896006a77SBenjamin Gaignard
389871bcdfeSVincent Abriou cursor->dev = dev;
390871bcdfeSVincent Abriou cursor->regs = baseaddr;
391871bcdfeSVincent Abriou cursor->plane.desc = desc;
39229d1dc62SVincent Abriou cursor->plane.status = STI_PLANE_DISABLED;
39396006a77SBenjamin Gaignard
394871bcdfeSVincent Abriou sti_cursor_init(cursor);
395871bcdfeSVincent Abriou
39629d1dc62SVincent Abriou res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,
39729d1dc62SVincent Abriou possible_crtcs,
39883af0a48SBenjamin Gaignard &sti_cursor_plane_helpers_funcs,
39929d1dc62SVincent Abriou cursor_supported_formats,
40029d1dc62SVincent Abriou ARRAY_SIZE(cursor_supported_formats),
401e6fc3b68SBen Widawsky NULL, DRM_PLANE_TYPE_CURSOR, NULL);
40229d1dc62SVincent Abriou if (res) {
40329d1dc62SVincent Abriou DRM_ERROR("Failed to initialize universal plane\n");
40429d1dc62SVincent Abriou goto err_plane;
40529d1dc62SVincent Abriou }
40629d1dc62SVincent Abriou
40729d1dc62SVincent Abriou drm_plane_helper_add(&cursor->plane.drm_plane,
40829d1dc62SVincent Abriou &sti_cursor_helpers_funcs);
40929d1dc62SVincent Abriou
41029d1dc62SVincent Abriou sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);
41129d1dc62SVincent Abriou
41229d1dc62SVincent Abriou return &cursor->plane.drm_plane;
41329d1dc62SVincent Abriou
41429d1dc62SVincent Abriou err_plane:
415f6e45661SLuis R. Rodriguez dma_free_wc(dev, size, cursor->clut, cursor->clut_paddr);
41629d1dc62SVincent Abriou err_clut:
41729d1dc62SVincent Abriou devm_kfree(dev, cursor);
41829d1dc62SVincent Abriou return NULL;
41996006a77SBenjamin Gaignard }
420