1e2842570SBenjamin Gaignard /* SPDX-License-Identifier: GPL-2.0 */ 2f32c4c50SBenjamin Gaignard /* 3f32c4c50SBenjamin Gaignard * Copyright (C) STMicroelectronics SA 2014 4f32c4c50SBenjamin Gaignard * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics. 5f32c4c50SBenjamin Gaignard */ 6f32c4c50SBenjamin Gaignard 7f32c4c50SBenjamin Gaignard #ifndef _STI_AWG_UTILS_H_ 8f32c4c50SBenjamin Gaignard #define _STI_AWG_UTILS_H_ 9f32c4c50SBenjamin Gaignard 10*5e2f97a9SSam Ravnborg #include <linux/types.h> 11f32c4c50SBenjamin Gaignard 12f32c4c50SBenjamin Gaignard #define AWG_MAX_INST 64 13f32c4c50SBenjamin Gaignard 14f32c4c50SBenjamin Gaignard struct awg_code_generation_params { 15f32c4c50SBenjamin Gaignard u32 *ram_code; 16f32c4c50SBenjamin Gaignard u8 instruction_offset; 17f32c4c50SBenjamin Gaignard }; 18f32c4c50SBenjamin Gaignard 19f32c4c50SBenjamin Gaignard struct awg_timing { 20f32c4c50SBenjamin Gaignard u32 total_lines; 21f32c4c50SBenjamin Gaignard u32 active_lines; 22f32c4c50SBenjamin Gaignard u32 blanking_lines; 23f32c4c50SBenjamin Gaignard u32 trailing_lines; 24f32c4c50SBenjamin Gaignard u32 total_pixels; 25f32c4c50SBenjamin Gaignard u32 active_pixels; 26f32c4c50SBenjamin Gaignard u32 blanking_pixels; 27f32c4c50SBenjamin Gaignard u32 trailing_pixels; 28f32c4c50SBenjamin Gaignard u32 blanking_level; 29f32c4c50SBenjamin Gaignard }; 30f32c4c50SBenjamin Gaignard 31f32c4c50SBenjamin Gaignard int sti_awg_generate_code_data_enable_mode( 32f32c4c50SBenjamin Gaignard struct awg_code_generation_params *fw_gen_params, 33f32c4c50SBenjamin Gaignard struct awg_timing *timing); 34f32c4c50SBenjamin Gaignard #endif 35