1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * DRM driver for Solomon SSD130x OLED displays 4 * 5 * Copyright 2022 Red Hat Inc. 6 * Author: Javier Martinez Canillas <javierm@redhat.com> 7 * 8 * Based on drivers/video/fbdev/ssd1307fb.c 9 * Copyright 2012 Free Electrons 10 */ 11 12 #include <linux/backlight.h> 13 #include <linux/bitfield.h> 14 #include <linux/bits.h> 15 #include <linux/delay.h> 16 #include <linux/gpio/consumer.h> 17 #include <linux/property.h> 18 #include <linux/pwm.h> 19 #include <linux/regulator/consumer.h> 20 21 #include <drm/drm_atomic.h> 22 #include <drm/drm_atomic_helper.h> 23 #include <drm/drm_crtc_helper.h> 24 #include <drm/drm_damage_helper.h> 25 #include <drm/drm_edid.h> 26 #include <drm/drm_fbdev_generic.h> 27 #include <drm/drm_format_helper.h> 28 #include <drm/drm_framebuffer.h> 29 #include <drm/drm_gem_atomic_helper.h> 30 #include <drm/drm_gem_framebuffer_helper.h> 31 #include <drm/drm_gem_shmem_helper.h> 32 #include <drm/drm_managed.h> 33 #include <drm/drm_modes.h> 34 #include <drm/drm_rect.h> 35 #include <drm/drm_probe_helper.h> 36 37 #include "ssd130x.h" 38 39 #define DRIVER_NAME "ssd130x" 40 #define DRIVER_DESC "DRM driver for Solomon SSD130x OLED displays" 41 #define DRIVER_DATE "20220131" 42 #define DRIVER_MAJOR 1 43 #define DRIVER_MINOR 0 44 45 #define SSD130X_PAGE_COL_START_LOW 0x00 46 #define SSD130X_PAGE_COL_START_HIGH 0x10 47 #define SSD130X_SET_ADDRESS_MODE 0x20 48 #define SSD130X_SET_COL_RANGE 0x21 49 #define SSD130X_SET_PAGE_RANGE 0x22 50 #define SSD130X_CONTRAST 0x81 51 #define SSD130X_SET_LOOKUP_TABLE 0x91 52 #define SSD130X_CHARGE_PUMP 0x8d 53 #define SSD130X_SET_SEG_REMAP 0xa0 54 #define SSD130X_DISPLAY_OFF 0xae 55 #define SSD130X_SET_MULTIPLEX_RATIO 0xa8 56 #define SSD130X_DISPLAY_ON 0xaf 57 #define SSD130X_START_PAGE_ADDRESS 0xb0 58 #define SSD130X_SET_COM_SCAN_DIR 0xc0 59 #define SSD130X_SET_DISPLAY_OFFSET 0xd3 60 #define SSD130X_SET_CLOCK_FREQ 0xd5 61 #define SSD130X_SET_AREA_COLOR_MODE 0xd8 62 #define SSD130X_SET_PRECHARGE_PERIOD 0xd9 63 #define SSD130X_SET_COM_PINS_CONFIG 0xda 64 #define SSD130X_SET_VCOMH 0xdb 65 66 #define SSD130X_PAGE_COL_START_MASK GENMASK(3, 0) 67 #define SSD130X_PAGE_COL_START_HIGH_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val) >> 4) 68 #define SSD130X_PAGE_COL_START_LOW_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val)) 69 #define SSD130X_START_PAGE_ADDRESS_MASK GENMASK(2, 0) 70 #define SSD130X_START_PAGE_ADDRESS_SET(val) FIELD_PREP(SSD130X_START_PAGE_ADDRESS_MASK, (val)) 71 #define SSD130X_SET_SEG_REMAP_MASK GENMASK(0, 0) 72 #define SSD130X_SET_SEG_REMAP_SET(val) FIELD_PREP(SSD130X_SET_SEG_REMAP_MASK, (val)) 73 #define SSD130X_SET_COM_SCAN_DIR_MASK GENMASK(3, 3) 74 #define SSD130X_SET_COM_SCAN_DIR_SET(val) FIELD_PREP(SSD130X_SET_COM_SCAN_DIR_MASK, (val)) 75 #define SSD130X_SET_CLOCK_DIV_MASK GENMASK(3, 0) 76 #define SSD130X_SET_CLOCK_DIV_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_DIV_MASK, (val)) 77 #define SSD130X_SET_CLOCK_FREQ_MASK GENMASK(7, 4) 78 #define SSD130X_SET_CLOCK_FREQ_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_FREQ_MASK, (val)) 79 #define SSD130X_SET_PRECHARGE_PERIOD1_MASK GENMASK(3, 0) 80 #define SSD130X_SET_PRECHARGE_PERIOD1_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD1_MASK, (val)) 81 #define SSD130X_SET_PRECHARGE_PERIOD2_MASK GENMASK(7, 4) 82 #define SSD130X_SET_PRECHARGE_PERIOD2_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD2_MASK, (val)) 83 #define SSD130X_SET_COM_PINS_CONFIG1_MASK GENMASK(4, 4) 84 #define SSD130X_SET_COM_PINS_CONFIG1_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG1_MASK, (val)) 85 #define SSD130X_SET_COM_PINS_CONFIG2_MASK GENMASK(5, 5) 86 #define SSD130X_SET_COM_PINS_CONFIG2_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG2_MASK, (val)) 87 88 #define SSD130X_SET_ADDRESS_MODE_HORIZONTAL 0x00 89 #define SSD130X_SET_ADDRESS_MODE_VERTICAL 0x01 90 #define SSD130X_SET_ADDRESS_MODE_PAGE 0x02 91 92 #define SSD130X_SET_AREA_COLOR_MODE_ENABLE 0x1e 93 #define SSD130X_SET_AREA_COLOR_MODE_LOW_POWER 0x05 94 95 #define MAX_CONTRAST 255 96 97 const struct ssd130x_deviceinfo ssd130x_variants[] = { 98 [SH1106_ID] = { 99 .default_vcomh = 0x40, 100 .default_dclk_div = 1, 101 .default_dclk_frq = 5, 102 .default_width = 132, 103 .default_height = 64, 104 .page_mode_only = 1, 105 .page_height = 8, 106 }, 107 [SSD1305_ID] = { 108 .default_vcomh = 0x34, 109 .default_dclk_div = 1, 110 .default_dclk_frq = 7, 111 .default_width = 132, 112 .default_height = 64, 113 .page_height = 8, 114 }, 115 [SSD1306_ID] = { 116 .default_vcomh = 0x20, 117 .default_dclk_div = 1, 118 .default_dclk_frq = 8, 119 .need_chargepump = 1, 120 .default_width = 128, 121 .default_height = 64, 122 .page_height = 8, 123 }, 124 [SSD1307_ID] = { 125 .default_vcomh = 0x20, 126 .default_dclk_div = 2, 127 .default_dclk_frq = 12, 128 .need_pwm = 1, 129 .default_width = 128, 130 .default_height = 39, 131 .page_height = 8, 132 }, 133 [SSD1309_ID] = { 134 .default_vcomh = 0x34, 135 .default_dclk_div = 1, 136 .default_dclk_frq = 10, 137 .default_width = 128, 138 .default_height = 64, 139 .page_height = 8, 140 } 141 }; 142 EXPORT_SYMBOL_NS_GPL(ssd130x_variants, DRM_SSD130X); 143 144 static inline struct ssd130x_device *drm_to_ssd130x(struct drm_device *drm) 145 { 146 return container_of(drm, struct ssd130x_device, drm); 147 } 148 149 /* 150 * Helper to write data (SSD130X_DATA) to the device. 151 */ 152 static int ssd130x_write_data(struct ssd130x_device *ssd130x, u8 *values, int count) 153 { 154 return regmap_bulk_write(ssd130x->regmap, SSD130X_DATA, values, count); 155 } 156 157 /* 158 * Helper to write command (SSD130X_COMMAND). The fist variadic argument 159 * is the command to write and the following are the command options. 160 * 161 * Note that the ssd130x protocol requires each command and option to be 162 * written as a SSD130X_COMMAND device register value. That is why a call 163 * to regmap_write(..., SSD130X_COMMAND, ...) is done for each argument. 164 */ 165 static int ssd130x_write_cmd(struct ssd130x_device *ssd130x, int count, 166 /* u8 cmd, u8 option, ... */...) 167 { 168 va_list ap; 169 u8 value; 170 int ret; 171 172 va_start(ap, count); 173 174 do { 175 value = va_arg(ap, int); 176 ret = regmap_write(ssd130x->regmap, SSD130X_COMMAND, value); 177 if (ret) 178 goto out_end; 179 } while (--count); 180 181 out_end: 182 va_end(ap); 183 184 return ret; 185 } 186 187 /* Set address range for horizontal/vertical addressing modes */ 188 static int ssd130x_set_col_range(struct ssd130x_device *ssd130x, 189 u8 col_start, u8 cols) 190 { 191 u8 col_end = col_start + cols - 1; 192 int ret; 193 194 if (col_start == ssd130x->col_start && col_end == ssd130x->col_end) 195 return 0; 196 197 ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_COL_RANGE, col_start, col_end); 198 if (ret < 0) 199 return ret; 200 201 ssd130x->col_start = col_start; 202 ssd130x->col_end = col_end; 203 return 0; 204 } 205 206 static int ssd130x_set_page_range(struct ssd130x_device *ssd130x, 207 u8 page_start, u8 pages) 208 { 209 u8 page_end = page_start + pages - 1; 210 int ret; 211 212 if (page_start == ssd130x->page_start && page_end == ssd130x->page_end) 213 return 0; 214 215 ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_PAGE_RANGE, page_start, page_end); 216 if (ret < 0) 217 return ret; 218 219 ssd130x->page_start = page_start; 220 ssd130x->page_end = page_end; 221 return 0; 222 } 223 224 /* Set page and column start address for page addressing mode */ 225 static int ssd130x_set_page_pos(struct ssd130x_device *ssd130x, 226 u8 page_start, u8 col_start) 227 { 228 int ret; 229 u32 page, col_low, col_high; 230 231 page = SSD130X_START_PAGE_ADDRESS | 232 SSD130X_START_PAGE_ADDRESS_SET(page_start); 233 col_low = SSD130X_PAGE_COL_START_LOW | 234 SSD130X_PAGE_COL_START_LOW_SET(col_start); 235 col_high = SSD130X_PAGE_COL_START_HIGH | 236 SSD130X_PAGE_COL_START_HIGH_SET(col_start); 237 ret = ssd130x_write_cmd(ssd130x, 3, page, col_low, col_high); 238 if (ret < 0) 239 return ret; 240 241 return 0; 242 } 243 244 static int ssd130x_pwm_enable(struct ssd130x_device *ssd130x) 245 { 246 struct device *dev = ssd130x->dev; 247 struct pwm_state pwmstate; 248 249 ssd130x->pwm = pwm_get(dev, NULL); 250 if (IS_ERR(ssd130x->pwm)) { 251 dev_err(dev, "Could not get PWM from firmware description!\n"); 252 return PTR_ERR(ssd130x->pwm); 253 } 254 255 pwm_init_state(ssd130x->pwm, &pwmstate); 256 pwm_set_relative_duty_cycle(&pwmstate, 50, 100); 257 pwm_apply_state(ssd130x->pwm, &pwmstate); 258 259 /* Enable the PWM */ 260 pwm_enable(ssd130x->pwm); 261 262 dev_dbg(dev, "Using PWM%d with a %lluns period.\n", 263 ssd130x->pwm->pwm, pwm_get_period(ssd130x->pwm)); 264 265 return 0; 266 } 267 268 static void ssd130x_reset(struct ssd130x_device *ssd130x) 269 { 270 if (!ssd130x->reset) 271 return; 272 273 /* Reset the screen */ 274 gpiod_set_value_cansleep(ssd130x->reset, 1); 275 udelay(4); 276 gpiod_set_value_cansleep(ssd130x->reset, 0); 277 udelay(4); 278 } 279 280 static int ssd130x_power_on(struct ssd130x_device *ssd130x) 281 { 282 struct device *dev = ssd130x->dev; 283 int ret; 284 285 ssd130x_reset(ssd130x); 286 287 ret = regulator_enable(ssd130x->vcc_reg); 288 if (ret) { 289 dev_err(dev, "Failed to enable VCC: %d\n", ret); 290 return ret; 291 } 292 293 if (ssd130x->device_info->need_pwm) { 294 ret = ssd130x_pwm_enable(ssd130x); 295 if (ret) { 296 dev_err(dev, "Failed to enable PWM: %d\n", ret); 297 regulator_disable(ssd130x->vcc_reg); 298 return ret; 299 } 300 } 301 302 return 0; 303 } 304 305 static void ssd130x_power_off(struct ssd130x_device *ssd130x) 306 { 307 pwm_disable(ssd130x->pwm); 308 pwm_put(ssd130x->pwm); 309 310 regulator_disable(ssd130x->vcc_reg); 311 } 312 313 static int ssd130x_init(struct ssd130x_device *ssd130x) 314 { 315 u32 precharge, dclk, com_invdir, compins, chargepump, seg_remap; 316 bool scan_mode; 317 int ret; 318 319 /* Set initial contrast */ 320 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CONTRAST, ssd130x->contrast); 321 if (ret < 0) 322 return ret; 323 324 /* Set segment re-map */ 325 seg_remap = (SSD130X_SET_SEG_REMAP | 326 SSD130X_SET_SEG_REMAP_SET(ssd130x->seg_remap)); 327 ret = ssd130x_write_cmd(ssd130x, 1, seg_remap); 328 if (ret < 0) 329 return ret; 330 331 /* Set COM direction */ 332 com_invdir = (SSD130X_SET_COM_SCAN_DIR | 333 SSD130X_SET_COM_SCAN_DIR_SET(ssd130x->com_invdir)); 334 ret = ssd130x_write_cmd(ssd130x, 1, com_invdir); 335 if (ret < 0) 336 return ret; 337 338 /* Set multiplex ratio value */ 339 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_MULTIPLEX_RATIO, ssd130x->height - 1); 340 if (ret < 0) 341 return ret; 342 343 /* set display offset value */ 344 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_DISPLAY_OFFSET, ssd130x->com_offset); 345 if (ret < 0) 346 return ret; 347 348 /* Set clock frequency */ 349 dclk = (SSD130X_SET_CLOCK_DIV_SET(ssd130x->dclk_div - 1) | 350 SSD130X_SET_CLOCK_FREQ_SET(ssd130x->dclk_frq)); 351 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_CLOCK_FREQ, dclk); 352 if (ret < 0) 353 return ret; 354 355 /* Set Area Color Mode ON/OFF & Low Power Display Mode */ 356 if (ssd130x->area_color_enable || ssd130x->low_power) { 357 u32 mode = 0; 358 359 if (ssd130x->area_color_enable) 360 mode |= SSD130X_SET_AREA_COLOR_MODE_ENABLE; 361 362 if (ssd130x->low_power) 363 mode |= SSD130X_SET_AREA_COLOR_MODE_LOW_POWER; 364 365 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_AREA_COLOR_MODE, mode); 366 if (ret < 0) 367 return ret; 368 } 369 370 /* Set precharge period in number of ticks from the internal clock */ 371 precharge = (SSD130X_SET_PRECHARGE_PERIOD1_SET(ssd130x->prechargep1) | 372 SSD130X_SET_PRECHARGE_PERIOD2_SET(ssd130x->prechargep2)); 373 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_PRECHARGE_PERIOD, precharge); 374 if (ret < 0) 375 return ret; 376 377 /* Set COM pins configuration */ 378 compins = BIT(1); 379 /* 380 * The COM scan mode field values are the inverse of the boolean DT 381 * property "solomon,com-seq". The value 0b means scan from COM0 to 382 * COM[N - 1] while 1b means scan from COM[N - 1] to COM0. 383 */ 384 scan_mode = !ssd130x->com_seq; 385 compins |= (SSD130X_SET_COM_PINS_CONFIG1_SET(scan_mode) | 386 SSD130X_SET_COM_PINS_CONFIG2_SET(ssd130x->com_lrremap)); 387 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_COM_PINS_CONFIG, compins); 388 if (ret < 0) 389 return ret; 390 391 /* Set VCOMH */ 392 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_VCOMH, ssd130x->vcomh); 393 if (ret < 0) 394 return ret; 395 396 /* Turn on the DC-DC Charge Pump */ 397 chargepump = BIT(4); 398 399 if (ssd130x->device_info->need_chargepump) 400 chargepump |= BIT(2); 401 402 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CHARGE_PUMP, chargepump); 403 if (ret < 0) 404 return ret; 405 406 /* Set lookup table */ 407 if (ssd130x->lookup_table_set) { 408 int i; 409 410 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_SET_LOOKUP_TABLE); 411 if (ret < 0) 412 return ret; 413 414 for (i = 0; i < ARRAY_SIZE(ssd130x->lookup_table); i++) { 415 u8 val = ssd130x->lookup_table[i]; 416 417 if (val < 31 || val > 63) 418 dev_warn(ssd130x->dev, 419 "lookup table index %d value out of range 31 <= %d <= 63\n", 420 i, val); 421 ret = ssd130x_write_cmd(ssd130x, 1, val); 422 if (ret < 0) 423 return ret; 424 } 425 } 426 427 /* Switch to page addressing mode */ 428 if (ssd130x->page_address_mode) 429 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE, 430 SSD130X_SET_ADDRESS_MODE_PAGE); 431 432 /* Switch to horizontal addressing mode */ 433 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE, 434 SSD130X_SET_ADDRESS_MODE_HORIZONTAL); 435 } 436 437 static int ssd130x_update_rect(struct ssd130x_device *ssd130x, struct drm_rect *rect) 438 { 439 unsigned int x = rect->x1; 440 unsigned int y = rect->y1; 441 u8 *buf = ssd130x->buffer; 442 u8 *data_array = ssd130x->data_array; 443 unsigned int width = drm_rect_width(rect); 444 unsigned int height = drm_rect_height(rect); 445 unsigned int line_length = DIV_ROUND_UP(width, 8); 446 unsigned int page_height = ssd130x->device_info->page_height; 447 unsigned int pages = DIV_ROUND_UP(height, page_height); 448 struct drm_device *drm = &ssd130x->drm; 449 u32 array_idx = 0; 450 int ret, i, j, k; 451 452 drm_WARN_ONCE(drm, y % 8 != 0, "y must be aligned to screen page\n"); 453 454 /* 455 * The screen is divided in pages, each having a height of 8 456 * pixels, and the width of the screen. When sending a byte of 457 * data to the controller, it gives the 8 bits for the current 458 * column. I.e, the first byte are the 8 bits of the first 459 * column, then the 8 bits for the second column, etc. 460 * 461 * 462 * Representation of the screen, assuming it is 5 bits 463 * wide. Each letter-number combination is a bit that controls 464 * one pixel. 465 * 466 * A0 A1 A2 A3 A4 467 * B0 B1 B2 B3 B4 468 * C0 C1 C2 C3 C4 469 * D0 D1 D2 D3 D4 470 * E0 E1 E2 E3 E4 471 * F0 F1 F2 F3 F4 472 * G0 G1 G2 G3 G4 473 * H0 H1 H2 H3 H4 474 * 475 * If you want to update this screen, you need to send 5 bytes: 476 * (1) A0 B0 C0 D0 E0 F0 G0 H0 477 * (2) A1 B1 C1 D1 E1 F1 G1 H1 478 * (3) A2 B2 C2 D2 E2 F2 G2 H2 479 * (4) A3 B3 C3 D3 E3 F3 G3 H3 480 * (5) A4 B4 C4 D4 E4 F4 G4 H4 481 */ 482 483 if (!ssd130x->page_address_mode) { 484 /* Set address range for horizontal addressing mode */ 485 ret = ssd130x_set_col_range(ssd130x, ssd130x->col_offset + x, width); 486 if (ret < 0) 487 return ret; 488 489 ret = ssd130x_set_page_range(ssd130x, ssd130x->page_offset + y / 8, pages); 490 if (ret < 0) 491 return ret; 492 } 493 494 for (i = 0; i < pages; i++) { 495 int m = 8; 496 497 /* Last page may be partial */ 498 if (8 * (y / 8 + i + 1) > ssd130x->height) 499 m = ssd130x->height % 8; 500 for (j = 0; j < width; j++) { 501 u8 data = 0; 502 503 for (k = 0; k < m; k++) { 504 u8 byte = buf[(8 * i + k) * line_length + j / 8]; 505 u8 bit = (byte >> (j % 8)) & 1; 506 507 data |= bit << k; 508 } 509 data_array[array_idx++] = data; 510 } 511 512 /* 513 * In page addressing mode, the start address needs to be reset, 514 * and each page then needs to be written out separately. 515 */ 516 if (ssd130x->page_address_mode) { 517 ret = ssd130x_set_page_pos(ssd130x, 518 ssd130x->page_offset + i, 519 ssd130x->col_offset + x); 520 if (ret < 0) 521 return ret; 522 523 ret = ssd130x_write_data(ssd130x, data_array, width); 524 if (ret < 0) 525 return ret; 526 527 array_idx = 0; 528 } 529 } 530 531 /* Write out update in one go if we aren't using page addressing mode */ 532 if (!ssd130x->page_address_mode) 533 ret = ssd130x_write_data(ssd130x, data_array, width * pages); 534 535 return ret; 536 } 537 538 static void ssd130x_clear_screen(struct ssd130x_device *ssd130x) 539 { 540 struct drm_rect fullscreen = { 541 .x1 = 0, 542 .x2 = ssd130x->width, 543 .y1 = 0, 544 .y2 = ssd130x->height, 545 }; 546 547 ssd130x_update_rect(ssd130x, &fullscreen); 548 } 549 550 static int ssd130x_fb_blit_rect(struct drm_framebuffer *fb, const struct iosys_map *vmap, 551 struct drm_rect *rect) 552 { 553 struct ssd130x_device *ssd130x = drm_to_ssd130x(fb->dev); 554 unsigned int page_height = ssd130x->device_info->page_height; 555 struct iosys_map dst; 556 unsigned int dst_pitch; 557 int ret = 0; 558 u8 *buf = ssd130x->buffer; 559 560 if (!buf) 561 return 0; 562 563 /* Align y to display page boundaries */ 564 rect->y1 = round_down(rect->y1, page_height); 565 rect->y2 = min_t(unsigned int, round_up(rect->y2, page_height), ssd130x->height); 566 567 dst_pitch = DIV_ROUND_UP(drm_rect_width(rect), 8); 568 569 ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE); 570 if (ret) 571 return ret; 572 573 iosys_map_set_vaddr(&dst, buf); 574 drm_fb_xrgb8888_to_mono(&dst, &dst_pitch, vmap, fb, rect); 575 576 drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE); 577 578 ssd130x_update_rect(ssd130x, rect); 579 580 return ret; 581 } 582 583 static void ssd130x_primary_plane_helper_atomic_update(struct drm_plane *plane, 584 struct drm_atomic_state *state) 585 { 586 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 587 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 588 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 589 struct drm_atomic_helper_damage_iter iter; 590 struct drm_device *drm = plane->dev; 591 struct drm_rect dst_clip; 592 struct drm_rect damage; 593 int idx; 594 595 if (!drm_dev_enter(drm, &idx)) 596 return; 597 598 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state); 599 drm_atomic_for_each_plane_damage(&iter, &damage) { 600 dst_clip = plane_state->dst; 601 602 if (!drm_rect_intersect(&dst_clip, &damage)) 603 continue; 604 605 ssd130x_fb_blit_rect(plane_state->fb, &shadow_plane_state->data[0], &dst_clip); 606 } 607 608 drm_dev_exit(idx); 609 } 610 611 static void ssd130x_primary_plane_helper_atomic_disable(struct drm_plane *plane, 612 struct drm_atomic_state *state) 613 { 614 struct drm_device *drm = plane->dev; 615 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); 616 int idx; 617 618 if (!drm_dev_enter(drm, &idx)) 619 return; 620 621 ssd130x_clear_screen(ssd130x); 622 623 drm_dev_exit(idx); 624 } 625 626 static const struct drm_plane_helper_funcs ssd130x_primary_plane_helper_funcs = { 627 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 628 .atomic_check = drm_plane_helper_atomic_check, 629 .atomic_update = ssd130x_primary_plane_helper_atomic_update, 630 .atomic_disable = ssd130x_primary_plane_helper_atomic_disable, 631 }; 632 633 static const struct drm_plane_funcs ssd130x_primary_plane_funcs = { 634 .update_plane = drm_atomic_helper_update_plane, 635 .disable_plane = drm_atomic_helper_disable_plane, 636 .destroy = drm_plane_cleanup, 637 DRM_GEM_SHADOW_PLANE_FUNCS, 638 }; 639 640 static enum drm_mode_status ssd130x_crtc_helper_mode_valid(struct drm_crtc *crtc, 641 const struct drm_display_mode *mode) 642 { 643 struct ssd130x_device *ssd130x = drm_to_ssd130x(crtc->dev); 644 645 if (mode->hdisplay != ssd130x->mode.hdisplay && 646 mode->vdisplay != ssd130x->mode.vdisplay) 647 return MODE_ONE_SIZE; 648 else if (mode->hdisplay != ssd130x->mode.hdisplay) 649 return MODE_ONE_WIDTH; 650 else if (mode->vdisplay != ssd130x->mode.vdisplay) 651 return MODE_ONE_HEIGHT; 652 653 return MODE_OK; 654 } 655 656 /* 657 * The CRTC is always enabled. Screen updates are performed by 658 * the primary plane's atomic_update function. Disabling clears 659 * the screen in the primary plane's atomic_disable function. 660 */ 661 static const struct drm_crtc_helper_funcs ssd130x_crtc_helper_funcs = { 662 .mode_valid = ssd130x_crtc_helper_mode_valid, 663 .atomic_check = drm_crtc_helper_atomic_check, 664 }; 665 666 static const struct drm_crtc_funcs ssd130x_crtc_funcs = { 667 .reset = drm_atomic_helper_crtc_reset, 668 .destroy = drm_crtc_cleanup, 669 .set_config = drm_atomic_helper_set_config, 670 .page_flip = drm_atomic_helper_page_flip, 671 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, 672 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 673 }; 674 675 static void ssd130x_encoder_helper_atomic_enable(struct drm_encoder *encoder, 676 struct drm_atomic_state *state) 677 { 678 struct drm_device *drm = encoder->dev; 679 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); 680 unsigned int page_height = ssd130x->device_info->page_height; 681 unsigned int pages = DIV_ROUND_UP(ssd130x->height, page_height); 682 const struct drm_format_info *fi; 683 unsigned int pitch; 684 int ret; 685 686 ret = ssd130x_power_on(ssd130x); 687 if (ret) 688 return; 689 690 ret = ssd130x_init(ssd130x); 691 if (ret) 692 goto power_off; 693 694 fi = drm_format_info(DRM_FORMAT_R1); 695 if (!fi) 696 goto power_off; 697 698 pitch = drm_format_info_min_pitch(fi, 0, ssd130x->width); 699 700 ssd130x->buffer = kcalloc(pitch, ssd130x->height, GFP_KERNEL); 701 if (!ssd130x->buffer) 702 goto power_off; 703 704 ssd130x->data_array = kcalloc(ssd130x->width, pages, GFP_KERNEL); 705 if (!ssd130x->data_array) { 706 kfree(ssd130x->buffer); 707 goto power_off; 708 } 709 710 ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_ON); 711 712 backlight_enable(ssd130x->bl_dev); 713 714 return; 715 716 power_off: 717 ssd130x_power_off(ssd130x); 718 return; 719 } 720 721 static void ssd130x_encoder_helper_atomic_disable(struct drm_encoder *encoder, 722 struct drm_atomic_state *state) 723 { 724 struct drm_device *drm = encoder->dev; 725 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); 726 727 backlight_disable(ssd130x->bl_dev); 728 729 ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_OFF); 730 731 kfree(ssd130x->data_array); 732 kfree(ssd130x->buffer); 733 734 ssd130x_power_off(ssd130x); 735 } 736 737 static const struct drm_encoder_helper_funcs ssd130x_encoder_helper_funcs = { 738 .atomic_enable = ssd130x_encoder_helper_atomic_enable, 739 .atomic_disable = ssd130x_encoder_helper_atomic_disable, 740 }; 741 742 static const struct drm_encoder_funcs ssd130x_encoder_funcs = { 743 .destroy = drm_encoder_cleanup, 744 }; 745 746 static int ssd130x_connector_helper_get_modes(struct drm_connector *connector) 747 { 748 struct ssd130x_device *ssd130x = drm_to_ssd130x(connector->dev); 749 struct drm_display_mode *mode; 750 struct device *dev = ssd130x->dev; 751 752 mode = drm_mode_duplicate(connector->dev, &ssd130x->mode); 753 if (!mode) { 754 dev_err(dev, "Failed to duplicated mode\n"); 755 return 0; 756 } 757 758 drm_mode_probed_add(connector, mode); 759 drm_set_preferred_mode(connector, mode->hdisplay, mode->vdisplay); 760 761 /* There is only a single mode */ 762 return 1; 763 } 764 765 static const struct drm_connector_helper_funcs ssd130x_connector_helper_funcs = { 766 .get_modes = ssd130x_connector_helper_get_modes, 767 }; 768 769 static const struct drm_connector_funcs ssd130x_connector_funcs = { 770 .reset = drm_atomic_helper_connector_reset, 771 .fill_modes = drm_helper_probe_single_connector_modes, 772 .destroy = drm_connector_cleanup, 773 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 774 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 775 }; 776 777 static const struct drm_mode_config_funcs ssd130x_mode_config_funcs = { 778 .fb_create = drm_gem_fb_create_with_dirty, 779 .atomic_check = drm_atomic_helper_check, 780 .atomic_commit = drm_atomic_helper_commit, 781 }; 782 783 static const uint32_t ssd130x_formats[] = { 784 DRM_FORMAT_XRGB8888, 785 }; 786 787 DEFINE_DRM_GEM_FOPS(ssd130x_fops); 788 789 static const struct drm_driver ssd130x_drm_driver = { 790 DRM_GEM_SHMEM_DRIVER_OPS, 791 .name = DRIVER_NAME, 792 .desc = DRIVER_DESC, 793 .date = DRIVER_DATE, 794 .major = DRIVER_MAJOR, 795 .minor = DRIVER_MINOR, 796 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET, 797 .fops = &ssd130x_fops, 798 }; 799 800 static int ssd130x_update_bl(struct backlight_device *bdev) 801 { 802 struct ssd130x_device *ssd130x = bl_get_data(bdev); 803 int brightness = backlight_get_brightness(bdev); 804 int ret; 805 806 ssd130x->contrast = brightness; 807 808 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_CONTRAST); 809 if (ret < 0) 810 return ret; 811 812 ret = ssd130x_write_cmd(ssd130x, 1, ssd130x->contrast); 813 if (ret < 0) 814 return ret; 815 816 return 0; 817 } 818 819 static const struct backlight_ops ssd130xfb_bl_ops = { 820 .update_status = ssd130x_update_bl, 821 }; 822 823 static void ssd130x_parse_properties(struct ssd130x_device *ssd130x) 824 { 825 struct device *dev = ssd130x->dev; 826 827 if (device_property_read_u32(dev, "solomon,width", &ssd130x->width)) 828 ssd130x->width = ssd130x->device_info->default_width; 829 830 if (device_property_read_u32(dev, "solomon,height", &ssd130x->height)) 831 ssd130x->height = ssd130x->device_info->default_height; 832 833 if (device_property_read_u32(dev, "solomon,page-offset", &ssd130x->page_offset)) 834 ssd130x->page_offset = 1; 835 836 if (device_property_read_u32(dev, "solomon,col-offset", &ssd130x->col_offset)) 837 ssd130x->col_offset = 0; 838 839 if (device_property_read_u32(dev, "solomon,com-offset", &ssd130x->com_offset)) 840 ssd130x->com_offset = 0; 841 842 if (device_property_read_u32(dev, "solomon,prechargep1", &ssd130x->prechargep1)) 843 ssd130x->prechargep1 = 2; 844 845 if (device_property_read_u32(dev, "solomon,prechargep2", &ssd130x->prechargep2)) 846 ssd130x->prechargep2 = 2; 847 848 if (!device_property_read_u8_array(dev, "solomon,lookup-table", 849 ssd130x->lookup_table, 850 ARRAY_SIZE(ssd130x->lookup_table))) 851 ssd130x->lookup_table_set = 1; 852 853 ssd130x->seg_remap = !device_property_read_bool(dev, "solomon,segment-no-remap"); 854 ssd130x->com_seq = device_property_read_bool(dev, "solomon,com-seq"); 855 ssd130x->com_lrremap = device_property_read_bool(dev, "solomon,com-lrremap"); 856 ssd130x->com_invdir = device_property_read_bool(dev, "solomon,com-invdir"); 857 ssd130x->area_color_enable = 858 device_property_read_bool(dev, "solomon,area-color-enable"); 859 ssd130x->low_power = device_property_read_bool(dev, "solomon,low-power"); 860 861 ssd130x->contrast = 127; 862 ssd130x->vcomh = ssd130x->device_info->default_vcomh; 863 864 /* Setup display timing */ 865 if (device_property_read_u32(dev, "solomon,dclk-div", &ssd130x->dclk_div)) 866 ssd130x->dclk_div = ssd130x->device_info->default_dclk_div; 867 if (device_property_read_u32(dev, "solomon,dclk-frq", &ssd130x->dclk_frq)) 868 ssd130x->dclk_frq = ssd130x->device_info->default_dclk_frq; 869 } 870 871 static int ssd130x_init_modeset(struct ssd130x_device *ssd130x) 872 { 873 struct drm_display_mode *mode = &ssd130x->mode; 874 struct device *dev = ssd130x->dev; 875 struct drm_device *drm = &ssd130x->drm; 876 unsigned long max_width, max_height; 877 struct drm_plane *primary_plane; 878 struct drm_crtc *crtc; 879 struct drm_encoder *encoder; 880 struct drm_connector *connector; 881 int ret; 882 883 /* 884 * Modesetting 885 */ 886 887 ret = drmm_mode_config_init(drm); 888 if (ret) { 889 dev_err(dev, "DRM mode config init failed: %d\n", ret); 890 return ret; 891 } 892 893 mode->type = DRM_MODE_TYPE_DRIVER; 894 mode->clock = 1; 895 mode->hdisplay = mode->htotal = ssd130x->width; 896 mode->hsync_start = mode->hsync_end = ssd130x->width; 897 mode->vdisplay = mode->vtotal = ssd130x->height; 898 mode->vsync_start = mode->vsync_end = ssd130x->height; 899 mode->width_mm = 27; 900 mode->height_mm = 27; 901 902 max_width = max_t(unsigned long, mode->hdisplay, DRM_SHADOW_PLANE_MAX_WIDTH); 903 max_height = max_t(unsigned long, mode->vdisplay, DRM_SHADOW_PLANE_MAX_HEIGHT); 904 905 drm->mode_config.min_width = mode->hdisplay; 906 drm->mode_config.max_width = max_width; 907 drm->mode_config.min_height = mode->vdisplay; 908 drm->mode_config.max_height = max_height; 909 drm->mode_config.preferred_depth = 24; 910 drm->mode_config.funcs = &ssd130x_mode_config_funcs; 911 912 /* Primary plane */ 913 914 primary_plane = &ssd130x->primary_plane; 915 ret = drm_universal_plane_init(drm, primary_plane, 0, &ssd130x_primary_plane_funcs, 916 ssd130x_formats, ARRAY_SIZE(ssd130x_formats), 917 NULL, DRM_PLANE_TYPE_PRIMARY, NULL); 918 if (ret) { 919 dev_err(dev, "DRM primary plane init failed: %d\n", ret); 920 return ret; 921 } 922 923 drm_plane_helper_add(primary_plane, &ssd130x_primary_plane_helper_funcs); 924 925 drm_plane_enable_fb_damage_clips(primary_plane); 926 927 /* CRTC */ 928 929 crtc = &ssd130x->crtc; 930 ret = drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL, 931 &ssd130x_crtc_funcs, NULL); 932 if (ret) { 933 dev_err(dev, "DRM crtc init failed: %d\n", ret); 934 return ret; 935 } 936 937 drm_crtc_helper_add(crtc, &ssd130x_crtc_helper_funcs); 938 939 /* Encoder */ 940 941 encoder = &ssd130x->encoder; 942 ret = drm_encoder_init(drm, encoder, &ssd130x_encoder_funcs, 943 DRM_MODE_ENCODER_NONE, NULL); 944 if (ret) { 945 dev_err(dev, "DRM encoder init failed: %d\n", ret); 946 return ret; 947 } 948 949 drm_encoder_helper_add(encoder, &ssd130x_encoder_helper_funcs); 950 951 encoder->possible_crtcs = drm_crtc_mask(crtc); 952 953 /* Connector */ 954 955 connector = &ssd130x->connector; 956 ret = drm_connector_init(drm, connector, &ssd130x_connector_funcs, 957 DRM_MODE_CONNECTOR_Unknown); 958 if (ret) { 959 dev_err(dev, "DRM connector init failed: %d\n", ret); 960 return ret; 961 } 962 963 drm_connector_helper_add(connector, &ssd130x_connector_helper_funcs); 964 965 ret = drm_connector_attach_encoder(connector, encoder); 966 if (ret) { 967 dev_err(dev, "DRM attach connector to encoder failed: %d\n", ret); 968 return ret; 969 } 970 971 drm_mode_config_reset(drm); 972 973 return 0; 974 } 975 976 static int ssd130x_get_resources(struct ssd130x_device *ssd130x) 977 { 978 struct device *dev = ssd130x->dev; 979 980 ssd130x->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); 981 if (IS_ERR(ssd130x->reset)) 982 return dev_err_probe(dev, PTR_ERR(ssd130x->reset), 983 "Failed to get reset gpio\n"); 984 985 ssd130x->vcc_reg = devm_regulator_get(dev, "vcc"); 986 if (IS_ERR(ssd130x->vcc_reg)) 987 return dev_err_probe(dev, PTR_ERR(ssd130x->vcc_reg), 988 "Failed to get VCC regulator\n"); 989 990 return 0; 991 } 992 993 struct ssd130x_device *ssd130x_probe(struct device *dev, struct regmap *regmap) 994 { 995 struct ssd130x_device *ssd130x; 996 struct backlight_device *bl; 997 struct drm_device *drm; 998 int ret; 999 1000 ssd130x = devm_drm_dev_alloc(dev, &ssd130x_drm_driver, 1001 struct ssd130x_device, drm); 1002 if (IS_ERR(ssd130x)) 1003 return ERR_PTR(dev_err_probe(dev, PTR_ERR(ssd130x), 1004 "Failed to allocate DRM device\n")); 1005 1006 drm = &ssd130x->drm; 1007 1008 ssd130x->dev = dev; 1009 ssd130x->regmap = regmap; 1010 ssd130x->device_info = device_get_match_data(dev); 1011 1012 if (ssd130x->device_info->page_mode_only) 1013 ssd130x->page_address_mode = 1; 1014 1015 ssd130x_parse_properties(ssd130x); 1016 1017 ret = ssd130x_get_resources(ssd130x); 1018 if (ret) 1019 return ERR_PTR(ret); 1020 1021 bl = devm_backlight_device_register(dev, dev_name(dev), dev, ssd130x, 1022 &ssd130xfb_bl_ops, NULL); 1023 if (IS_ERR(bl)) 1024 return ERR_PTR(dev_err_probe(dev, PTR_ERR(bl), 1025 "Unable to register backlight device\n")); 1026 1027 bl->props.brightness = ssd130x->contrast; 1028 bl->props.max_brightness = MAX_CONTRAST; 1029 ssd130x->bl_dev = bl; 1030 1031 ret = ssd130x_init_modeset(ssd130x); 1032 if (ret) 1033 return ERR_PTR(ret); 1034 1035 ret = drm_dev_register(drm, 0); 1036 if (ret) 1037 return ERR_PTR(dev_err_probe(dev, ret, "DRM device register failed\n")); 1038 1039 drm_fbdev_generic_setup(drm, 32); 1040 1041 return ssd130x; 1042 } 1043 EXPORT_SYMBOL_GPL(ssd130x_probe); 1044 1045 void ssd130x_remove(struct ssd130x_device *ssd130x) 1046 { 1047 drm_dev_unplug(&ssd130x->drm); 1048 } 1049 EXPORT_SYMBOL_GPL(ssd130x_remove); 1050 1051 void ssd130x_shutdown(struct ssd130x_device *ssd130x) 1052 { 1053 drm_atomic_helper_shutdown(&ssd130x->drm); 1054 } 1055 EXPORT_SYMBOL_GPL(ssd130x_shutdown); 1056 1057 MODULE_DESCRIPTION(DRIVER_DESC); 1058 MODULE_AUTHOR("Javier Martinez Canillas <javierm@redhat.com>"); 1059 MODULE_LICENSE("GPL v2"); 1060