1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * DRM driver for Solomon SSD130x OLED displays 4 * 5 * Copyright 2022 Red Hat Inc. 6 * Author: Javier Martinez Canillas <javierm@redhat.com> 7 * 8 * Based on drivers/video/fbdev/ssd1307fb.c 9 * Copyright 2012 Free Electrons 10 */ 11 12 #include <linux/backlight.h> 13 #include <linux/bitfield.h> 14 #include <linux/bits.h> 15 #include <linux/delay.h> 16 #include <linux/gpio/consumer.h> 17 #include <linux/property.h> 18 #include <linux/pwm.h> 19 #include <linux/regulator/consumer.h> 20 21 #include <drm/drm_atomic.h> 22 #include <drm/drm_atomic_helper.h> 23 #include <drm/drm_crtc_helper.h> 24 #include <drm/drm_damage_helper.h> 25 #include <drm/drm_edid.h> 26 #include <drm/drm_fbdev_generic.h> 27 #include <drm/drm_format_helper.h> 28 #include <drm/drm_framebuffer.h> 29 #include <drm/drm_gem_atomic_helper.h> 30 #include <drm/drm_gem_framebuffer_helper.h> 31 #include <drm/drm_gem_shmem_helper.h> 32 #include <drm/drm_managed.h> 33 #include <drm/drm_modes.h> 34 #include <drm/drm_rect.h> 35 #include <drm/drm_probe_helper.h> 36 37 #include "ssd130x.h" 38 39 #define DRIVER_NAME "ssd130x" 40 #define DRIVER_DESC "DRM driver for Solomon SSD130x OLED displays" 41 #define DRIVER_DATE "20220131" 42 #define DRIVER_MAJOR 1 43 #define DRIVER_MINOR 0 44 45 #define SSD130X_PAGE_COL_START_LOW 0x00 46 #define SSD130X_PAGE_COL_START_HIGH 0x10 47 #define SSD130X_SET_ADDRESS_MODE 0x20 48 #define SSD130X_SET_COL_RANGE 0x21 49 #define SSD130X_SET_PAGE_RANGE 0x22 50 #define SSD130X_CONTRAST 0x81 51 #define SSD130X_SET_LOOKUP_TABLE 0x91 52 #define SSD130X_CHARGE_PUMP 0x8d 53 #define SSD130X_SET_SEG_REMAP 0xa0 54 #define SSD130X_DISPLAY_OFF 0xae 55 #define SSD130X_SET_MULTIPLEX_RATIO 0xa8 56 #define SSD130X_DISPLAY_ON 0xaf 57 #define SSD130X_START_PAGE_ADDRESS 0xb0 58 #define SSD130X_SET_COM_SCAN_DIR 0xc0 59 #define SSD130X_SET_DISPLAY_OFFSET 0xd3 60 #define SSD130X_SET_CLOCK_FREQ 0xd5 61 #define SSD130X_SET_AREA_COLOR_MODE 0xd8 62 #define SSD130X_SET_PRECHARGE_PERIOD 0xd9 63 #define SSD130X_SET_COM_PINS_CONFIG 0xda 64 #define SSD130X_SET_VCOMH 0xdb 65 66 #define SSD130X_PAGE_COL_START_MASK GENMASK(3, 0) 67 #define SSD130X_PAGE_COL_START_HIGH_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val) >> 4) 68 #define SSD130X_PAGE_COL_START_LOW_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val)) 69 #define SSD130X_START_PAGE_ADDRESS_MASK GENMASK(2, 0) 70 #define SSD130X_START_PAGE_ADDRESS_SET(val) FIELD_PREP(SSD130X_START_PAGE_ADDRESS_MASK, (val)) 71 #define SSD130X_SET_SEG_REMAP_MASK GENMASK(0, 0) 72 #define SSD130X_SET_SEG_REMAP_SET(val) FIELD_PREP(SSD130X_SET_SEG_REMAP_MASK, (val)) 73 #define SSD130X_SET_COM_SCAN_DIR_MASK GENMASK(3, 3) 74 #define SSD130X_SET_COM_SCAN_DIR_SET(val) FIELD_PREP(SSD130X_SET_COM_SCAN_DIR_MASK, (val)) 75 #define SSD130X_SET_CLOCK_DIV_MASK GENMASK(3, 0) 76 #define SSD130X_SET_CLOCK_DIV_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_DIV_MASK, (val)) 77 #define SSD130X_SET_CLOCK_FREQ_MASK GENMASK(7, 4) 78 #define SSD130X_SET_CLOCK_FREQ_SET(val) FIELD_PREP(SSD130X_SET_CLOCK_FREQ_MASK, (val)) 79 #define SSD130X_SET_PRECHARGE_PERIOD1_MASK GENMASK(3, 0) 80 #define SSD130X_SET_PRECHARGE_PERIOD1_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD1_MASK, (val)) 81 #define SSD130X_SET_PRECHARGE_PERIOD2_MASK GENMASK(7, 4) 82 #define SSD130X_SET_PRECHARGE_PERIOD2_SET(val) FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD2_MASK, (val)) 83 #define SSD130X_SET_COM_PINS_CONFIG1_MASK GENMASK(4, 4) 84 #define SSD130X_SET_COM_PINS_CONFIG1_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG1_MASK, (val)) 85 #define SSD130X_SET_COM_PINS_CONFIG2_MASK GENMASK(5, 5) 86 #define SSD130X_SET_COM_PINS_CONFIG2_SET(val) FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG2_MASK, (val)) 87 88 #define SSD130X_SET_ADDRESS_MODE_HORIZONTAL 0x00 89 #define SSD130X_SET_ADDRESS_MODE_VERTICAL 0x01 90 #define SSD130X_SET_ADDRESS_MODE_PAGE 0x02 91 92 #define SSD130X_SET_AREA_COLOR_MODE_ENABLE 0x1e 93 #define SSD130X_SET_AREA_COLOR_MODE_LOW_POWER 0x05 94 95 #define MAX_CONTRAST 255 96 97 const struct ssd130x_deviceinfo ssd130x_variants[] = { 98 [SH1106_ID] = { 99 .default_vcomh = 0x40, 100 .default_dclk_div = 1, 101 .default_dclk_frq = 5, 102 .default_width = 132, 103 .default_height = 64, 104 .page_mode_only = 1, 105 .page_height = 8, 106 }, 107 [SSD1305_ID] = { 108 .default_vcomh = 0x34, 109 .default_dclk_div = 1, 110 .default_dclk_frq = 7, 111 .default_width = 132, 112 .default_height = 64, 113 .page_height = 8, 114 }, 115 [SSD1306_ID] = { 116 .default_vcomh = 0x20, 117 .default_dclk_div = 1, 118 .default_dclk_frq = 8, 119 .need_chargepump = 1, 120 .default_width = 128, 121 .default_height = 64, 122 .page_height = 8, 123 }, 124 [SSD1307_ID] = { 125 .default_vcomh = 0x20, 126 .default_dclk_div = 2, 127 .default_dclk_frq = 12, 128 .need_pwm = 1, 129 .default_width = 128, 130 .default_height = 39, 131 .page_height = 8, 132 }, 133 [SSD1309_ID] = { 134 .default_vcomh = 0x34, 135 .default_dclk_div = 1, 136 .default_dclk_frq = 10, 137 .default_width = 128, 138 .default_height = 64, 139 .page_height = 8, 140 } 141 }; 142 EXPORT_SYMBOL_NS_GPL(ssd130x_variants, DRM_SSD130X); 143 144 static inline struct ssd130x_device *drm_to_ssd130x(struct drm_device *drm) 145 { 146 return container_of(drm, struct ssd130x_device, drm); 147 } 148 149 static int ssd130x_buf_alloc(struct ssd130x_device *ssd130x) 150 { 151 unsigned int page_height = ssd130x->device_info->page_height; 152 unsigned int pages = DIV_ROUND_UP(ssd130x->height, page_height); 153 154 ssd130x->buffer = kcalloc(DIV_ROUND_UP(ssd130x->width, 8), 155 ssd130x->height, GFP_KERNEL); 156 if (!ssd130x->buffer) 157 return -ENOMEM; 158 159 ssd130x->data_array = kcalloc(ssd130x->width, pages, GFP_KERNEL); 160 if (!ssd130x->data_array) { 161 kfree(ssd130x->buffer); 162 return -ENOMEM; 163 } 164 165 return 0; 166 } 167 168 static void ssd130x_buf_free(struct ssd130x_device *ssd130x) 169 { 170 kfree(ssd130x->data_array); 171 kfree(ssd130x->buffer); 172 } 173 174 /* 175 * Helper to write data (SSD130X_DATA) to the device. 176 */ 177 static int ssd130x_write_data(struct ssd130x_device *ssd130x, u8 *values, int count) 178 { 179 return regmap_bulk_write(ssd130x->regmap, SSD130X_DATA, values, count); 180 } 181 182 /* 183 * Helper to write command (SSD130X_COMMAND). The fist variadic argument 184 * is the command to write and the following are the command options. 185 * 186 * Note that the ssd130x protocol requires each command and option to be 187 * written as a SSD130X_COMMAND device register value. That is why a call 188 * to regmap_write(..., SSD130X_COMMAND, ...) is done for each argument. 189 */ 190 static int ssd130x_write_cmd(struct ssd130x_device *ssd130x, int count, 191 /* u8 cmd, u8 option, ... */...) 192 { 193 va_list ap; 194 u8 value; 195 int ret; 196 197 va_start(ap, count); 198 199 do { 200 value = va_arg(ap, int); 201 ret = regmap_write(ssd130x->regmap, SSD130X_COMMAND, value); 202 if (ret) 203 goto out_end; 204 } while (--count); 205 206 out_end: 207 va_end(ap); 208 209 return ret; 210 } 211 212 /* Set address range for horizontal/vertical addressing modes */ 213 static int ssd130x_set_col_range(struct ssd130x_device *ssd130x, 214 u8 col_start, u8 cols) 215 { 216 u8 col_end = col_start + cols - 1; 217 int ret; 218 219 if (col_start == ssd130x->col_start && col_end == ssd130x->col_end) 220 return 0; 221 222 ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_COL_RANGE, col_start, col_end); 223 if (ret < 0) 224 return ret; 225 226 ssd130x->col_start = col_start; 227 ssd130x->col_end = col_end; 228 return 0; 229 } 230 231 static int ssd130x_set_page_range(struct ssd130x_device *ssd130x, 232 u8 page_start, u8 pages) 233 { 234 u8 page_end = page_start + pages - 1; 235 int ret; 236 237 if (page_start == ssd130x->page_start && page_end == ssd130x->page_end) 238 return 0; 239 240 ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_PAGE_RANGE, page_start, page_end); 241 if (ret < 0) 242 return ret; 243 244 ssd130x->page_start = page_start; 245 ssd130x->page_end = page_end; 246 return 0; 247 } 248 249 /* Set page and column start address for page addressing mode */ 250 static int ssd130x_set_page_pos(struct ssd130x_device *ssd130x, 251 u8 page_start, u8 col_start) 252 { 253 int ret; 254 u32 page, col_low, col_high; 255 256 page = SSD130X_START_PAGE_ADDRESS | 257 SSD130X_START_PAGE_ADDRESS_SET(page_start); 258 col_low = SSD130X_PAGE_COL_START_LOW | 259 SSD130X_PAGE_COL_START_LOW_SET(col_start); 260 col_high = SSD130X_PAGE_COL_START_HIGH | 261 SSD130X_PAGE_COL_START_HIGH_SET(col_start); 262 ret = ssd130x_write_cmd(ssd130x, 3, page, col_low, col_high); 263 if (ret < 0) 264 return ret; 265 266 return 0; 267 } 268 269 static int ssd130x_pwm_enable(struct ssd130x_device *ssd130x) 270 { 271 struct device *dev = ssd130x->dev; 272 struct pwm_state pwmstate; 273 274 ssd130x->pwm = pwm_get(dev, NULL); 275 if (IS_ERR(ssd130x->pwm)) { 276 dev_err(dev, "Could not get PWM from firmware description!\n"); 277 return PTR_ERR(ssd130x->pwm); 278 } 279 280 pwm_init_state(ssd130x->pwm, &pwmstate); 281 pwm_set_relative_duty_cycle(&pwmstate, 50, 100); 282 pwm_apply_state(ssd130x->pwm, &pwmstate); 283 284 /* Enable the PWM */ 285 pwm_enable(ssd130x->pwm); 286 287 dev_dbg(dev, "Using PWM%d with a %lluns period.\n", 288 ssd130x->pwm->pwm, pwm_get_period(ssd130x->pwm)); 289 290 return 0; 291 } 292 293 static void ssd130x_reset(struct ssd130x_device *ssd130x) 294 { 295 if (!ssd130x->reset) 296 return; 297 298 /* Reset the screen */ 299 gpiod_set_value_cansleep(ssd130x->reset, 1); 300 udelay(4); 301 gpiod_set_value_cansleep(ssd130x->reset, 0); 302 udelay(4); 303 } 304 305 static int ssd130x_power_on(struct ssd130x_device *ssd130x) 306 { 307 struct device *dev = ssd130x->dev; 308 int ret; 309 310 ssd130x_reset(ssd130x); 311 312 ret = regulator_enable(ssd130x->vcc_reg); 313 if (ret) { 314 dev_err(dev, "Failed to enable VCC: %d\n", ret); 315 return ret; 316 } 317 318 if (ssd130x->device_info->need_pwm) { 319 ret = ssd130x_pwm_enable(ssd130x); 320 if (ret) { 321 dev_err(dev, "Failed to enable PWM: %d\n", ret); 322 regulator_disable(ssd130x->vcc_reg); 323 return ret; 324 } 325 } 326 327 return 0; 328 } 329 330 static void ssd130x_power_off(struct ssd130x_device *ssd130x) 331 { 332 pwm_disable(ssd130x->pwm); 333 pwm_put(ssd130x->pwm); 334 335 regulator_disable(ssd130x->vcc_reg); 336 } 337 338 static int ssd130x_init(struct ssd130x_device *ssd130x) 339 { 340 u32 precharge, dclk, com_invdir, compins, chargepump, seg_remap; 341 bool scan_mode; 342 int ret; 343 344 /* Set initial contrast */ 345 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CONTRAST, ssd130x->contrast); 346 if (ret < 0) 347 return ret; 348 349 /* Set segment re-map */ 350 seg_remap = (SSD130X_SET_SEG_REMAP | 351 SSD130X_SET_SEG_REMAP_SET(ssd130x->seg_remap)); 352 ret = ssd130x_write_cmd(ssd130x, 1, seg_remap); 353 if (ret < 0) 354 return ret; 355 356 /* Set COM direction */ 357 com_invdir = (SSD130X_SET_COM_SCAN_DIR | 358 SSD130X_SET_COM_SCAN_DIR_SET(ssd130x->com_invdir)); 359 ret = ssd130x_write_cmd(ssd130x, 1, com_invdir); 360 if (ret < 0) 361 return ret; 362 363 /* Set multiplex ratio value */ 364 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_MULTIPLEX_RATIO, ssd130x->height - 1); 365 if (ret < 0) 366 return ret; 367 368 /* set display offset value */ 369 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_DISPLAY_OFFSET, ssd130x->com_offset); 370 if (ret < 0) 371 return ret; 372 373 /* Set clock frequency */ 374 dclk = (SSD130X_SET_CLOCK_DIV_SET(ssd130x->dclk_div - 1) | 375 SSD130X_SET_CLOCK_FREQ_SET(ssd130x->dclk_frq)); 376 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_CLOCK_FREQ, dclk); 377 if (ret < 0) 378 return ret; 379 380 /* Set Area Color Mode ON/OFF & Low Power Display Mode */ 381 if (ssd130x->area_color_enable || ssd130x->low_power) { 382 u32 mode = 0; 383 384 if (ssd130x->area_color_enable) 385 mode |= SSD130X_SET_AREA_COLOR_MODE_ENABLE; 386 387 if (ssd130x->low_power) 388 mode |= SSD130X_SET_AREA_COLOR_MODE_LOW_POWER; 389 390 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_AREA_COLOR_MODE, mode); 391 if (ret < 0) 392 return ret; 393 } 394 395 /* Set precharge period in number of ticks from the internal clock */ 396 precharge = (SSD130X_SET_PRECHARGE_PERIOD1_SET(ssd130x->prechargep1) | 397 SSD130X_SET_PRECHARGE_PERIOD2_SET(ssd130x->prechargep2)); 398 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_PRECHARGE_PERIOD, precharge); 399 if (ret < 0) 400 return ret; 401 402 /* Set COM pins configuration */ 403 compins = BIT(1); 404 /* 405 * The COM scan mode field values are the inverse of the boolean DT 406 * property "solomon,com-seq". The value 0b means scan from COM0 to 407 * COM[N - 1] while 1b means scan from COM[N - 1] to COM0. 408 */ 409 scan_mode = !ssd130x->com_seq; 410 compins |= (SSD130X_SET_COM_PINS_CONFIG1_SET(scan_mode) | 411 SSD130X_SET_COM_PINS_CONFIG2_SET(ssd130x->com_lrremap)); 412 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_COM_PINS_CONFIG, compins); 413 if (ret < 0) 414 return ret; 415 416 /* Set VCOMH */ 417 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_VCOMH, ssd130x->vcomh); 418 if (ret < 0) 419 return ret; 420 421 /* Turn on the DC-DC Charge Pump */ 422 chargepump = BIT(4); 423 424 if (ssd130x->device_info->need_chargepump) 425 chargepump |= BIT(2); 426 427 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CHARGE_PUMP, chargepump); 428 if (ret < 0) 429 return ret; 430 431 /* Set lookup table */ 432 if (ssd130x->lookup_table_set) { 433 int i; 434 435 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_SET_LOOKUP_TABLE); 436 if (ret < 0) 437 return ret; 438 439 for (i = 0; i < ARRAY_SIZE(ssd130x->lookup_table); i++) { 440 u8 val = ssd130x->lookup_table[i]; 441 442 if (val < 31 || val > 63) 443 dev_warn(ssd130x->dev, 444 "lookup table index %d value out of range 31 <= %d <= 63\n", 445 i, val); 446 ret = ssd130x_write_cmd(ssd130x, 1, val); 447 if (ret < 0) 448 return ret; 449 } 450 } 451 452 /* Switch to page addressing mode */ 453 if (ssd130x->page_address_mode) 454 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE, 455 SSD130X_SET_ADDRESS_MODE_PAGE); 456 457 /* Switch to horizontal addressing mode */ 458 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE, 459 SSD130X_SET_ADDRESS_MODE_HORIZONTAL); 460 } 461 462 static int ssd130x_update_rect(struct ssd130x_device *ssd130x, struct drm_rect *rect) 463 { 464 unsigned int x = rect->x1; 465 unsigned int y = rect->y1; 466 u8 *buf = ssd130x->buffer; 467 u8 *data_array = ssd130x->data_array; 468 unsigned int width = drm_rect_width(rect); 469 unsigned int height = drm_rect_height(rect); 470 unsigned int line_length = DIV_ROUND_UP(width, 8); 471 unsigned int page_height = ssd130x->device_info->page_height; 472 unsigned int pages = DIV_ROUND_UP(height, page_height); 473 struct drm_device *drm = &ssd130x->drm; 474 u32 array_idx = 0; 475 int ret, i, j, k; 476 477 drm_WARN_ONCE(drm, y % 8 != 0, "y must be aligned to screen page\n"); 478 479 /* 480 * The screen is divided in pages, each having a height of 8 481 * pixels, and the width of the screen. When sending a byte of 482 * data to the controller, it gives the 8 bits for the current 483 * column. I.e, the first byte are the 8 bits of the first 484 * column, then the 8 bits for the second column, etc. 485 * 486 * 487 * Representation of the screen, assuming it is 5 bits 488 * wide. Each letter-number combination is a bit that controls 489 * one pixel. 490 * 491 * A0 A1 A2 A3 A4 492 * B0 B1 B2 B3 B4 493 * C0 C1 C2 C3 C4 494 * D0 D1 D2 D3 D4 495 * E0 E1 E2 E3 E4 496 * F0 F1 F2 F3 F4 497 * G0 G1 G2 G3 G4 498 * H0 H1 H2 H3 H4 499 * 500 * If you want to update this screen, you need to send 5 bytes: 501 * (1) A0 B0 C0 D0 E0 F0 G0 H0 502 * (2) A1 B1 C1 D1 E1 F1 G1 H1 503 * (3) A2 B2 C2 D2 E2 F2 G2 H2 504 * (4) A3 B3 C3 D3 E3 F3 G3 H3 505 * (5) A4 B4 C4 D4 E4 F4 G4 H4 506 */ 507 508 if (!ssd130x->page_address_mode) { 509 /* Set address range for horizontal addressing mode */ 510 ret = ssd130x_set_col_range(ssd130x, ssd130x->col_offset + x, width); 511 if (ret < 0) 512 return ret; 513 514 ret = ssd130x_set_page_range(ssd130x, ssd130x->page_offset + y / 8, pages); 515 if (ret < 0) 516 return ret; 517 } 518 519 for (i = 0; i < pages; i++) { 520 int m = 8; 521 522 /* Last page may be partial */ 523 if (8 * (y / 8 + i + 1) > ssd130x->height) 524 m = ssd130x->height % 8; 525 for (j = 0; j < width; j++) { 526 u8 data = 0; 527 528 for (k = 0; k < m; k++) { 529 u8 byte = buf[(8 * i + k) * line_length + j / 8]; 530 u8 bit = (byte >> (j % 8)) & 1; 531 532 data |= bit << k; 533 } 534 data_array[array_idx++] = data; 535 } 536 537 /* 538 * In page addressing mode, the start address needs to be reset, 539 * and each page then needs to be written out separately. 540 */ 541 if (ssd130x->page_address_mode) { 542 ret = ssd130x_set_page_pos(ssd130x, 543 ssd130x->page_offset + i, 544 ssd130x->col_offset + x); 545 if (ret < 0) 546 return ret; 547 548 ret = ssd130x_write_data(ssd130x, data_array, width); 549 if (ret < 0) 550 return ret; 551 552 array_idx = 0; 553 } 554 } 555 556 /* Write out update in one go if we aren't using page addressing mode */ 557 if (!ssd130x->page_address_mode) 558 ret = ssd130x_write_data(ssd130x, data_array, width * pages); 559 560 return ret; 561 } 562 563 static void ssd130x_clear_screen(struct ssd130x_device *ssd130x) 564 { 565 struct drm_rect fullscreen = { 566 .x1 = 0, 567 .x2 = ssd130x->width, 568 .y1 = 0, 569 .y2 = ssd130x->height, 570 }; 571 572 ssd130x_update_rect(ssd130x, &fullscreen); 573 } 574 575 static int ssd130x_fb_blit_rect(struct drm_framebuffer *fb, const struct iosys_map *vmap, 576 struct drm_rect *rect) 577 { 578 struct ssd130x_device *ssd130x = drm_to_ssd130x(fb->dev); 579 unsigned int page_height = ssd130x->device_info->page_height; 580 struct iosys_map dst; 581 unsigned int dst_pitch; 582 int ret = 0; 583 u8 *buf = ssd130x->buffer; 584 585 if (!buf) 586 return 0; 587 588 /* Align y to display page boundaries */ 589 rect->y1 = round_down(rect->y1, page_height); 590 rect->y2 = min_t(unsigned int, round_up(rect->y2, page_height), ssd130x->height); 591 592 dst_pitch = DIV_ROUND_UP(drm_rect_width(rect), page_height); 593 594 ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE); 595 if (ret) 596 return ret; 597 598 iosys_map_set_vaddr(&dst, buf); 599 drm_fb_xrgb8888_to_mono(&dst, &dst_pitch, vmap, fb, rect); 600 601 drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE); 602 603 ssd130x_update_rect(ssd130x, rect); 604 605 return ret; 606 } 607 608 static void ssd130x_primary_plane_helper_atomic_update(struct drm_plane *plane, 609 struct drm_atomic_state *state) 610 { 611 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 612 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 613 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 614 struct drm_atomic_helper_damage_iter iter; 615 struct drm_device *drm = plane->dev; 616 struct drm_rect dst_clip; 617 struct drm_rect damage; 618 int idx; 619 620 if (!drm_dev_enter(drm, &idx)) 621 return; 622 623 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state); 624 drm_atomic_for_each_plane_damage(&iter, &damage) { 625 dst_clip = plane_state->dst; 626 627 if (!drm_rect_intersect(&dst_clip, &damage)) 628 continue; 629 630 ssd130x_fb_blit_rect(plane_state->fb, &shadow_plane_state->data[0], &dst_clip); 631 } 632 633 drm_dev_exit(idx); 634 } 635 636 static void ssd130x_primary_plane_helper_atomic_disable(struct drm_plane *plane, 637 struct drm_atomic_state *state) 638 { 639 struct drm_device *drm = plane->dev; 640 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); 641 int idx; 642 643 if (!drm_dev_enter(drm, &idx)) 644 return; 645 646 ssd130x_clear_screen(ssd130x); 647 648 drm_dev_exit(idx); 649 } 650 651 static const struct drm_plane_helper_funcs ssd130x_primary_plane_helper_funcs = { 652 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 653 .atomic_check = drm_plane_helper_atomic_check, 654 .atomic_update = ssd130x_primary_plane_helper_atomic_update, 655 .atomic_disable = ssd130x_primary_plane_helper_atomic_disable, 656 }; 657 658 static const struct drm_plane_funcs ssd130x_primary_plane_funcs = { 659 .update_plane = drm_atomic_helper_update_plane, 660 .disable_plane = drm_atomic_helper_disable_plane, 661 .destroy = drm_plane_cleanup, 662 DRM_GEM_SHADOW_PLANE_FUNCS, 663 }; 664 665 static enum drm_mode_status ssd130x_crtc_helper_mode_valid(struct drm_crtc *crtc, 666 const struct drm_display_mode *mode) 667 { 668 struct ssd130x_device *ssd130x = drm_to_ssd130x(crtc->dev); 669 670 if (mode->hdisplay != ssd130x->mode.hdisplay && 671 mode->vdisplay != ssd130x->mode.vdisplay) 672 return MODE_ONE_SIZE; 673 else if (mode->hdisplay != ssd130x->mode.hdisplay) 674 return MODE_ONE_WIDTH; 675 else if (mode->vdisplay != ssd130x->mode.vdisplay) 676 return MODE_ONE_HEIGHT; 677 678 return MODE_OK; 679 } 680 681 /* 682 * The CRTC is always enabled. Screen updates are performed by 683 * the primary plane's atomic_update function. Disabling clears 684 * the screen in the primary plane's atomic_disable function. 685 */ 686 static const struct drm_crtc_helper_funcs ssd130x_crtc_helper_funcs = { 687 .mode_valid = ssd130x_crtc_helper_mode_valid, 688 .atomic_check = drm_crtc_helper_atomic_check, 689 }; 690 691 static const struct drm_crtc_funcs ssd130x_crtc_funcs = { 692 .reset = drm_atomic_helper_crtc_reset, 693 .destroy = drm_crtc_cleanup, 694 .set_config = drm_atomic_helper_set_config, 695 .page_flip = drm_atomic_helper_page_flip, 696 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, 697 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 698 }; 699 700 static void ssd130x_encoder_helper_atomic_enable(struct drm_encoder *encoder, 701 struct drm_atomic_state *state) 702 { 703 struct drm_device *drm = encoder->dev; 704 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); 705 int ret; 706 707 ret = ssd130x_power_on(ssd130x); 708 if (ret) 709 return; 710 711 ret = ssd130x_init(ssd130x); 712 if (ret) 713 goto power_off; 714 715 ret = ssd130x_buf_alloc(ssd130x); 716 if (ret) 717 goto power_off; 718 719 ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_ON); 720 721 backlight_enable(ssd130x->bl_dev); 722 723 return; 724 725 power_off: 726 ssd130x_power_off(ssd130x); 727 return; 728 } 729 730 static void ssd130x_encoder_helper_atomic_disable(struct drm_encoder *encoder, 731 struct drm_atomic_state *state) 732 { 733 struct drm_device *drm = encoder->dev; 734 struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); 735 736 backlight_disable(ssd130x->bl_dev); 737 738 ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_OFF); 739 740 ssd130x_buf_free(ssd130x); 741 742 ssd130x_power_off(ssd130x); 743 } 744 745 static const struct drm_encoder_helper_funcs ssd130x_encoder_helper_funcs = { 746 .atomic_enable = ssd130x_encoder_helper_atomic_enable, 747 .atomic_disable = ssd130x_encoder_helper_atomic_disable, 748 }; 749 750 static const struct drm_encoder_funcs ssd130x_encoder_funcs = { 751 .destroy = drm_encoder_cleanup, 752 }; 753 754 static int ssd130x_connector_helper_get_modes(struct drm_connector *connector) 755 { 756 struct ssd130x_device *ssd130x = drm_to_ssd130x(connector->dev); 757 struct drm_display_mode *mode; 758 struct device *dev = ssd130x->dev; 759 760 mode = drm_mode_duplicate(connector->dev, &ssd130x->mode); 761 if (!mode) { 762 dev_err(dev, "Failed to duplicated mode\n"); 763 return 0; 764 } 765 766 drm_mode_probed_add(connector, mode); 767 drm_set_preferred_mode(connector, mode->hdisplay, mode->vdisplay); 768 769 /* There is only a single mode */ 770 return 1; 771 } 772 773 static const struct drm_connector_helper_funcs ssd130x_connector_helper_funcs = { 774 .get_modes = ssd130x_connector_helper_get_modes, 775 }; 776 777 static const struct drm_connector_funcs ssd130x_connector_funcs = { 778 .reset = drm_atomic_helper_connector_reset, 779 .fill_modes = drm_helper_probe_single_connector_modes, 780 .destroy = drm_connector_cleanup, 781 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 782 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 783 }; 784 785 static const struct drm_mode_config_funcs ssd130x_mode_config_funcs = { 786 .fb_create = drm_gem_fb_create_with_dirty, 787 .atomic_check = drm_atomic_helper_check, 788 .atomic_commit = drm_atomic_helper_commit, 789 }; 790 791 static const uint32_t ssd130x_formats[] = { 792 DRM_FORMAT_XRGB8888, 793 }; 794 795 DEFINE_DRM_GEM_FOPS(ssd130x_fops); 796 797 static const struct drm_driver ssd130x_drm_driver = { 798 DRM_GEM_SHMEM_DRIVER_OPS, 799 .name = DRIVER_NAME, 800 .desc = DRIVER_DESC, 801 .date = DRIVER_DATE, 802 .major = DRIVER_MAJOR, 803 .minor = DRIVER_MINOR, 804 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET, 805 .fops = &ssd130x_fops, 806 }; 807 808 static int ssd130x_update_bl(struct backlight_device *bdev) 809 { 810 struct ssd130x_device *ssd130x = bl_get_data(bdev); 811 int brightness = backlight_get_brightness(bdev); 812 int ret; 813 814 ssd130x->contrast = brightness; 815 816 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_CONTRAST); 817 if (ret < 0) 818 return ret; 819 820 ret = ssd130x_write_cmd(ssd130x, 1, ssd130x->contrast); 821 if (ret < 0) 822 return ret; 823 824 return 0; 825 } 826 827 static const struct backlight_ops ssd130xfb_bl_ops = { 828 .update_status = ssd130x_update_bl, 829 }; 830 831 static void ssd130x_parse_properties(struct ssd130x_device *ssd130x) 832 { 833 struct device *dev = ssd130x->dev; 834 835 if (device_property_read_u32(dev, "solomon,width", &ssd130x->width)) 836 ssd130x->width = ssd130x->device_info->default_width; 837 838 if (device_property_read_u32(dev, "solomon,height", &ssd130x->height)) 839 ssd130x->height = ssd130x->device_info->default_height; 840 841 if (device_property_read_u32(dev, "solomon,page-offset", &ssd130x->page_offset)) 842 ssd130x->page_offset = 1; 843 844 if (device_property_read_u32(dev, "solomon,col-offset", &ssd130x->col_offset)) 845 ssd130x->col_offset = 0; 846 847 if (device_property_read_u32(dev, "solomon,com-offset", &ssd130x->com_offset)) 848 ssd130x->com_offset = 0; 849 850 if (device_property_read_u32(dev, "solomon,prechargep1", &ssd130x->prechargep1)) 851 ssd130x->prechargep1 = 2; 852 853 if (device_property_read_u32(dev, "solomon,prechargep2", &ssd130x->prechargep2)) 854 ssd130x->prechargep2 = 2; 855 856 if (!device_property_read_u8_array(dev, "solomon,lookup-table", 857 ssd130x->lookup_table, 858 ARRAY_SIZE(ssd130x->lookup_table))) 859 ssd130x->lookup_table_set = 1; 860 861 ssd130x->seg_remap = !device_property_read_bool(dev, "solomon,segment-no-remap"); 862 ssd130x->com_seq = device_property_read_bool(dev, "solomon,com-seq"); 863 ssd130x->com_lrremap = device_property_read_bool(dev, "solomon,com-lrremap"); 864 ssd130x->com_invdir = device_property_read_bool(dev, "solomon,com-invdir"); 865 ssd130x->area_color_enable = 866 device_property_read_bool(dev, "solomon,area-color-enable"); 867 ssd130x->low_power = device_property_read_bool(dev, "solomon,low-power"); 868 869 ssd130x->contrast = 127; 870 ssd130x->vcomh = ssd130x->device_info->default_vcomh; 871 872 /* Setup display timing */ 873 if (device_property_read_u32(dev, "solomon,dclk-div", &ssd130x->dclk_div)) 874 ssd130x->dclk_div = ssd130x->device_info->default_dclk_div; 875 if (device_property_read_u32(dev, "solomon,dclk-frq", &ssd130x->dclk_frq)) 876 ssd130x->dclk_frq = ssd130x->device_info->default_dclk_frq; 877 } 878 879 static int ssd130x_init_modeset(struct ssd130x_device *ssd130x) 880 { 881 struct drm_display_mode *mode = &ssd130x->mode; 882 struct device *dev = ssd130x->dev; 883 struct drm_device *drm = &ssd130x->drm; 884 unsigned long max_width, max_height; 885 struct drm_plane *primary_plane; 886 struct drm_crtc *crtc; 887 struct drm_encoder *encoder; 888 struct drm_connector *connector; 889 int ret; 890 891 /* 892 * Modesetting 893 */ 894 895 ret = drmm_mode_config_init(drm); 896 if (ret) { 897 dev_err(dev, "DRM mode config init failed: %d\n", ret); 898 return ret; 899 } 900 901 mode->type = DRM_MODE_TYPE_DRIVER; 902 mode->clock = 1; 903 mode->hdisplay = mode->htotal = ssd130x->width; 904 mode->hsync_start = mode->hsync_end = ssd130x->width; 905 mode->vdisplay = mode->vtotal = ssd130x->height; 906 mode->vsync_start = mode->vsync_end = ssd130x->height; 907 mode->width_mm = 27; 908 mode->height_mm = 27; 909 910 max_width = max_t(unsigned long, mode->hdisplay, DRM_SHADOW_PLANE_MAX_WIDTH); 911 max_height = max_t(unsigned long, mode->vdisplay, DRM_SHADOW_PLANE_MAX_HEIGHT); 912 913 drm->mode_config.min_width = mode->hdisplay; 914 drm->mode_config.max_width = max_width; 915 drm->mode_config.min_height = mode->vdisplay; 916 drm->mode_config.max_height = max_height; 917 drm->mode_config.preferred_depth = 24; 918 drm->mode_config.funcs = &ssd130x_mode_config_funcs; 919 920 /* Primary plane */ 921 922 primary_plane = &ssd130x->primary_plane; 923 ret = drm_universal_plane_init(drm, primary_plane, 0, &ssd130x_primary_plane_funcs, 924 ssd130x_formats, ARRAY_SIZE(ssd130x_formats), 925 NULL, DRM_PLANE_TYPE_PRIMARY, NULL); 926 if (ret) { 927 dev_err(dev, "DRM primary plane init failed: %d\n", ret); 928 return ret; 929 } 930 931 drm_plane_helper_add(primary_plane, &ssd130x_primary_plane_helper_funcs); 932 933 drm_plane_enable_fb_damage_clips(primary_plane); 934 935 /* CRTC */ 936 937 crtc = &ssd130x->crtc; 938 ret = drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL, 939 &ssd130x_crtc_funcs, NULL); 940 if (ret) { 941 dev_err(dev, "DRM crtc init failed: %d\n", ret); 942 return ret; 943 } 944 945 drm_crtc_helper_add(crtc, &ssd130x_crtc_helper_funcs); 946 947 /* Encoder */ 948 949 encoder = &ssd130x->encoder; 950 ret = drm_encoder_init(drm, encoder, &ssd130x_encoder_funcs, 951 DRM_MODE_ENCODER_NONE, NULL); 952 if (ret) { 953 dev_err(dev, "DRM encoder init failed: %d\n", ret); 954 return ret; 955 } 956 957 drm_encoder_helper_add(encoder, &ssd130x_encoder_helper_funcs); 958 959 encoder->possible_crtcs = drm_crtc_mask(crtc); 960 961 /* Connector */ 962 963 connector = &ssd130x->connector; 964 ret = drm_connector_init(drm, connector, &ssd130x_connector_funcs, 965 DRM_MODE_CONNECTOR_Unknown); 966 if (ret) { 967 dev_err(dev, "DRM connector init failed: %d\n", ret); 968 return ret; 969 } 970 971 drm_connector_helper_add(connector, &ssd130x_connector_helper_funcs); 972 973 ret = drm_connector_attach_encoder(connector, encoder); 974 if (ret) { 975 dev_err(dev, "DRM attach connector to encoder failed: %d\n", ret); 976 return ret; 977 } 978 979 drm_mode_config_reset(drm); 980 981 return 0; 982 } 983 984 static int ssd130x_get_resources(struct ssd130x_device *ssd130x) 985 { 986 struct device *dev = ssd130x->dev; 987 988 ssd130x->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); 989 if (IS_ERR(ssd130x->reset)) 990 return dev_err_probe(dev, PTR_ERR(ssd130x->reset), 991 "Failed to get reset gpio\n"); 992 993 ssd130x->vcc_reg = devm_regulator_get(dev, "vcc"); 994 if (IS_ERR(ssd130x->vcc_reg)) 995 return dev_err_probe(dev, PTR_ERR(ssd130x->vcc_reg), 996 "Failed to get VCC regulator\n"); 997 998 return 0; 999 } 1000 1001 struct ssd130x_device *ssd130x_probe(struct device *dev, struct regmap *regmap) 1002 { 1003 struct ssd130x_device *ssd130x; 1004 struct backlight_device *bl; 1005 struct drm_device *drm; 1006 int ret; 1007 1008 ssd130x = devm_drm_dev_alloc(dev, &ssd130x_drm_driver, 1009 struct ssd130x_device, drm); 1010 if (IS_ERR(ssd130x)) 1011 return ERR_PTR(dev_err_probe(dev, PTR_ERR(ssd130x), 1012 "Failed to allocate DRM device\n")); 1013 1014 drm = &ssd130x->drm; 1015 1016 ssd130x->dev = dev; 1017 ssd130x->regmap = regmap; 1018 ssd130x->device_info = device_get_match_data(dev); 1019 1020 if (ssd130x->device_info->page_mode_only) 1021 ssd130x->page_address_mode = 1; 1022 1023 ssd130x_parse_properties(ssd130x); 1024 1025 ret = ssd130x_get_resources(ssd130x); 1026 if (ret) 1027 return ERR_PTR(ret); 1028 1029 bl = devm_backlight_device_register(dev, dev_name(dev), dev, ssd130x, 1030 &ssd130xfb_bl_ops, NULL); 1031 if (IS_ERR(bl)) 1032 return ERR_PTR(dev_err_probe(dev, PTR_ERR(bl), 1033 "Unable to register backlight device\n")); 1034 1035 bl->props.brightness = ssd130x->contrast; 1036 bl->props.max_brightness = MAX_CONTRAST; 1037 ssd130x->bl_dev = bl; 1038 1039 ret = ssd130x_init_modeset(ssd130x); 1040 if (ret) 1041 return ERR_PTR(ret); 1042 1043 ret = drm_dev_register(drm, 0); 1044 if (ret) 1045 return ERR_PTR(dev_err_probe(dev, ret, "DRM device register failed\n")); 1046 1047 drm_fbdev_generic_setup(drm, 32); 1048 1049 return ssd130x; 1050 } 1051 EXPORT_SYMBOL_GPL(ssd130x_probe); 1052 1053 void ssd130x_remove(struct ssd130x_device *ssd130x) 1054 { 1055 drm_dev_unplug(&ssd130x->drm); 1056 } 1057 EXPORT_SYMBOL_GPL(ssd130x_remove); 1058 1059 void ssd130x_shutdown(struct ssd130x_device *ssd130x) 1060 { 1061 drm_atomic_helper_shutdown(&ssd130x->drm); 1062 } 1063 EXPORT_SYMBOL_GPL(ssd130x_shutdown); 1064 1065 MODULE_DESCRIPTION(DRIVER_DESC); 1066 MODULE_AUTHOR("Javier Martinez Canillas <javierm@redhat.com>"); 1067 MODULE_LICENSE("GPL v2"); 1068