19c92ab61SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
22048e328SMark Yao /*
32048e328SMark Yao * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
42048e328SMark Yao * Author:Mark Yao <mark.yao@rock-chips.com>
52048e328SMark Yao *
62048e328SMark Yao * based on exynos_drm_drv.h
72048e328SMark Yao */
82048e328SMark Yao
92048e328SMark Yao #ifndef _ROCKCHIP_DRM_DRV_H
102048e328SMark Yao #define _ROCKCHIP_DRM_DRV_H
112048e328SMark Yao
1263ebb9faSMark Yao #include <drm/drm_atomic_helper.h>
132048e328SMark Yao #include <drm/drm_gem.h>
142048e328SMark Yao
1545b64fd9SThomas Zimmermann #include <linux/i2c.h>
162048e328SMark Yao #include <linux/module.h>
172048e328SMark Yao #include <linux/component.h>
182048e328SMark Yao
192048e328SMark Yao #define ROCKCHIP_MAX_FB_BUFFER 3
202048e328SMark Yao #define ROCKCHIP_MAX_CONNECTOR 2
21604be855SAndy Yan #define ROCKCHIP_MAX_CRTC 4
222048e328SMark Yao
23*b7a2cc49SAndy Yan /*
24*b7a2cc49SAndy Yan * display output interface supported by rockchip lcdc
25*b7a2cc49SAndy Yan */
26*b7a2cc49SAndy Yan #define ROCKCHIP_OUT_MODE_P888 0
27*b7a2cc49SAndy Yan #define ROCKCHIP_OUT_MODE_BT1120 0
28*b7a2cc49SAndy Yan #define ROCKCHIP_OUT_MODE_P666 1
29*b7a2cc49SAndy Yan #define ROCKCHIP_OUT_MODE_P565 2
30*b7a2cc49SAndy Yan #define ROCKCHIP_OUT_MODE_BT656 5
31*b7a2cc49SAndy Yan #define ROCKCHIP_OUT_MODE_S888 8
32*b7a2cc49SAndy Yan #define ROCKCHIP_OUT_MODE_S888_DUMMY 12
33*b7a2cc49SAndy Yan #define ROCKCHIP_OUT_MODE_YUV420 14
34*b7a2cc49SAndy Yan /* for use special outface */
35*b7a2cc49SAndy Yan #define ROCKCHIP_OUT_MODE_AAAA 15
36*b7a2cc49SAndy Yan
37*b7a2cc49SAndy Yan /* output flags */
38*b7a2cc49SAndy Yan #define ROCKCHIP_OUTPUT_DSI_DUAL BIT(0)
39*b7a2cc49SAndy Yan
402048e328SMark Yao struct drm_device;
412048e328SMark Yao struct drm_connector;
4238f993b7STomasz Figa struct iommu_domain;
432048e328SMark Yao
444e257d9eSMark Yao struct rockchip_crtc_state {
454e257d9eSMark Yao struct drm_crtc_state base;
464e257d9eSMark Yao int output_type;
474e257d9eSMark Yao int output_mode;
486bda8112SMark Yao int output_bpc;
49cf6d100dSHeiko Stuebner int output_flags;
507707f722SAndrzej Pietrasiewicz bool enable_afbc;
51a56ec21aSAndy Yan bool yuv_overlay;
52604be855SAndy Yan u32 bus_format;
53604be855SAndy Yan u32 bus_flags;
54604be855SAndy Yan int color_space;
554e257d9eSMark Yao };
564e257d9eSMark Yao #define to_rockchip_crtc_state(s) \
574e257d9eSMark Yao container_of(s, struct rockchip_crtc_state, base)
584e257d9eSMark Yao
592048e328SMark Yao /*
602048e328SMark Yao * Rockchip drm private structure.
612048e328SMark Yao *
622048e328SMark Yao * @crtc: array of enabled CRTCs, used to map from "pipe" to drm_crtc.
632048e328SMark Yao * @num_pipe: number of pipes for this device.
642d7b5637SCaesar Wang * @mm_lock: protect drm_mm on multi-threads.
652048e328SMark Yao */
662048e328SMark Yao struct rockchip_drm_private {
6738f993b7STomasz Figa struct iommu_domain *domain;
68421be3eeSRobin Murphy struct device *iommu_dev;
6938f993b7STomasz Figa struct mutex mm_lock;
7038f993b7STomasz Figa struct drm_mm mm;
712048e328SMark Yao };
722048e328SMark Yao
73540b8f27SSascha Hauer struct rockchip_encoder {
74cf544c6aSSascha Hauer int crtc_endpoint_id;
75540b8f27SSascha Hauer struct drm_encoder encoder;
76540b8f27SSascha Hauer };
77540b8f27SSascha Hauer
782048e328SMark Yao int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
792048e328SMark Yao struct device *dev);
802048e328SMark Yao void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
812048e328SMark Yao struct device *dev);
82421be3eeSRobin Murphy void rockchip_drm_dma_init_device(struct drm_device *drm_dev,
83421be3eeSRobin Murphy struct device *dev);
84459b086dSJeffy Chen int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout);
85cf544c6aSSascha Hauer int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder *rencoder,
86cf544c6aSSascha Hauer struct device_node *np, int port, int reg);
873880f62eSHeiko Stuebner int rockchip_drm_endpoint_is_subdriver(struct device_node *ep);
888820b68bSJeffy Chen extern struct platform_driver cdn_dp_driver;
898820b68bSJeffy Chen extern struct platform_driver dw_hdmi_rockchip_pltfm_driver;
902d4f7bdaSNickey Yang extern struct platform_driver dw_mipi_dsi_rockchip_driver;
918820b68bSJeffy Chen extern struct platform_driver inno_hdmi_driver;
928820b68bSJeffy Chen extern struct platform_driver rockchip_dp_driver;
9334cc0aa2SSandy Huang extern struct platform_driver rockchip_lvds_driver;
948820b68bSJeffy Chen extern struct platform_driver vop_platform_driver;
95f84d3d37SZheng Yang extern struct platform_driver rk3066_hdmi_driver;
96604be855SAndy Yan extern struct platform_driver vop2_platform_driver;
97540b8f27SSascha Hauer
to_rockchip_encoder(struct drm_encoder * encoder)98540b8f27SSascha Hauer static inline struct rockchip_encoder *to_rockchip_encoder(struct drm_encoder *encoder)
99540b8f27SSascha Hauer {
100540b8f27SSascha Hauer return container_of(encoder, struct rockchip_encoder, encoder);
101540b8f27SSascha Hauer }
102540b8f27SSascha Hauer
1032048e328SMark Yao #endif /* _ROCKCHIP_DRM_DRV_H_ */
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