xref: /openbmc/linux/drivers/gpu/drm/rockchip/rk3066_hdmi.h (revision c39f2d9db0fd81ea20bb5cce9b3f082ca63753e2)
1*f84d3d37SZheng Yang /* SPDX-License-Identifier: GPL-2.0 */
2*f84d3d37SZheng Yang /*
3*f84d3d37SZheng Yang  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
4*f84d3d37SZheng Yang  *    Zheng Yang <zhengyang@rock-chips.com>
5*f84d3d37SZheng Yang  */
6*f84d3d37SZheng Yang 
7*f84d3d37SZheng Yang #ifndef __RK3066_HDMI_H__
8*f84d3d37SZheng Yang #define __RK3066_HDMI_H__
9*f84d3d37SZheng Yang 
10*f84d3d37SZheng Yang #define GRF_SOC_CON0				0x150
11*f84d3d37SZheng Yang #define HDMI_VIDEO_SEL				BIT(14)
12*f84d3d37SZheng Yang 
13*f84d3d37SZheng Yang #define DDC_SEGMENT_ADDR			0x30
14*f84d3d37SZheng Yang #define HDMI_SCL_RATE				(50 * 1000)
15*f84d3d37SZheng Yang #define HDMI_MAXIMUM_INFO_FRAME_SIZE		0x11
16*f84d3d37SZheng Yang 
17*f84d3d37SZheng Yang #define N_32K					0x1000
18*f84d3d37SZheng Yang #define N_441K					0x1880
19*f84d3d37SZheng Yang #define N_882K					0x3100
20*f84d3d37SZheng Yang #define N_1764K					0x6200
21*f84d3d37SZheng Yang #define N_48K					0x1800
22*f84d3d37SZheng Yang #define N_96K					0x3000
23*f84d3d37SZheng Yang #define N_192K					0x6000
24*f84d3d37SZheng Yang 
25*f84d3d37SZheng Yang #define HDMI_SYS_CTRL				0x000
26*f84d3d37SZheng Yang #define HDMI_LR_SWAP_N3				0x004
27*f84d3d37SZheng Yang #define HDMI_N2					0x008
28*f84d3d37SZheng Yang #define HDMI_N1					0x00c
29*f84d3d37SZheng Yang #define HDMI_SPDIF_FS_CTS_INT3			0x010
30*f84d3d37SZheng Yang #define HDMI_CTS_INT2				0x014
31*f84d3d37SZheng Yang #define HDMI_CTS_INT1				0x018
32*f84d3d37SZheng Yang #define HDMI_CTS_EXT3				0x01c
33*f84d3d37SZheng Yang #define HDMI_CTS_EXT2				0x020
34*f84d3d37SZheng Yang #define HDMI_CTS_EXT1				0x024
35*f84d3d37SZheng Yang #define HDMI_AUDIO_CTRL1			0x028
36*f84d3d37SZheng Yang #define HDMI_AUDIO_CTRL2			0x02c
37*f84d3d37SZheng Yang #define HDMI_I2S_AUDIO_CTRL			0x030
38*f84d3d37SZheng Yang #define HDMI_I2S_SWAP				0x040
39*f84d3d37SZheng Yang #define HDMI_AUDIO_STA_BIT_CTRL1		0x044
40*f84d3d37SZheng Yang #define HDMI_AUDIO_STA_BIT_CTRL2		0x048
41*f84d3d37SZheng Yang #define HDMI_AUDIO_SRC_NUM_AND_LENGTH		0x050
42*f84d3d37SZheng Yang #define HDMI_AV_CTRL1				0x054
43*f84d3d37SZheng Yang #define HDMI_VIDEO_CTRL1			0x058
44*f84d3d37SZheng Yang #define HDMI_DEEP_COLOR_MODE			0x05c
45*f84d3d37SZheng Yang 
46*f84d3d37SZheng Yang #define HDMI_EXT_VIDEO_PARA			0x0c0
47*f84d3d37SZheng Yang #define HDMI_EXT_HTOTAL_L			0x0c4
48*f84d3d37SZheng Yang #define HDMI_EXT_HTOTAL_H			0x0c8
49*f84d3d37SZheng Yang #define HDMI_EXT_HBLANK_L			0x0cc
50*f84d3d37SZheng Yang #define HDMI_EXT_HBLANK_H			0x0d0
51*f84d3d37SZheng Yang #define HDMI_EXT_HDELAY_L			0x0d4
52*f84d3d37SZheng Yang #define HDMI_EXT_HDELAY_H			0x0d8
53*f84d3d37SZheng Yang #define HDMI_EXT_HDURATION_L			0x0dc
54*f84d3d37SZheng Yang #define HDMI_EXT_HDURATION_H			0x0e0
55*f84d3d37SZheng Yang #define HDMI_EXT_VTOTAL_L			0x0e4
56*f84d3d37SZheng Yang #define HDMI_EXT_VTOTAL_H			0x0e8
57*f84d3d37SZheng Yang #define HDMI_AV_CTRL2				0x0ec
58*f84d3d37SZheng Yang #define HDMI_EXT_VBLANK_L			0x0f4
59*f84d3d37SZheng Yang #define HDMI_EXT_VBLANK_H			0x10c
60*f84d3d37SZheng Yang #define HDMI_EXT_VDELAY				0x0f8
61*f84d3d37SZheng Yang #define HDMI_EXT_VDURATION			0x0fc
62*f84d3d37SZheng Yang 
63*f84d3d37SZheng Yang #define HDMI_CP_MANU_SEND_CTRL			0x100
64*f84d3d37SZheng Yang #define HDMI_CP_AUTO_SEND_CTRL			0x104
65*f84d3d37SZheng Yang #define HDMI_AUTO_CHECKSUM_OPT			0x108
66*f84d3d37SZheng Yang 
67*f84d3d37SZheng Yang #define HDMI_VIDEO_CTRL2			0x114
68*f84d3d37SZheng Yang 
69*f84d3d37SZheng Yang #define HDMI_PHY_OPTION				0x144
70*f84d3d37SZheng Yang 
71*f84d3d37SZheng Yang #define HDMI_CP_BUF_INDEX			0x17c
72*f84d3d37SZheng Yang #define HDMI_CP_BUF_ACC_HB0			0x180
73*f84d3d37SZheng Yang #define HDMI_CP_BUF_ACC_HB1			0x184
74*f84d3d37SZheng Yang #define HDMI_CP_BUF_ACC_HB2			0x188
75*f84d3d37SZheng Yang #define HDMI_CP_BUF_ACC_PB0			0x18c
76*f84d3d37SZheng Yang 
77*f84d3d37SZheng Yang #define HDMI_DDC_READ_FIFO_ADDR			0x200
78*f84d3d37SZheng Yang #define HDMI_DDC_BUS_FREQ_L			0x204
79*f84d3d37SZheng Yang #define HDMI_DDC_BUS_FREQ_H			0x208
80*f84d3d37SZheng Yang #define HDMI_DDC_BUS_CTRL			0x2dc
81*f84d3d37SZheng Yang #define HDMI_DDC_I2C_LEN			0x278
82*f84d3d37SZheng Yang #define HDMI_DDC_I2C_OFFSET			0x280
83*f84d3d37SZheng Yang #define HDMI_DDC_I2C_CTRL			0x284
84*f84d3d37SZheng Yang #define HDMI_DDC_I2C_READ_BUF0			0x288
85*f84d3d37SZheng Yang #define HDMI_DDC_I2C_READ_BUF1			0x28c
86*f84d3d37SZheng Yang #define HDMI_DDC_I2C_READ_BUF2			0x290
87*f84d3d37SZheng Yang #define HDMI_DDC_I2C_READ_BUF3			0x294
88*f84d3d37SZheng Yang #define HDMI_DDC_I2C_WRITE_BUF0			0x298
89*f84d3d37SZheng Yang #define HDMI_DDC_I2C_WRITE_BUF1			0x29c
90*f84d3d37SZheng Yang #define HDMI_DDC_I2C_WRITE_BUF2			0x2a0
91*f84d3d37SZheng Yang #define HDMI_DDC_I2C_WRITE_BUF3			0x2a4
92*f84d3d37SZheng Yang #define HDMI_DDC_I2C_WRITE_BUF4			0x2ac
93*f84d3d37SZheng Yang #define HDMI_DDC_I2C_WRITE_BUF5			0x2b0
94*f84d3d37SZheng Yang #define HDMI_DDC_I2C_WRITE_BUF6			0x2b4
95*f84d3d37SZheng Yang 
96*f84d3d37SZheng Yang #define HDMI_INTR_MASK1				0x248
97*f84d3d37SZheng Yang #define HDMI_INTR_MASK2				0x24c
98*f84d3d37SZheng Yang #define HDMI_INTR_STATUS1			0x250
99*f84d3d37SZheng Yang #define HDMI_INTR_STATUS2			0x254
100*f84d3d37SZheng Yang #define HDMI_INTR_MASK3				0x258
101*f84d3d37SZheng Yang #define HDMI_INTR_MASK4				0x25c
102*f84d3d37SZheng Yang #define HDMI_INTR_STATUS3			0x260
103*f84d3d37SZheng Yang #define HDMI_INTR_STATUS4			0x264
104*f84d3d37SZheng Yang 
105*f84d3d37SZheng Yang #define HDMI_HDCP_CTRL				0x2bc
106*f84d3d37SZheng Yang 
107*f84d3d37SZheng Yang #define HDMI_EDID_SEGMENT_POINTER		0x310
108*f84d3d37SZheng Yang #define HDMI_EDID_WORD_ADDR			0x314
109*f84d3d37SZheng Yang #define HDMI_EDID_FIFO_ADDR			0x318
110*f84d3d37SZheng Yang 
111*f84d3d37SZheng Yang #define HDMI_HPG_MENS_STA			0x37c
112*f84d3d37SZheng Yang 
113*f84d3d37SZheng Yang #define HDMI_INTERNAL_CLK_DIVIDER		0x800
114*f84d3d37SZheng Yang 
115*f84d3d37SZheng Yang enum {
116*f84d3d37SZheng Yang 	/* HDMI_SYS_CTRL */
117*f84d3d37SZheng Yang 	HDMI_SYS_POWER_MODE_MASK = 0xf0,
118*f84d3d37SZheng Yang 	HDMI_SYS_POWER_MODE_A = 0x10,
119*f84d3d37SZheng Yang 	HDMI_SYS_POWER_MODE_B = 0x20,
120*f84d3d37SZheng Yang 	HDMI_SYS_POWER_MODE_D = 0x40,
121*f84d3d37SZheng Yang 	HDMI_SYS_POWER_MODE_E = 0x80,
122*f84d3d37SZheng Yang 	HDMI_SYS_PLL_RESET_MASK = 0x0c,
123*f84d3d37SZheng Yang 	HDMI_SYS_PLL_RESET = 0x0c,
124*f84d3d37SZheng Yang 	HDMI_SYS_PLLB_RESET = 0x08,
125*f84d3d37SZheng Yang 
126*f84d3d37SZheng Yang 	/* HDMI_LR_SWAP_N3 */
127*f84d3d37SZheng Yang 	HDMI_AUDIO_LR_SWAP_MASK = 0xf0,
128*f84d3d37SZheng Yang 	HDMI_AUDIO_LR_SWAP_SUBPACKET0 = 0x10,
129*f84d3d37SZheng Yang 	HDMI_AUDIO_LR_SWAP_SUBPACKET1 = 0x20,
130*f84d3d37SZheng Yang 	HDMI_AUDIO_LR_SWAP_SUBPACKET2 = 0x40,
131*f84d3d37SZheng Yang 	HDMI_AUDIO_LR_SWAP_SUBPACKET3 = 0x80,
132*f84d3d37SZheng Yang 	HDMI_AUDIO_N_19_16_MASK = 0x0f,
133*f84d3d37SZheng Yang 
134*f84d3d37SZheng Yang 	/* HDMI_AUDIO_CTRL1 */
135*f84d3d37SZheng Yang 	HDMI_AUDIO_EXTERNAL_CTS = BIT(7),
136*f84d3d37SZheng Yang 	HDMI_AUDIO_INPUT_IIS = 0,
137*f84d3d37SZheng Yang 	HDMI_AUDIO_INPUT_SPDIF = 0x08,
138*f84d3d37SZheng Yang 	HDMI_AUDIO_INPUT_MCLK_ACTIVE = 0x04,
139*f84d3d37SZheng Yang 	HDMI_AUDIO_INPUT_MCLK_DEACTIVE = 0,
140*f84d3d37SZheng Yang 	HDMI_AUDIO_INPUT_MCLK_RATE_128X = 0,
141*f84d3d37SZheng Yang 	HDMI_AUDIO_INPUT_MCLK_RATE_256X = 1,
142*f84d3d37SZheng Yang 	HDMI_AUDIO_INPUT_MCLK_RATE_384X = 2,
143*f84d3d37SZheng Yang 	HDMI_AUDIO_INPUT_MCLK_RATE_512X = 3,
144*f84d3d37SZheng Yang 
145*f84d3d37SZheng Yang 	/* HDMI_I2S_AUDIO_CTRL */
146*f84d3d37SZheng Yang 	HDMI_AUDIO_I2S_FORMAT_STANDARD = 0,
147*f84d3d37SZheng Yang 	HDMI_AUDIO_I2S_CHANNEL_1_2 = 0x04,
148*f84d3d37SZheng Yang 	HDMI_AUDIO_I2S_CHANNEL_3_4 = 0x0c,
149*f84d3d37SZheng Yang 	HDMI_AUDIO_I2S_CHANNEL_5_6 = 0x1c,
150*f84d3d37SZheng Yang 	HDMI_AUDIO_I2S_CHANNEL_7_8 = 0x3c,
151*f84d3d37SZheng Yang 
152*f84d3d37SZheng Yang 	/* HDMI_AV_CTRL1 */
153*f84d3d37SZheng Yang 	HDMI_AUDIO_SAMPLE_FRE_MASK = 0xf0,
154*f84d3d37SZheng Yang 	HDMI_AUDIO_SAMPLE_FRE_32000 = 0x30,
155*f84d3d37SZheng Yang 	HDMI_AUDIO_SAMPLE_FRE_44100 = 0,
156*f84d3d37SZheng Yang 	HDMI_AUDIO_SAMPLE_FRE_48000 = 0x20,
157*f84d3d37SZheng Yang 	HDMI_AUDIO_SAMPLE_FRE_88200 = 0x80,
158*f84d3d37SZheng Yang 	HDMI_AUDIO_SAMPLE_FRE_96000 = 0xa0,
159*f84d3d37SZheng Yang 	HDMI_AUDIO_SAMPLE_FRE_176400 = 0xc0,
160*f84d3d37SZheng Yang 	HDMI_AUDIO_SAMPLE_FRE_192000 = 0xe0,
161*f84d3d37SZheng Yang 	HDMI_AUDIO_SAMPLE_FRE_768000 = 0x90,
162*f84d3d37SZheng Yang 
163*f84d3d37SZheng Yang 	HDMI_VIDEO_INPUT_FORMAT_MASK = 0x0e,
164*f84d3d37SZheng Yang 	HDMI_VIDEO_INPUT_RGB_YCBCR444 = 0,
165*f84d3d37SZheng Yang 	HDMI_VIDEO_INPUT_YCBCR422 = 0x02,
166*f84d3d37SZheng Yang 	HDMI_VIDEO_DE_MASK = 0x1,
167*f84d3d37SZheng Yang 	HDMI_VIDEO_INTERNAL_DE = 0,
168*f84d3d37SZheng Yang 	HDMI_VIDEO_EXTERNAL_DE = 0x01,
169*f84d3d37SZheng Yang 
170*f84d3d37SZheng Yang 	/* HDMI_VIDEO_CTRL1 */
171*f84d3d37SZheng Yang 	HDMI_VIDEO_OUTPUT_FORMAT_MASK = 0xc0,
172*f84d3d37SZheng Yang 	HDMI_VIDEO_OUTPUT_RGB444 = 0,
173*f84d3d37SZheng Yang 	HDMI_VIDEO_OUTPUT_YCBCR444 = 0x40,
174*f84d3d37SZheng Yang 	HDMI_VIDEO_OUTPUT_YCBCR422 = 0x80,
175*f84d3d37SZheng Yang 	HDMI_VIDEO_INPUT_DATA_DEPTH_MASK = 0x30,
176*f84d3d37SZheng Yang 	HDMI_VIDEO_INPUT_DATA_DEPTH_12BIT = 0,
177*f84d3d37SZheng Yang 	HDMI_VIDEO_INPUT_DATA_DEPTH_10BIT = 0x10,
178*f84d3d37SZheng Yang 	HDMI_VIDEO_INPUT_DATA_DEPTH_8BIT = 0x30,
179*f84d3d37SZheng Yang 	HDMI_VIDEO_INPUT_COLOR_MASK = 1,
180*f84d3d37SZheng Yang 	HDMI_VIDEO_INPUT_COLOR_RGB = 0,
181*f84d3d37SZheng Yang 	HDMI_VIDEO_INPUT_COLOR_YCBCR = 1,
182*f84d3d37SZheng Yang 
183*f84d3d37SZheng Yang 	/* HDMI_EXT_VIDEO_PARA */
184*f84d3d37SZheng Yang 	HDMI_VIDEO_VSYNC_OFFSET_SHIFT = 4,
185*f84d3d37SZheng Yang 	HDMI_VIDEO_VSYNC_ACTIVE_HIGH = BIT(3),
186*f84d3d37SZheng Yang 	HDMI_VIDEO_VSYNC_ACTIVE_LOW = 0,
187*f84d3d37SZheng Yang 	HDMI_VIDEO_HSYNC_ACTIVE_HIGH = BIT(2),
188*f84d3d37SZheng Yang 	HDMI_VIDEO_HSYNC_ACTIVE_LOW = 0,
189*f84d3d37SZheng Yang 	HDMI_VIDEO_MODE_INTERLACE = BIT(1),
190*f84d3d37SZheng Yang 	HDMI_VIDEO_MODE_PROGRESSIVE = 0,
191*f84d3d37SZheng Yang 	HDMI_EXT_VIDEO_SET_EN = BIT(0),
192*f84d3d37SZheng Yang 
193*f84d3d37SZheng Yang 	/* HDMI_CP_AUTO_SEND_CTRL */
194*f84d3d37SZheng Yang 
195*f84d3d37SZheng Yang 	/* HDMI_VIDEO_CTRL2 */
196*f84d3d37SZheng Yang 	HDMI_VIDEO_AV_MUTE_MASK = 0xc0,
197*f84d3d37SZheng Yang 	HDMI_VIDEO_CLR_AV_MUTE = BIT(7),
198*f84d3d37SZheng Yang 	HDMI_VIDEO_SET_AV_MUTE = BIT(6),
199*f84d3d37SZheng Yang 	HDMI_AUDIO_CP_LOGIC_RESET_MASK = BIT(2),
200*f84d3d37SZheng Yang 	HDMI_AUDIO_CP_LOGIC_RESET = BIT(2),
201*f84d3d37SZheng Yang 	HDMI_VIDEO_AUDIO_DISABLE_MASK = 0x3,
202*f84d3d37SZheng Yang 	HDMI_AUDIO_DISABLE = BIT(1),
203*f84d3d37SZheng Yang 	HDMI_VIDEO_DISABLE = BIT(0),
204*f84d3d37SZheng Yang 
205*f84d3d37SZheng Yang 	/* HDMI_CP_BUF_INDEX */
206*f84d3d37SZheng Yang 	HDMI_INFOFRAME_VSI = 0x05,
207*f84d3d37SZheng Yang 	HDMI_INFOFRAME_AVI = 0x06,
208*f84d3d37SZheng Yang 	HDMI_INFOFRAME_AAI = 0x08,
209*f84d3d37SZheng Yang 
210*f84d3d37SZheng Yang 	/* HDMI_INTR_MASK1 */
211*f84d3d37SZheng Yang 	/* HDMI_INTR_STATUS1 */
212*f84d3d37SZheng Yang 	HDMI_INTR_HOTPLUG = BIT(7),
213*f84d3d37SZheng Yang 	HDMI_INTR_MSENS = BIT(6),
214*f84d3d37SZheng Yang 	HDMI_INTR_VSYNC = BIT(5),
215*f84d3d37SZheng Yang 	HDMI_INTR_AUDIO_FIFO_FULL = BIT(4),
216*f84d3d37SZheng Yang 	HDMI_INTR_EDID_MASK = 0x6,
217*f84d3d37SZheng Yang 	HDMI_INTR_EDID_READY = BIT(2),
218*f84d3d37SZheng Yang 	HDMI_INTR_EDID_ERR = BIT(1),
219*f84d3d37SZheng Yang 
220*f84d3d37SZheng Yang 	/* HDMI_HDCP_CTRL */
221*f84d3d37SZheng Yang 	HDMI_VIDEO_MODE_MASK = BIT(1),
222*f84d3d37SZheng Yang 	HDMI_VIDEO_MODE_HDMI = BIT(1),
223*f84d3d37SZheng Yang 
224*f84d3d37SZheng Yang 	/* HDMI_HPG_MENS_STA */
225*f84d3d37SZheng Yang 	HDMI_HPG_IN_STATUS_HIGH = BIT(7),
226*f84d3d37SZheng Yang 	HDMI_MSENS_IN_STATUS_HIGH = BIT(6),
227*f84d3d37SZheng Yang };
228*f84d3d37SZheng Yang 
229*f84d3d37SZheng Yang #endif /* __RK3066_HDMI_H__ */
230