1*ecc0b326SMichel Dänzer /* 2*ecc0b326SMichel Dänzer * Copyright 2009 VMware, Inc. 3*ecc0b326SMichel Dänzer * 4*ecc0b326SMichel Dänzer * Permission is hereby granted, free of charge, to any person obtaining a 5*ecc0b326SMichel Dänzer * copy of this software and associated documentation files (the "Software"), 6*ecc0b326SMichel Dänzer * to deal in the Software without restriction, including without limitation 7*ecc0b326SMichel Dänzer * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*ecc0b326SMichel Dänzer * and/or sell copies of the Software, and to permit persons to whom the 9*ecc0b326SMichel Dänzer * Software is furnished to do so, subject to the following conditions: 10*ecc0b326SMichel Dänzer * 11*ecc0b326SMichel Dänzer * The above copyright notice and this permission notice shall be included in 12*ecc0b326SMichel Dänzer * all copies or substantial portions of the Software. 13*ecc0b326SMichel Dänzer * 14*ecc0b326SMichel Dänzer * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*ecc0b326SMichel Dänzer * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*ecc0b326SMichel Dänzer * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*ecc0b326SMichel Dänzer * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*ecc0b326SMichel Dänzer * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*ecc0b326SMichel Dänzer * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*ecc0b326SMichel Dänzer * OTHER DEALINGS IN THE SOFTWARE. 21*ecc0b326SMichel Dänzer * 22*ecc0b326SMichel Dänzer * Authors: Michel Dänzer 23*ecc0b326SMichel Dänzer */ 24*ecc0b326SMichel Dänzer #include <drm/drmP.h> 25*ecc0b326SMichel Dänzer #include <drm/radeon_drm.h> 26*ecc0b326SMichel Dänzer #include "radeon_reg.h" 27*ecc0b326SMichel Dänzer #include "radeon.h" 28*ecc0b326SMichel Dänzer 29*ecc0b326SMichel Dänzer 30*ecc0b326SMichel Dänzer /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */ 31*ecc0b326SMichel Dänzer void radeon_test_moves(struct radeon_device *rdev) 32*ecc0b326SMichel Dänzer { 33*ecc0b326SMichel Dänzer struct radeon_object *vram_obj = NULL; 34*ecc0b326SMichel Dänzer struct radeon_object **gtt_obj = NULL; 35*ecc0b326SMichel Dänzer struct radeon_fence *fence = NULL; 36*ecc0b326SMichel Dänzer uint64_t gtt_addr, vram_addr; 37*ecc0b326SMichel Dänzer unsigned i, n, size; 38*ecc0b326SMichel Dänzer int r; 39*ecc0b326SMichel Dänzer 40*ecc0b326SMichel Dänzer size = 1024 * 1024; 41*ecc0b326SMichel Dänzer 42*ecc0b326SMichel Dänzer /* Number of tests = 43*ecc0b326SMichel Dänzer * (Total GTT - IB pool - writeback page - ring buffer) / test size 44*ecc0b326SMichel Dänzer */ 45*ecc0b326SMichel Dänzer n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - 4096 - 46*ecc0b326SMichel Dänzer rdev->cp.ring_size) / size; 47*ecc0b326SMichel Dänzer 48*ecc0b326SMichel Dänzer gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); 49*ecc0b326SMichel Dänzer if (!gtt_obj) { 50*ecc0b326SMichel Dänzer DRM_ERROR("Failed to allocate %d pointers\n", n); 51*ecc0b326SMichel Dänzer r = 1; 52*ecc0b326SMichel Dänzer goto out_cleanup; 53*ecc0b326SMichel Dänzer } 54*ecc0b326SMichel Dänzer 55*ecc0b326SMichel Dänzer r = radeon_object_create(rdev, NULL, size, true, RADEON_GEM_DOMAIN_VRAM, 56*ecc0b326SMichel Dänzer false, &vram_obj); 57*ecc0b326SMichel Dänzer if (r) { 58*ecc0b326SMichel Dänzer DRM_ERROR("Failed to create VRAM object\n"); 59*ecc0b326SMichel Dänzer goto out_cleanup; 60*ecc0b326SMichel Dänzer } 61*ecc0b326SMichel Dänzer 62*ecc0b326SMichel Dänzer r = radeon_object_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr); 63*ecc0b326SMichel Dänzer if (r) { 64*ecc0b326SMichel Dänzer DRM_ERROR("Failed to pin VRAM object\n"); 65*ecc0b326SMichel Dänzer goto out_cleanup; 66*ecc0b326SMichel Dänzer } 67*ecc0b326SMichel Dänzer 68*ecc0b326SMichel Dänzer for (i = 0; i < n; i++) { 69*ecc0b326SMichel Dänzer void *gtt_map, *vram_map; 70*ecc0b326SMichel Dänzer void **gtt_start, **gtt_end; 71*ecc0b326SMichel Dänzer void **vram_start, **vram_end; 72*ecc0b326SMichel Dänzer 73*ecc0b326SMichel Dänzer r = radeon_object_create(rdev, NULL, size, true, 74*ecc0b326SMichel Dänzer RADEON_GEM_DOMAIN_GTT, false, gtt_obj + i); 75*ecc0b326SMichel Dänzer if (r) { 76*ecc0b326SMichel Dänzer DRM_ERROR("Failed to create GTT object %d\n", i); 77*ecc0b326SMichel Dänzer goto out_cleanup; 78*ecc0b326SMichel Dänzer } 79*ecc0b326SMichel Dänzer 80*ecc0b326SMichel Dänzer r = radeon_object_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, >t_addr); 81*ecc0b326SMichel Dänzer if (r) { 82*ecc0b326SMichel Dänzer DRM_ERROR("Failed to pin GTT object %d\n", i); 83*ecc0b326SMichel Dänzer goto out_cleanup; 84*ecc0b326SMichel Dänzer } 85*ecc0b326SMichel Dänzer 86*ecc0b326SMichel Dänzer r = radeon_object_kmap(gtt_obj[i], >t_map); 87*ecc0b326SMichel Dänzer if (r) { 88*ecc0b326SMichel Dänzer DRM_ERROR("Failed to map GTT object %d\n", i); 89*ecc0b326SMichel Dänzer goto out_cleanup; 90*ecc0b326SMichel Dänzer } 91*ecc0b326SMichel Dänzer 92*ecc0b326SMichel Dänzer for (gtt_start = gtt_map, gtt_end = gtt_map + size; 93*ecc0b326SMichel Dänzer gtt_start < gtt_end; 94*ecc0b326SMichel Dänzer gtt_start++) 95*ecc0b326SMichel Dänzer *gtt_start = gtt_start; 96*ecc0b326SMichel Dänzer 97*ecc0b326SMichel Dänzer radeon_object_kunmap(gtt_obj[i]); 98*ecc0b326SMichel Dänzer 99*ecc0b326SMichel Dänzer r = radeon_fence_create(rdev, &fence); 100*ecc0b326SMichel Dänzer if (r) { 101*ecc0b326SMichel Dänzer DRM_ERROR("Failed to create GTT->VRAM fence %d\n", i); 102*ecc0b326SMichel Dänzer goto out_cleanup; 103*ecc0b326SMichel Dänzer } 104*ecc0b326SMichel Dänzer 105*ecc0b326SMichel Dänzer r = radeon_copy(rdev, gtt_addr, vram_addr, size / 4096, fence); 106*ecc0b326SMichel Dänzer if (r) { 107*ecc0b326SMichel Dänzer DRM_ERROR("Failed GTT->VRAM copy %d\n", i); 108*ecc0b326SMichel Dänzer goto out_cleanup; 109*ecc0b326SMichel Dänzer } 110*ecc0b326SMichel Dänzer 111*ecc0b326SMichel Dänzer r = radeon_fence_wait(fence, false); 112*ecc0b326SMichel Dänzer if (r) { 113*ecc0b326SMichel Dänzer DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i); 114*ecc0b326SMichel Dänzer goto out_cleanup; 115*ecc0b326SMichel Dänzer } 116*ecc0b326SMichel Dänzer 117*ecc0b326SMichel Dänzer radeon_fence_unref(&fence); 118*ecc0b326SMichel Dänzer 119*ecc0b326SMichel Dänzer r = radeon_object_kmap(vram_obj, &vram_map); 120*ecc0b326SMichel Dänzer if (r) { 121*ecc0b326SMichel Dänzer DRM_ERROR("Failed to map VRAM object after copy %d\n", i); 122*ecc0b326SMichel Dänzer goto out_cleanup; 123*ecc0b326SMichel Dänzer } 124*ecc0b326SMichel Dänzer 125*ecc0b326SMichel Dänzer for (gtt_start = gtt_map, gtt_end = gtt_map + size, 126*ecc0b326SMichel Dänzer vram_start = vram_map, vram_end = vram_map + size; 127*ecc0b326SMichel Dänzer vram_start < vram_end; 128*ecc0b326SMichel Dänzer gtt_start++, vram_start++) { 129*ecc0b326SMichel Dänzer if (*vram_start != gtt_start) { 130*ecc0b326SMichel Dänzer DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, " 131*ecc0b326SMichel Dänzer "expected 0x%p (GTT map 0x%p-0x%p)\n", 132*ecc0b326SMichel Dänzer i, *vram_start, gtt_start, gtt_map, 133*ecc0b326SMichel Dänzer gtt_end); 134*ecc0b326SMichel Dänzer radeon_object_kunmap(vram_obj); 135*ecc0b326SMichel Dänzer goto out_cleanup; 136*ecc0b326SMichel Dänzer } 137*ecc0b326SMichel Dänzer *vram_start = vram_start; 138*ecc0b326SMichel Dänzer } 139*ecc0b326SMichel Dänzer 140*ecc0b326SMichel Dänzer radeon_object_kunmap(vram_obj); 141*ecc0b326SMichel Dänzer 142*ecc0b326SMichel Dänzer r = radeon_fence_create(rdev, &fence); 143*ecc0b326SMichel Dänzer if (r) { 144*ecc0b326SMichel Dänzer DRM_ERROR("Failed to create VRAM->GTT fence %d\n", i); 145*ecc0b326SMichel Dänzer goto out_cleanup; 146*ecc0b326SMichel Dänzer } 147*ecc0b326SMichel Dänzer 148*ecc0b326SMichel Dänzer r = radeon_copy(rdev, vram_addr, gtt_addr, size / 4096, fence); 149*ecc0b326SMichel Dänzer if (r) { 150*ecc0b326SMichel Dänzer DRM_ERROR("Failed VRAM->GTT copy %d\n", i); 151*ecc0b326SMichel Dänzer goto out_cleanup; 152*ecc0b326SMichel Dänzer } 153*ecc0b326SMichel Dänzer 154*ecc0b326SMichel Dänzer r = radeon_fence_wait(fence, false); 155*ecc0b326SMichel Dänzer if (r) { 156*ecc0b326SMichel Dänzer DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i); 157*ecc0b326SMichel Dänzer goto out_cleanup; 158*ecc0b326SMichel Dänzer } 159*ecc0b326SMichel Dänzer 160*ecc0b326SMichel Dänzer radeon_fence_unref(&fence); 161*ecc0b326SMichel Dänzer 162*ecc0b326SMichel Dänzer r = radeon_object_kmap(gtt_obj[i], >t_map); 163*ecc0b326SMichel Dänzer if (r) { 164*ecc0b326SMichel Dänzer DRM_ERROR("Failed to map GTT object after copy %d\n", i); 165*ecc0b326SMichel Dänzer goto out_cleanup; 166*ecc0b326SMichel Dänzer } 167*ecc0b326SMichel Dänzer 168*ecc0b326SMichel Dänzer for (gtt_start = gtt_map, gtt_end = gtt_map + size, 169*ecc0b326SMichel Dänzer vram_start = vram_map, vram_end = vram_map + size; 170*ecc0b326SMichel Dänzer gtt_start < gtt_end; 171*ecc0b326SMichel Dänzer gtt_start++, vram_start++) { 172*ecc0b326SMichel Dänzer if (*gtt_start != vram_start) { 173*ecc0b326SMichel Dänzer DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, " 174*ecc0b326SMichel Dänzer "expected 0x%p (VRAM map 0x%p-0x%p)\n", 175*ecc0b326SMichel Dänzer i, *gtt_start, vram_start, vram_map, 176*ecc0b326SMichel Dänzer vram_end); 177*ecc0b326SMichel Dänzer radeon_object_kunmap(gtt_obj[i]); 178*ecc0b326SMichel Dänzer goto out_cleanup; 179*ecc0b326SMichel Dänzer } 180*ecc0b326SMichel Dänzer } 181*ecc0b326SMichel Dänzer 182*ecc0b326SMichel Dänzer radeon_object_kunmap(gtt_obj[i]); 183*ecc0b326SMichel Dänzer 184*ecc0b326SMichel Dänzer DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n", 185*ecc0b326SMichel Dänzer gtt_addr - rdev->mc.gtt_location); 186*ecc0b326SMichel Dänzer } 187*ecc0b326SMichel Dänzer 188*ecc0b326SMichel Dänzer out_cleanup: 189*ecc0b326SMichel Dänzer if (vram_obj) { 190*ecc0b326SMichel Dänzer radeon_object_unpin(vram_obj); 191*ecc0b326SMichel Dänzer radeon_object_unref(&vram_obj); 192*ecc0b326SMichel Dänzer } 193*ecc0b326SMichel Dänzer if (gtt_obj) { 194*ecc0b326SMichel Dänzer for (i = 0; i < n; i++) { 195*ecc0b326SMichel Dänzer if (gtt_obj[i]) { 196*ecc0b326SMichel Dänzer radeon_object_unpin(gtt_obj[i]); 197*ecc0b326SMichel Dänzer radeon_object_unref(>t_obj[i]); 198*ecc0b326SMichel Dänzer } 199*ecc0b326SMichel Dänzer } 200*ecc0b326SMichel Dänzer kfree(gtt_obj); 201*ecc0b326SMichel Dänzer } 202*ecc0b326SMichel Dänzer if (fence) { 203*ecc0b326SMichel Dänzer radeon_fence_unref(&fence); 204*ecc0b326SMichel Dänzer } 205*ecc0b326SMichel Dänzer if (r) { 206*ecc0b326SMichel Dänzer printk(KERN_WARNING "Error while testing BO move.\n"); 207*ecc0b326SMichel Dänzer } 208*ecc0b326SMichel Dänzer } 209*ecc0b326SMichel Dänzer 210