xref: /openbmc/linux/drivers/gpu/drm/radeon/radeon_encoders.c (revision dc87cd5c264cb587f16459285565830689ecf7a7)
1771fe6b9SJerome Glisse /*
2771fe6b9SJerome Glisse  * Copyright 2007-8 Advanced Micro Devices, Inc.
3771fe6b9SJerome Glisse  * Copyright 2008 Red Hat Inc.
4771fe6b9SJerome Glisse  *
5771fe6b9SJerome Glisse  * Permission is hereby granted, free of charge, to any person obtaining a
6771fe6b9SJerome Glisse  * copy of this software and associated documentation files (the "Software"),
7771fe6b9SJerome Glisse  * to deal in the Software without restriction, including without limitation
8771fe6b9SJerome Glisse  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9771fe6b9SJerome Glisse  * and/or sell copies of the Software, and to permit persons to whom the
10771fe6b9SJerome Glisse  * Software is furnished to do so, subject to the following conditions:
11771fe6b9SJerome Glisse  *
12771fe6b9SJerome Glisse  * The above copyright notice and this permission notice shall be included in
13771fe6b9SJerome Glisse  * all copies or substantial portions of the Software.
14771fe6b9SJerome Glisse  *
15771fe6b9SJerome Glisse  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16771fe6b9SJerome Glisse  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17771fe6b9SJerome Glisse  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18771fe6b9SJerome Glisse  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19771fe6b9SJerome Glisse  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20771fe6b9SJerome Glisse  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21771fe6b9SJerome Glisse  * OTHER DEALINGS IN THE SOFTWARE.
22771fe6b9SJerome Glisse  *
23771fe6b9SJerome Glisse  * Authors: Dave Airlie
24771fe6b9SJerome Glisse  *          Alex Deucher
25771fe6b9SJerome Glisse  */
26771fe6b9SJerome Glisse #include "drmP.h"
27771fe6b9SJerome Glisse #include "drm_crtc_helper.h"
28771fe6b9SJerome Glisse #include "radeon_drm.h"
29771fe6b9SJerome Glisse #include "radeon.h"
30771fe6b9SJerome Glisse #include "atom.h"
31771fe6b9SJerome Glisse 
321f3b6a45SDave Airlie static uint32_t radeon_encoder_clones(struct drm_encoder *encoder)
331f3b6a45SDave Airlie {
341f3b6a45SDave Airlie 	struct drm_device *dev = encoder->dev;
351f3b6a45SDave Airlie 	struct radeon_device *rdev = dev->dev_private;
361f3b6a45SDave Airlie 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
371f3b6a45SDave Airlie 	struct drm_encoder *clone_encoder;
381f3b6a45SDave Airlie 	uint32_t index_mask = 0;
391f3b6a45SDave Airlie 	int count;
401f3b6a45SDave Airlie 
411f3b6a45SDave Airlie 	/* DIG routing gets problematic */
421f3b6a45SDave Airlie 	if (rdev->family >= CHIP_R600)
431f3b6a45SDave Airlie 		return index_mask;
441f3b6a45SDave Airlie 	/* LVDS/TV are too wacky */
451f3b6a45SDave Airlie 	if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT)
461f3b6a45SDave Airlie 		return index_mask;
471f3b6a45SDave Airlie 	/* DVO requires 2x ppll clocks depending on tmds chip */
481f3b6a45SDave Airlie 	if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT)
491f3b6a45SDave Airlie 		return index_mask;
501f3b6a45SDave Airlie 
511f3b6a45SDave Airlie 	count = -1;
521f3b6a45SDave Airlie 	list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) {
531f3b6a45SDave Airlie 		struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder);
541f3b6a45SDave Airlie 		count++;
551f3b6a45SDave Airlie 
561f3b6a45SDave Airlie 		if (clone_encoder == encoder)
571f3b6a45SDave Airlie 			continue;
581f3b6a45SDave Airlie 		if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT))
591f3b6a45SDave Airlie 			continue;
601f3b6a45SDave Airlie 		if (radeon_clone->devices & ATOM_DEVICE_DFP2_SUPPORT)
611f3b6a45SDave Airlie 			continue;
621f3b6a45SDave Airlie 		else
631f3b6a45SDave Airlie 			index_mask |= (1 << count);
641f3b6a45SDave Airlie 	}
651f3b6a45SDave Airlie 	return index_mask;
661f3b6a45SDave Airlie }
671f3b6a45SDave Airlie 
681f3b6a45SDave Airlie void radeon_setup_encoder_clones(struct drm_device *dev)
691f3b6a45SDave Airlie {
701f3b6a45SDave Airlie 	struct drm_encoder *encoder;
711f3b6a45SDave Airlie 
721f3b6a45SDave Airlie 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
731f3b6a45SDave Airlie 		encoder->possible_clones = radeon_encoder_clones(encoder);
741f3b6a45SDave Airlie 	}
751f3b6a45SDave Airlie }
761f3b6a45SDave Airlie 
77771fe6b9SJerome Glisse uint32_t
785137ee94SAlex Deucher radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
79771fe6b9SJerome Glisse {
80771fe6b9SJerome Glisse 	struct radeon_device *rdev = dev->dev_private;
81771fe6b9SJerome Glisse 	uint32_t ret = 0;
82771fe6b9SJerome Glisse 
83771fe6b9SJerome Glisse 	switch (supported_device) {
84771fe6b9SJerome Glisse 	case ATOM_DEVICE_CRT1_SUPPORT:
85771fe6b9SJerome Glisse 	case ATOM_DEVICE_TV1_SUPPORT:
86771fe6b9SJerome Glisse 	case ATOM_DEVICE_TV2_SUPPORT:
87771fe6b9SJerome Glisse 	case ATOM_DEVICE_CRT2_SUPPORT:
88771fe6b9SJerome Glisse 	case ATOM_DEVICE_CV_SUPPORT:
89771fe6b9SJerome Glisse 		switch (dac) {
90771fe6b9SJerome Glisse 		case 1: /* dac a */
91771fe6b9SJerome Glisse 			if ((rdev->family == CHIP_RS300) ||
92771fe6b9SJerome Glisse 			    (rdev->family == CHIP_RS400) ||
93771fe6b9SJerome Glisse 			    (rdev->family == CHIP_RS480))
945137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
95771fe6b9SJerome Glisse 			else if (ASIC_IS_AVIVO(rdev))
965137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1;
97771fe6b9SJerome Glisse 			else
985137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_DAC1_ENUM_ID1;
99771fe6b9SJerome Glisse 			break;
100771fe6b9SJerome Glisse 		case 2: /* dac b */
101771fe6b9SJerome Glisse 			if (ASIC_IS_AVIVO(rdev))
1025137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1;
103771fe6b9SJerome Glisse 			else {
104771fe6b9SJerome Glisse 				/*if (rdev->family == CHIP_R200)
1055137ee94SAlex Deucher 				  ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
106771fe6b9SJerome Glisse 				  else*/
1075137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
108771fe6b9SJerome Glisse 			}
109771fe6b9SJerome Glisse 			break;
110771fe6b9SJerome Glisse 		case 3: /* external dac */
111771fe6b9SJerome Glisse 			if (ASIC_IS_AVIVO(rdev))
1125137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
113771fe6b9SJerome Glisse 			else
1145137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
115771fe6b9SJerome Glisse 			break;
116771fe6b9SJerome Glisse 		}
117771fe6b9SJerome Glisse 		break;
118771fe6b9SJerome Glisse 	case ATOM_DEVICE_LCD1_SUPPORT:
119771fe6b9SJerome Glisse 		if (ASIC_IS_AVIVO(rdev))
1205137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
121771fe6b9SJerome Glisse 		else
1225137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_LVDS_ENUM_ID1;
123771fe6b9SJerome Glisse 		break;
124771fe6b9SJerome Glisse 	case ATOM_DEVICE_DFP1_SUPPORT:
125771fe6b9SJerome Glisse 		if ((rdev->family == CHIP_RS300) ||
126771fe6b9SJerome Glisse 		    (rdev->family == CHIP_RS400) ||
127771fe6b9SJerome Glisse 		    (rdev->family == CHIP_RS480))
1285137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
129771fe6b9SJerome Glisse 		else if (ASIC_IS_AVIVO(rdev))
1305137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1;
131771fe6b9SJerome Glisse 		else
1325137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1;
133771fe6b9SJerome Glisse 		break;
134771fe6b9SJerome Glisse 	case ATOM_DEVICE_LCD2_SUPPORT:
135771fe6b9SJerome Glisse 	case ATOM_DEVICE_DFP2_SUPPORT:
136771fe6b9SJerome Glisse 		if ((rdev->family == CHIP_RS600) ||
137771fe6b9SJerome Glisse 		    (rdev->family == CHIP_RS690) ||
138771fe6b9SJerome Glisse 		    (rdev->family == CHIP_RS740))
1395137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_DDI_ENUM_ID1;
140771fe6b9SJerome Glisse 		else if (ASIC_IS_AVIVO(rdev))
1415137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
142771fe6b9SJerome Glisse 		else
1435137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
144771fe6b9SJerome Glisse 		break;
145771fe6b9SJerome Glisse 	case ATOM_DEVICE_DFP3_SUPPORT:
1465137ee94SAlex Deucher 		ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
147771fe6b9SJerome Glisse 		break;
148771fe6b9SJerome Glisse 	}
149771fe6b9SJerome Glisse 
150771fe6b9SJerome Glisse 	return ret;
151771fe6b9SJerome Glisse }
152771fe6b9SJerome Glisse 
153771fe6b9SJerome Glisse void
154771fe6b9SJerome Glisse radeon_link_encoder_connector(struct drm_device *dev)
155771fe6b9SJerome Glisse {
156771fe6b9SJerome Glisse 	struct drm_connector *connector;
157771fe6b9SJerome Glisse 	struct radeon_connector *radeon_connector;
158771fe6b9SJerome Glisse 	struct drm_encoder *encoder;
159771fe6b9SJerome Glisse 	struct radeon_encoder *radeon_encoder;
160771fe6b9SJerome Glisse 
161771fe6b9SJerome Glisse 	/* walk the list and link encoders to connectors */
162771fe6b9SJerome Glisse 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
163771fe6b9SJerome Glisse 		radeon_connector = to_radeon_connector(connector);
164771fe6b9SJerome Glisse 		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
165771fe6b9SJerome Glisse 			radeon_encoder = to_radeon_encoder(encoder);
166771fe6b9SJerome Glisse 			if (radeon_encoder->devices & radeon_connector->devices)
167771fe6b9SJerome Glisse 				drm_mode_connector_attach_encoder(connector, encoder);
168771fe6b9SJerome Glisse 		}
169771fe6b9SJerome Glisse 	}
170771fe6b9SJerome Glisse }
171771fe6b9SJerome Glisse 
1724ce001abSDave Airlie void radeon_encoder_set_active_device(struct drm_encoder *encoder)
1734ce001abSDave Airlie {
1744ce001abSDave Airlie 	struct drm_device *dev = encoder->dev;
1754ce001abSDave Airlie 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1764ce001abSDave Airlie 	struct drm_connector *connector;
1774ce001abSDave Airlie 
1784ce001abSDave Airlie 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1794ce001abSDave Airlie 		if (connector->encoder == encoder) {
1804ce001abSDave Airlie 			struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1814ce001abSDave Airlie 			radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices;
182d9fdaafbSDave Airlie 			DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
1834ce001abSDave Airlie 				  radeon_encoder->active_device, radeon_encoder->devices,
1844ce001abSDave Airlie 				  radeon_connector->devices, encoder->encoder_type);
1854ce001abSDave Airlie 		}
1864ce001abSDave Airlie 	}
1874ce001abSDave Airlie }
1884ce001abSDave Airlie 
1895b1714d3SAlex Deucher struct drm_connector *
190771fe6b9SJerome Glisse radeon_get_connector_for_encoder(struct drm_encoder *encoder)
191771fe6b9SJerome Glisse {
192771fe6b9SJerome Glisse 	struct drm_device *dev = encoder->dev;
193771fe6b9SJerome Glisse 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
194771fe6b9SJerome Glisse 	struct drm_connector *connector;
195771fe6b9SJerome Glisse 	struct radeon_connector *radeon_connector;
196771fe6b9SJerome Glisse 
197771fe6b9SJerome Glisse 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
198771fe6b9SJerome Glisse 		radeon_connector = to_radeon_connector(connector);
19943c33ed8SDave Airlie 		if (radeon_encoder->active_device & radeon_connector->devices)
200771fe6b9SJerome Glisse 			return connector;
201771fe6b9SJerome Glisse 	}
202771fe6b9SJerome Glisse 	return NULL;
203771fe6b9SJerome Glisse }
204771fe6b9SJerome Glisse 
2053f03ced8SAlex Deucher struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder)
2063e4b9982SAlex Deucher {
2073e4b9982SAlex Deucher 	struct drm_device *dev = encoder->dev;
2083e4b9982SAlex Deucher 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2093e4b9982SAlex Deucher 	struct drm_encoder *other_encoder;
2103e4b9982SAlex Deucher 	struct radeon_encoder *other_radeon_encoder;
2113e4b9982SAlex Deucher 
2123e4b9982SAlex Deucher 	if (radeon_encoder->is_ext_encoder)
2133e4b9982SAlex Deucher 		return NULL;
2143e4b9982SAlex Deucher 
2153e4b9982SAlex Deucher 	list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
2163e4b9982SAlex Deucher 		if (other_encoder == encoder)
2173e4b9982SAlex Deucher 			continue;
2183e4b9982SAlex Deucher 		other_radeon_encoder = to_radeon_encoder(other_encoder);
2193e4b9982SAlex Deucher 		if (other_radeon_encoder->is_ext_encoder &&
2203e4b9982SAlex Deucher 		    (radeon_encoder->devices & other_radeon_encoder->devices))
2213e4b9982SAlex Deucher 			return other_encoder;
2223e4b9982SAlex Deucher 	}
2233e4b9982SAlex Deucher 	return NULL;
2243e4b9982SAlex Deucher }
2253e4b9982SAlex Deucher 
2261d33e1fcSAlex Deucher u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
227d7fa8bb3SAlex Deucher {
2283f03ced8SAlex Deucher 	struct drm_encoder *other_encoder = radeon_get_external_encoder(encoder);
229d7fa8bb3SAlex Deucher 
230d7fa8bb3SAlex Deucher 	if (other_encoder) {
231d7fa8bb3SAlex Deucher 		struct radeon_encoder *radeon_encoder = to_radeon_encoder(other_encoder);
232d7fa8bb3SAlex Deucher 
233d7fa8bb3SAlex Deucher 		switch (radeon_encoder->encoder_id) {
234d7fa8bb3SAlex Deucher 		case ENCODER_OBJECT_ID_TRAVIS:
235d7fa8bb3SAlex Deucher 		case ENCODER_OBJECT_ID_NUTMEG:
236*dc87cd5cSAlex Deucher 			return radeon_encoder->encoder_id;
237d7fa8bb3SAlex Deucher 		default:
238*dc87cd5cSAlex Deucher 			return ENCODER_OBJECT_ID_NONE;
239d7fa8bb3SAlex Deucher 		}
240d7fa8bb3SAlex Deucher 	}
241*dc87cd5cSAlex Deucher 	return ENCODER_OBJECT_ID_NONE;
242d7fa8bb3SAlex Deucher }
243d7fa8bb3SAlex Deucher 
2443515387bSAlex Deucher void radeon_panel_mode_fixup(struct drm_encoder *encoder,
2453515387bSAlex Deucher 			     struct drm_display_mode *adjusted_mode)
2463515387bSAlex Deucher {
2473515387bSAlex Deucher 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2483515387bSAlex Deucher 	struct drm_device *dev = encoder->dev;
2493515387bSAlex Deucher 	struct radeon_device *rdev = dev->dev_private;
2503515387bSAlex Deucher 	struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2513515387bSAlex Deucher 	unsigned hblank = native_mode->htotal - native_mode->hdisplay;
2523515387bSAlex Deucher 	unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
2533515387bSAlex Deucher 	unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
2543515387bSAlex Deucher 	unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
2553515387bSAlex Deucher 	unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
2563515387bSAlex Deucher 	unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;
2573515387bSAlex Deucher 
2583515387bSAlex Deucher 	adjusted_mode->clock = native_mode->clock;
2593515387bSAlex Deucher 	adjusted_mode->flags = native_mode->flags;
2603515387bSAlex Deucher 
2613515387bSAlex Deucher 	if (ASIC_IS_AVIVO(rdev)) {
2623515387bSAlex Deucher 		adjusted_mode->hdisplay = native_mode->hdisplay;
2633515387bSAlex Deucher 		adjusted_mode->vdisplay = native_mode->vdisplay;
2643515387bSAlex Deucher 	}
2653515387bSAlex Deucher 
2663515387bSAlex Deucher 	adjusted_mode->htotal = native_mode->hdisplay + hblank;
2673515387bSAlex Deucher 	adjusted_mode->hsync_start = native_mode->hdisplay + hover;
2683515387bSAlex Deucher 	adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
2693515387bSAlex Deucher 
2703515387bSAlex Deucher 	adjusted_mode->vtotal = native_mode->vdisplay + vblank;
2713515387bSAlex Deucher 	adjusted_mode->vsync_start = native_mode->vdisplay + vover;
2723515387bSAlex Deucher 	adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
2733515387bSAlex Deucher 
2743515387bSAlex Deucher 	drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
2753515387bSAlex Deucher 
2763515387bSAlex Deucher 	if (ASIC_IS_AVIVO(rdev)) {
2773515387bSAlex Deucher 		adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
2783515387bSAlex Deucher 		adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
2793515387bSAlex Deucher 	}
2803515387bSAlex Deucher 
2813515387bSAlex Deucher 	adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
2823515387bSAlex Deucher 	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
2833515387bSAlex Deucher 	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
2843515387bSAlex Deucher 
2853515387bSAlex Deucher 	adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
2863515387bSAlex Deucher 	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
2873515387bSAlex Deucher 	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
2883515387bSAlex Deucher 
2893515387bSAlex Deucher }
2903515387bSAlex Deucher 
291