xref: /openbmc/linux/drivers/gpu/drm/radeon/radeon_encoders.c (revision 8aff6ad5a393b8e2ad00dce4d278ecf41397bf0d)
1771fe6b9SJerome Glisse /*
2771fe6b9SJerome Glisse  * Copyright 2007-8 Advanced Micro Devices, Inc.
3771fe6b9SJerome Glisse  * Copyright 2008 Red Hat Inc.
4771fe6b9SJerome Glisse  *
5771fe6b9SJerome Glisse  * Permission is hereby granted, free of charge, to any person obtaining a
6771fe6b9SJerome Glisse  * copy of this software and associated documentation files (the "Software"),
7771fe6b9SJerome Glisse  * to deal in the Software without restriction, including without limitation
8771fe6b9SJerome Glisse  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9771fe6b9SJerome Glisse  * and/or sell copies of the Software, and to permit persons to whom the
10771fe6b9SJerome Glisse  * Software is furnished to do so, subject to the following conditions:
11771fe6b9SJerome Glisse  *
12771fe6b9SJerome Glisse  * The above copyright notice and this permission notice shall be included in
13771fe6b9SJerome Glisse  * all copies or substantial portions of the Software.
14771fe6b9SJerome Glisse  *
15771fe6b9SJerome Glisse  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16771fe6b9SJerome Glisse  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17771fe6b9SJerome Glisse  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18771fe6b9SJerome Glisse  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19771fe6b9SJerome Glisse  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20771fe6b9SJerome Glisse  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21771fe6b9SJerome Glisse  * OTHER DEALINGS IN THE SOFTWARE.
22771fe6b9SJerome Glisse  *
23771fe6b9SJerome Glisse  * Authors: Dave Airlie
24771fe6b9SJerome Glisse  *          Alex Deucher
25771fe6b9SJerome Glisse  */
26760285e7SDavid Howells #include <drm/drmP.h>
27760285e7SDavid Howells #include <drm/drm_crtc_helper.h>
28760285e7SDavid Howells #include <drm/radeon_drm.h>
29771fe6b9SJerome Glisse #include "radeon.h"
30771fe6b9SJerome Glisse #include "atom.h"
31771fe6b9SJerome Glisse 
32f3728734SAlex Deucher extern void
33f3728734SAlex Deucher radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder,
34f3728734SAlex Deucher 			     struct drm_connector *drm_connector);
35f3728734SAlex Deucher extern void
36f3728734SAlex Deucher radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder,
37f3728734SAlex Deucher 			   struct drm_connector *drm_connector);
38f3728734SAlex Deucher 
39f3728734SAlex Deucher 
401f3b6a45SDave Airlie static uint32_t radeon_encoder_clones(struct drm_encoder *encoder)
411f3b6a45SDave Airlie {
421f3b6a45SDave Airlie 	struct drm_device *dev = encoder->dev;
431f3b6a45SDave Airlie 	struct radeon_device *rdev = dev->dev_private;
441f3b6a45SDave Airlie 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
451f3b6a45SDave Airlie 	struct drm_encoder *clone_encoder;
461f3b6a45SDave Airlie 	uint32_t index_mask = 0;
471f3b6a45SDave Airlie 	int count;
481f3b6a45SDave Airlie 
491f3b6a45SDave Airlie 	/* DIG routing gets problematic */
501f3b6a45SDave Airlie 	if (rdev->family >= CHIP_R600)
511f3b6a45SDave Airlie 		return index_mask;
521f3b6a45SDave Airlie 	/* LVDS/TV are too wacky */
531f3b6a45SDave Airlie 	if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT)
541f3b6a45SDave Airlie 		return index_mask;
551f3b6a45SDave Airlie 	/* DVO requires 2x ppll clocks depending on tmds chip */
561f3b6a45SDave Airlie 	if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT)
571f3b6a45SDave Airlie 		return index_mask;
581f3b6a45SDave Airlie 
591f3b6a45SDave Airlie 	count = -1;
601f3b6a45SDave Airlie 	list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) {
611f3b6a45SDave Airlie 		struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder);
621f3b6a45SDave Airlie 		count++;
631f3b6a45SDave Airlie 
641f3b6a45SDave Airlie 		if (clone_encoder == encoder)
651f3b6a45SDave Airlie 			continue;
661f3b6a45SDave Airlie 		if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT))
671f3b6a45SDave Airlie 			continue;
681f3b6a45SDave Airlie 		if (radeon_clone->devices & ATOM_DEVICE_DFP2_SUPPORT)
691f3b6a45SDave Airlie 			continue;
701f3b6a45SDave Airlie 		else
711f3b6a45SDave Airlie 			index_mask |= (1 << count);
721f3b6a45SDave Airlie 	}
731f3b6a45SDave Airlie 	return index_mask;
741f3b6a45SDave Airlie }
751f3b6a45SDave Airlie 
761f3b6a45SDave Airlie void radeon_setup_encoder_clones(struct drm_device *dev)
771f3b6a45SDave Airlie {
781f3b6a45SDave Airlie 	struct drm_encoder *encoder;
791f3b6a45SDave Airlie 
801f3b6a45SDave Airlie 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
811f3b6a45SDave Airlie 		encoder->possible_clones = radeon_encoder_clones(encoder);
821f3b6a45SDave Airlie 	}
831f3b6a45SDave Airlie }
841f3b6a45SDave Airlie 
85771fe6b9SJerome Glisse uint32_t
865137ee94SAlex Deucher radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
87771fe6b9SJerome Glisse {
88771fe6b9SJerome Glisse 	struct radeon_device *rdev = dev->dev_private;
89771fe6b9SJerome Glisse 	uint32_t ret = 0;
90771fe6b9SJerome Glisse 
91771fe6b9SJerome Glisse 	switch (supported_device) {
92771fe6b9SJerome Glisse 	case ATOM_DEVICE_CRT1_SUPPORT:
93771fe6b9SJerome Glisse 	case ATOM_DEVICE_TV1_SUPPORT:
94771fe6b9SJerome Glisse 	case ATOM_DEVICE_TV2_SUPPORT:
95771fe6b9SJerome Glisse 	case ATOM_DEVICE_CRT2_SUPPORT:
96771fe6b9SJerome Glisse 	case ATOM_DEVICE_CV_SUPPORT:
97771fe6b9SJerome Glisse 		switch (dac) {
98771fe6b9SJerome Glisse 		case 1: /* dac a */
99771fe6b9SJerome Glisse 			if ((rdev->family == CHIP_RS300) ||
100771fe6b9SJerome Glisse 			    (rdev->family == CHIP_RS400) ||
101771fe6b9SJerome Glisse 			    (rdev->family == CHIP_RS480))
1025137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
103771fe6b9SJerome Glisse 			else if (ASIC_IS_AVIVO(rdev))
1045137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1;
105771fe6b9SJerome Glisse 			else
1065137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_DAC1_ENUM_ID1;
107771fe6b9SJerome Glisse 			break;
108771fe6b9SJerome Glisse 		case 2: /* dac b */
109771fe6b9SJerome Glisse 			if (ASIC_IS_AVIVO(rdev))
1105137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1;
111771fe6b9SJerome Glisse 			else {
112771fe6b9SJerome Glisse 				/*if (rdev->family == CHIP_R200)
1135137ee94SAlex Deucher 				  ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
114771fe6b9SJerome Glisse 				  else*/
1155137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
116771fe6b9SJerome Glisse 			}
117771fe6b9SJerome Glisse 			break;
118771fe6b9SJerome Glisse 		case 3: /* external dac */
119771fe6b9SJerome Glisse 			if (ASIC_IS_AVIVO(rdev))
1205137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
121771fe6b9SJerome Glisse 			else
1225137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
123771fe6b9SJerome Glisse 			break;
124771fe6b9SJerome Glisse 		}
125771fe6b9SJerome Glisse 		break;
126771fe6b9SJerome Glisse 	case ATOM_DEVICE_LCD1_SUPPORT:
127771fe6b9SJerome Glisse 		if (ASIC_IS_AVIVO(rdev))
1285137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
129771fe6b9SJerome Glisse 		else
1305137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_LVDS_ENUM_ID1;
131771fe6b9SJerome Glisse 		break;
132771fe6b9SJerome Glisse 	case ATOM_DEVICE_DFP1_SUPPORT:
133771fe6b9SJerome Glisse 		if ((rdev->family == CHIP_RS300) ||
134771fe6b9SJerome Glisse 		    (rdev->family == CHIP_RS400) ||
135771fe6b9SJerome Glisse 		    (rdev->family == CHIP_RS480))
1365137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
137771fe6b9SJerome Glisse 		else if (ASIC_IS_AVIVO(rdev))
1385137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1;
139771fe6b9SJerome Glisse 		else
1405137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1;
141771fe6b9SJerome Glisse 		break;
142771fe6b9SJerome Glisse 	case ATOM_DEVICE_LCD2_SUPPORT:
143771fe6b9SJerome Glisse 	case ATOM_DEVICE_DFP2_SUPPORT:
144771fe6b9SJerome Glisse 		if ((rdev->family == CHIP_RS600) ||
145771fe6b9SJerome Glisse 		    (rdev->family == CHIP_RS690) ||
146771fe6b9SJerome Glisse 		    (rdev->family == CHIP_RS740))
1475137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_DDI_ENUM_ID1;
148771fe6b9SJerome Glisse 		else if (ASIC_IS_AVIVO(rdev))
1495137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
150771fe6b9SJerome Glisse 		else
1515137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
152771fe6b9SJerome Glisse 		break;
153771fe6b9SJerome Glisse 	case ATOM_DEVICE_DFP3_SUPPORT:
1545137ee94SAlex Deucher 		ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
155771fe6b9SJerome Glisse 		break;
156771fe6b9SJerome Glisse 	}
157771fe6b9SJerome Glisse 
158771fe6b9SJerome Glisse 	return ret;
159771fe6b9SJerome Glisse }
160771fe6b9SJerome Glisse 
161bc13018bSAlex Deucher static void radeon_encoder_add_backlight(struct radeon_encoder *radeon_encoder,
162bc13018bSAlex Deucher 					 struct drm_connector *connector)
163bc13018bSAlex Deucher {
164bc13018bSAlex Deucher 	struct drm_device *dev = radeon_encoder->base.dev;
165bc13018bSAlex Deucher 	struct radeon_device *rdev = dev->dev_private;
166bc13018bSAlex Deucher 	bool use_bl = false;
167bc13018bSAlex Deucher 
168bc13018bSAlex Deucher 	if (!(radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)))
169bc13018bSAlex Deucher 		return;
170bc13018bSAlex Deucher 
171bc13018bSAlex Deucher 	if (radeon_backlight == 0) {
172bc13018bSAlex Deucher 		return;
173bc13018bSAlex Deucher 	} else if (radeon_backlight == 1) {
174bc13018bSAlex Deucher 		use_bl = true;
175bc13018bSAlex Deucher 	} else if (radeon_backlight == -1) {
176*8aff6ad5SAlex Deucher 		/* Quirks */
177*8aff6ad5SAlex Deucher 		/* Amilo Xi 2550 only works with acpi bl */
178*8aff6ad5SAlex Deucher 		if ((rdev->pdev->device == 0x9583) &&
179*8aff6ad5SAlex Deucher 		    (rdev->pdev->subsystem_vendor == 0x1734) &&
180*8aff6ad5SAlex Deucher 		    (rdev->pdev->subsystem_device == 0x1107))
181*8aff6ad5SAlex Deucher 			use_bl = false;
182*8aff6ad5SAlex Deucher 		else
183bc13018bSAlex Deucher 			use_bl = true;
184bc13018bSAlex Deucher 	}
185bc13018bSAlex Deucher 
186bc13018bSAlex Deucher 	if (use_bl) {
187bc13018bSAlex Deucher 		if (rdev->is_atom_bios)
188bc13018bSAlex Deucher 			radeon_atom_backlight_init(radeon_encoder, connector);
189bc13018bSAlex Deucher 		else
190bc13018bSAlex Deucher 			radeon_legacy_backlight_init(radeon_encoder, connector);
191bc13018bSAlex Deucher 		rdev->mode_info.bl_encoder = radeon_encoder;
192bc13018bSAlex Deucher 	}
193bc13018bSAlex Deucher }
194bc13018bSAlex Deucher 
195771fe6b9SJerome Glisse void
196771fe6b9SJerome Glisse radeon_link_encoder_connector(struct drm_device *dev)
197771fe6b9SJerome Glisse {
198771fe6b9SJerome Glisse 	struct drm_connector *connector;
199771fe6b9SJerome Glisse 	struct radeon_connector *radeon_connector;
200771fe6b9SJerome Glisse 	struct drm_encoder *encoder;
201771fe6b9SJerome Glisse 	struct radeon_encoder *radeon_encoder;
202771fe6b9SJerome Glisse 
203771fe6b9SJerome Glisse 	/* walk the list and link encoders to connectors */
204771fe6b9SJerome Glisse 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
205771fe6b9SJerome Glisse 		radeon_connector = to_radeon_connector(connector);
206771fe6b9SJerome Glisse 		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
207771fe6b9SJerome Glisse 			radeon_encoder = to_radeon_encoder(encoder);
208f3728734SAlex Deucher 			if (radeon_encoder->devices & radeon_connector->devices) {
209771fe6b9SJerome Glisse 				drm_mode_connector_attach_encoder(connector, encoder);
210bc13018bSAlex Deucher 				if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
211bc13018bSAlex Deucher 					radeon_encoder_add_backlight(radeon_encoder, connector);
212f3728734SAlex Deucher 			}
213771fe6b9SJerome Glisse 		}
214771fe6b9SJerome Glisse 	}
215771fe6b9SJerome Glisse }
216771fe6b9SJerome Glisse 
2174ce001abSDave Airlie void radeon_encoder_set_active_device(struct drm_encoder *encoder)
2184ce001abSDave Airlie {
2194ce001abSDave Airlie 	struct drm_device *dev = encoder->dev;
2204ce001abSDave Airlie 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2214ce001abSDave Airlie 	struct drm_connector *connector;
2224ce001abSDave Airlie 
2234ce001abSDave Airlie 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2244ce001abSDave Airlie 		if (connector->encoder == encoder) {
2254ce001abSDave Airlie 			struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2264ce001abSDave Airlie 			radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices;
227d9fdaafbSDave Airlie 			DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
2284ce001abSDave Airlie 				  radeon_encoder->active_device, radeon_encoder->devices,
2294ce001abSDave Airlie 				  radeon_connector->devices, encoder->encoder_type);
2304ce001abSDave Airlie 		}
2314ce001abSDave Airlie 	}
2324ce001abSDave Airlie }
2334ce001abSDave Airlie 
2345b1714d3SAlex Deucher struct drm_connector *
235771fe6b9SJerome Glisse radeon_get_connector_for_encoder(struct drm_encoder *encoder)
236771fe6b9SJerome Glisse {
237771fe6b9SJerome Glisse 	struct drm_device *dev = encoder->dev;
238771fe6b9SJerome Glisse 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
239771fe6b9SJerome Glisse 	struct drm_connector *connector;
240771fe6b9SJerome Glisse 	struct radeon_connector *radeon_connector;
241771fe6b9SJerome Glisse 
242771fe6b9SJerome Glisse 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
243771fe6b9SJerome Glisse 		radeon_connector = to_radeon_connector(connector);
24443c33ed8SDave Airlie 		if (radeon_encoder->active_device & radeon_connector->devices)
245771fe6b9SJerome Glisse 			return connector;
246771fe6b9SJerome Glisse 	}
247771fe6b9SJerome Glisse 	return NULL;
248771fe6b9SJerome Glisse }
249771fe6b9SJerome Glisse 
2509aa59993SAlex Deucher struct drm_connector *
2519aa59993SAlex Deucher radeon_get_connector_for_encoder_init(struct drm_encoder *encoder)
2529aa59993SAlex Deucher {
2539aa59993SAlex Deucher 	struct drm_device *dev = encoder->dev;
2549aa59993SAlex Deucher 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2559aa59993SAlex Deucher 	struct drm_connector *connector;
2569aa59993SAlex Deucher 	struct radeon_connector *radeon_connector;
2579aa59993SAlex Deucher 
2589aa59993SAlex Deucher 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2599aa59993SAlex Deucher 		radeon_connector = to_radeon_connector(connector);
2609aa59993SAlex Deucher 		if (radeon_encoder->devices & radeon_connector->devices)
2619aa59993SAlex Deucher 			return connector;
2629aa59993SAlex Deucher 	}
2639aa59993SAlex Deucher 	return NULL;
2649aa59993SAlex Deucher }
2659aa59993SAlex Deucher 
2663f03ced8SAlex Deucher struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder)
2673e4b9982SAlex Deucher {
2683e4b9982SAlex Deucher 	struct drm_device *dev = encoder->dev;
2693e4b9982SAlex Deucher 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2703e4b9982SAlex Deucher 	struct drm_encoder *other_encoder;
2713e4b9982SAlex Deucher 	struct radeon_encoder *other_radeon_encoder;
2723e4b9982SAlex Deucher 
2733e4b9982SAlex Deucher 	if (radeon_encoder->is_ext_encoder)
2743e4b9982SAlex Deucher 		return NULL;
2753e4b9982SAlex Deucher 
2763e4b9982SAlex Deucher 	list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
2773e4b9982SAlex Deucher 		if (other_encoder == encoder)
2783e4b9982SAlex Deucher 			continue;
2793e4b9982SAlex Deucher 		other_radeon_encoder = to_radeon_encoder(other_encoder);
2803e4b9982SAlex Deucher 		if (other_radeon_encoder->is_ext_encoder &&
2813e4b9982SAlex Deucher 		    (radeon_encoder->devices & other_radeon_encoder->devices))
2823e4b9982SAlex Deucher 			return other_encoder;
2833e4b9982SAlex Deucher 	}
2843e4b9982SAlex Deucher 	return NULL;
2853e4b9982SAlex Deucher }
2863e4b9982SAlex Deucher 
2871d33e1fcSAlex Deucher u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
288d7fa8bb3SAlex Deucher {
2893f03ced8SAlex Deucher 	struct drm_encoder *other_encoder = radeon_get_external_encoder(encoder);
290d7fa8bb3SAlex Deucher 
291d7fa8bb3SAlex Deucher 	if (other_encoder) {
292d7fa8bb3SAlex Deucher 		struct radeon_encoder *radeon_encoder = to_radeon_encoder(other_encoder);
293d7fa8bb3SAlex Deucher 
294d7fa8bb3SAlex Deucher 		switch (radeon_encoder->encoder_id) {
295d7fa8bb3SAlex Deucher 		case ENCODER_OBJECT_ID_TRAVIS:
296d7fa8bb3SAlex Deucher 		case ENCODER_OBJECT_ID_NUTMEG:
297dc87cd5cSAlex Deucher 			return radeon_encoder->encoder_id;
298d7fa8bb3SAlex Deucher 		default:
299dc87cd5cSAlex Deucher 			return ENCODER_OBJECT_ID_NONE;
300d7fa8bb3SAlex Deucher 		}
301d7fa8bb3SAlex Deucher 	}
302dc87cd5cSAlex Deucher 	return ENCODER_OBJECT_ID_NONE;
303d7fa8bb3SAlex Deucher }
304d7fa8bb3SAlex Deucher 
3053515387bSAlex Deucher void radeon_panel_mode_fixup(struct drm_encoder *encoder,
3063515387bSAlex Deucher 			     struct drm_display_mode *adjusted_mode)
3073515387bSAlex Deucher {
3083515387bSAlex Deucher 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
3093515387bSAlex Deucher 	struct drm_device *dev = encoder->dev;
3103515387bSAlex Deucher 	struct radeon_device *rdev = dev->dev_private;
3113515387bSAlex Deucher 	struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
3123515387bSAlex Deucher 	unsigned hblank = native_mode->htotal - native_mode->hdisplay;
3133515387bSAlex Deucher 	unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
3143515387bSAlex Deucher 	unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
3153515387bSAlex Deucher 	unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
3163515387bSAlex Deucher 	unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
3173515387bSAlex Deucher 	unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;
3183515387bSAlex Deucher 
3193515387bSAlex Deucher 	adjusted_mode->clock = native_mode->clock;
3203515387bSAlex Deucher 	adjusted_mode->flags = native_mode->flags;
3213515387bSAlex Deucher 
3223515387bSAlex Deucher 	if (ASIC_IS_AVIVO(rdev)) {
3233515387bSAlex Deucher 		adjusted_mode->hdisplay = native_mode->hdisplay;
3243515387bSAlex Deucher 		adjusted_mode->vdisplay = native_mode->vdisplay;
3253515387bSAlex Deucher 	}
3263515387bSAlex Deucher 
3273515387bSAlex Deucher 	adjusted_mode->htotal = native_mode->hdisplay + hblank;
3283515387bSAlex Deucher 	adjusted_mode->hsync_start = native_mode->hdisplay + hover;
3293515387bSAlex Deucher 	adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
3303515387bSAlex Deucher 
3313515387bSAlex Deucher 	adjusted_mode->vtotal = native_mode->vdisplay + vblank;
3323515387bSAlex Deucher 	adjusted_mode->vsync_start = native_mode->vdisplay + vover;
3333515387bSAlex Deucher 	adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
3343515387bSAlex Deucher 
3353515387bSAlex Deucher 	drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
3363515387bSAlex Deucher 
3373515387bSAlex Deucher 	if (ASIC_IS_AVIVO(rdev)) {
3383515387bSAlex Deucher 		adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
3393515387bSAlex Deucher 		adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
3403515387bSAlex Deucher 	}
3413515387bSAlex Deucher 
3423515387bSAlex Deucher 	adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
3433515387bSAlex Deucher 	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
3443515387bSAlex Deucher 	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
3453515387bSAlex Deucher 
3463515387bSAlex Deucher 	adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
3473515387bSAlex Deucher 	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
3483515387bSAlex Deucher 	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
3493515387bSAlex Deucher 
3503515387bSAlex Deucher }
3513515387bSAlex Deucher 
3529aa59993SAlex Deucher bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
3539aa59993SAlex Deucher 				    u32 pixel_clock)
3549aa59993SAlex Deucher {
3551b2681baSAlex Deucher 	struct drm_device *dev = encoder->dev;
3561b2681baSAlex Deucher 	struct radeon_device *rdev = dev->dev_private;
3579aa59993SAlex Deucher 	struct drm_connector *connector;
3589aa59993SAlex Deucher 	struct radeon_connector *radeon_connector;
3599aa59993SAlex Deucher 	struct radeon_connector_atom_dig *dig_connector;
3609aa59993SAlex Deucher 
3619aa59993SAlex Deucher 	connector = radeon_get_connector_for_encoder(encoder);
3629aa59993SAlex Deucher 	/* if we don't have an active device yet, just use one of
3639aa59993SAlex Deucher 	 * the connectors tied to the encoder.
3649aa59993SAlex Deucher 	 */
3659aa59993SAlex Deucher 	if (!connector)
3669aa59993SAlex Deucher 		connector = radeon_get_connector_for_encoder_init(encoder);
3679aa59993SAlex Deucher 	radeon_connector = to_radeon_connector(connector);
3689aa59993SAlex Deucher 
3699aa59993SAlex Deucher 	switch (connector->connector_type) {
3709aa59993SAlex Deucher 	case DRM_MODE_CONNECTOR_DVII:
3719aa59993SAlex Deucher 	case DRM_MODE_CONNECTOR_HDMIB:
3729aa59993SAlex Deucher 		if (radeon_connector->use_digital) {
3739aa59993SAlex Deucher 			/* HDMI 1.3 supports up to 340 Mhz over single link */
374377bd8a9SAlex Deucher 			if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
3759aa59993SAlex Deucher 				if (pixel_clock > 340000)
3769aa59993SAlex Deucher 					return true;
3779aa59993SAlex Deucher 				else
3789aa59993SAlex Deucher 					return false;
3799aa59993SAlex Deucher 			} else {
3809aa59993SAlex Deucher 				if (pixel_clock > 165000)
3819aa59993SAlex Deucher 					return true;
3829aa59993SAlex Deucher 				else
3839aa59993SAlex Deucher 					return false;
3849aa59993SAlex Deucher 			}
3859aa59993SAlex Deucher 		} else
3869aa59993SAlex Deucher 			return false;
3879aa59993SAlex Deucher 	case DRM_MODE_CONNECTOR_DVID:
3889aa59993SAlex Deucher 	case DRM_MODE_CONNECTOR_HDMIA:
3899aa59993SAlex Deucher 	case DRM_MODE_CONNECTOR_DisplayPort:
3909aa59993SAlex Deucher 		dig_connector = radeon_connector->con_priv;
3919aa59993SAlex Deucher 		if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
3929aa59993SAlex Deucher 		    (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
3939aa59993SAlex Deucher 			return false;
3949aa59993SAlex Deucher 		else {
3959aa59993SAlex Deucher 			/* HDMI 1.3 supports up to 340 Mhz over single link */
396377bd8a9SAlex Deucher 			if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
3979aa59993SAlex Deucher 				if (pixel_clock > 340000)
3989aa59993SAlex Deucher 					return true;
3999aa59993SAlex Deucher 				else
4009aa59993SAlex Deucher 					return false;
4019aa59993SAlex Deucher 			} else {
4029aa59993SAlex Deucher 				if (pixel_clock > 165000)
4039aa59993SAlex Deucher 					return true;
4049aa59993SAlex Deucher 				else
4059aa59993SAlex Deucher 					return false;
4069aa59993SAlex Deucher 			}
4079aa59993SAlex Deucher 		}
4089aa59993SAlex Deucher 	default:
4099aa59993SAlex Deucher 		return false;
4109aa59993SAlex Deucher 	}
4119aa59993SAlex Deucher }
4129aa59993SAlex Deucher 
413