xref: /openbmc/linux/drivers/gpu/drm/radeon/radeon_encoders.c (revision 1ae79be1aab39dabe3b5444536020fe045e01650)
1771fe6b9SJerome Glisse /*
2771fe6b9SJerome Glisse  * Copyright 2007-8 Advanced Micro Devices, Inc.
3771fe6b9SJerome Glisse  * Copyright 2008 Red Hat Inc.
4771fe6b9SJerome Glisse  *
5771fe6b9SJerome Glisse  * Permission is hereby granted, free of charge, to any person obtaining a
6771fe6b9SJerome Glisse  * copy of this software and associated documentation files (the "Software"),
7771fe6b9SJerome Glisse  * to deal in the Software without restriction, including without limitation
8771fe6b9SJerome Glisse  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9771fe6b9SJerome Glisse  * and/or sell copies of the Software, and to permit persons to whom the
10771fe6b9SJerome Glisse  * Software is furnished to do so, subject to the following conditions:
11771fe6b9SJerome Glisse  *
12771fe6b9SJerome Glisse  * The above copyright notice and this permission notice shall be included in
13771fe6b9SJerome Glisse  * all copies or substantial portions of the Software.
14771fe6b9SJerome Glisse  *
15771fe6b9SJerome Glisse  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16771fe6b9SJerome Glisse  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17771fe6b9SJerome Glisse  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18771fe6b9SJerome Glisse  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19771fe6b9SJerome Glisse  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20771fe6b9SJerome Glisse  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21771fe6b9SJerome Glisse  * OTHER DEALINGS IN THE SOFTWARE.
22771fe6b9SJerome Glisse  *
23771fe6b9SJerome Glisse  * Authors: Dave Airlie
24771fe6b9SJerome Glisse  *          Alex Deucher
25771fe6b9SJerome Glisse  */
26f9183127SSam Ravnborg 
272ef79416SThomas Zimmermann #include <linux/pci.h>
282ef79416SThomas Zimmermann 
29760285e7SDavid Howells #include <drm/drm_crtc_helper.h>
30f9183127SSam Ravnborg #include <drm/drm_device.h>
31760285e7SDavid Howells #include <drm/radeon_drm.h>
32f9183127SSam Ravnborg 
33771fe6b9SJerome Glisse #include "radeon.h"
34*1ae79be1SLee Jones #include "radeon_legacy_encoders.h"
35771fe6b9SJerome Glisse #include "atom.h"
36771fe6b9SJerome Glisse 
37f3728734SAlex Deucher extern void
38f3728734SAlex Deucher radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder,
39f3728734SAlex Deucher 			   struct drm_connector *drm_connector);
40f3728734SAlex Deucher 
41f3728734SAlex Deucher 
421f3b6a45SDave Airlie static uint32_t radeon_encoder_clones(struct drm_encoder *encoder)
431f3b6a45SDave Airlie {
441f3b6a45SDave Airlie 	struct drm_device *dev = encoder->dev;
451f3b6a45SDave Airlie 	struct radeon_device *rdev = dev->dev_private;
461f3b6a45SDave Airlie 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
471f3b6a45SDave Airlie 	struct drm_encoder *clone_encoder;
481f3b6a45SDave Airlie 	uint32_t index_mask = 0;
491f3b6a45SDave Airlie 	int count;
501f3b6a45SDave Airlie 
511f3b6a45SDave Airlie 	/* DIG routing gets problematic */
521f3b6a45SDave Airlie 	if (rdev->family >= CHIP_R600)
531f3b6a45SDave Airlie 		return index_mask;
541f3b6a45SDave Airlie 	/* LVDS/TV are too wacky */
551f3b6a45SDave Airlie 	if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT)
561f3b6a45SDave Airlie 		return index_mask;
571f3b6a45SDave Airlie 	/* DVO requires 2x ppll clocks depending on tmds chip */
581f3b6a45SDave Airlie 	if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT)
591f3b6a45SDave Airlie 		return index_mask;
601f3b6a45SDave Airlie 
611f3b6a45SDave Airlie 	count = -1;
621f3b6a45SDave Airlie 	list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) {
631f3b6a45SDave Airlie 		struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder);
641f3b6a45SDave Airlie 		count++;
651f3b6a45SDave Airlie 
661f3b6a45SDave Airlie 		if (clone_encoder == encoder)
671f3b6a45SDave Airlie 			continue;
681f3b6a45SDave Airlie 		if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT))
691f3b6a45SDave Airlie 			continue;
701f3b6a45SDave Airlie 		if (radeon_clone->devices & ATOM_DEVICE_DFP2_SUPPORT)
711f3b6a45SDave Airlie 			continue;
721f3b6a45SDave Airlie 		else
731f3b6a45SDave Airlie 			index_mask |= (1 << count);
741f3b6a45SDave Airlie 	}
751f3b6a45SDave Airlie 	return index_mask;
761f3b6a45SDave Airlie }
771f3b6a45SDave Airlie 
781f3b6a45SDave Airlie void radeon_setup_encoder_clones(struct drm_device *dev)
791f3b6a45SDave Airlie {
801f3b6a45SDave Airlie 	struct drm_encoder *encoder;
811f3b6a45SDave Airlie 
821f3b6a45SDave Airlie 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
831f3b6a45SDave Airlie 		encoder->possible_clones = radeon_encoder_clones(encoder);
841f3b6a45SDave Airlie 	}
851f3b6a45SDave Airlie }
861f3b6a45SDave Airlie 
87771fe6b9SJerome Glisse uint32_t
885137ee94SAlex Deucher radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
89771fe6b9SJerome Glisse {
90771fe6b9SJerome Glisse 	struct radeon_device *rdev = dev->dev_private;
91771fe6b9SJerome Glisse 	uint32_t ret = 0;
92771fe6b9SJerome Glisse 
93771fe6b9SJerome Glisse 	switch (supported_device) {
94771fe6b9SJerome Glisse 	case ATOM_DEVICE_CRT1_SUPPORT:
95771fe6b9SJerome Glisse 	case ATOM_DEVICE_TV1_SUPPORT:
96771fe6b9SJerome Glisse 	case ATOM_DEVICE_TV2_SUPPORT:
97771fe6b9SJerome Glisse 	case ATOM_DEVICE_CRT2_SUPPORT:
98771fe6b9SJerome Glisse 	case ATOM_DEVICE_CV_SUPPORT:
99771fe6b9SJerome Glisse 		switch (dac) {
100771fe6b9SJerome Glisse 		case 1: /* dac a */
101771fe6b9SJerome Glisse 			if ((rdev->family == CHIP_RS300) ||
102771fe6b9SJerome Glisse 			    (rdev->family == CHIP_RS400) ||
103771fe6b9SJerome Glisse 			    (rdev->family == CHIP_RS480))
1045137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
105771fe6b9SJerome Glisse 			else if (ASIC_IS_AVIVO(rdev))
1065137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1;
107771fe6b9SJerome Glisse 			else
1085137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_DAC1_ENUM_ID1;
109771fe6b9SJerome Glisse 			break;
110771fe6b9SJerome Glisse 		case 2: /* dac b */
111771fe6b9SJerome Glisse 			if (ASIC_IS_AVIVO(rdev))
1125137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1;
113771fe6b9SJerome Glisse 			else {
114771fe6b9SJerome Glisse 				/*if (rdev->family == CHIP_R200)
1155137ee94SAlex Deucher 				  ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
116771fe6b9SJerome Glisse 				  else*/
1175137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
118771fe6b9SJerome Glisse 			}
119771fe6b9SJerome Glisse 			break;
120771fe6b9SJerome Glisse 		case 3: /* external dac */
121771fe6b9SJerome Glisse 			if (ASIC_IS_AVIVO(rdev))
1225137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
123771fe6b9SJerome Glisse 			else
1245137ee94SAlex Deucher 				ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
125771fe6b9SJerome Glisse 			break;
126771fe6b9SJerome Glisse 		}
127771fe6b9SJerome Glisse 		break;
128771fe6b9SJerome Glisse 	case ATOM_DEVICE_LCD1_SUPPORT:
129771fe6b9SJerome Glisse 		if (ASIC_IS_AVIVO(rdev))
1305137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
131771fe6b9SJerome Glisse 		else
1325137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_LVDS_ENUM_ID1;
133771fe6b9SJerome Glisse 		break;
134771fe6b9SJerome Glisse 	case ATOM_DEVICE_DFP1_SUPPORT:
135771fe6b9SJerome Glisse 		if ((rdev->family == CHIP_RS300) ||
136771fe6b9SJerome Glisse 		    (rdev->family == CHIP_RS400) ||
137771fe6b9SJerome Glisse 		    (rdev->family == CHIP_RS480))
1385137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
139771fe6b9SJerome Glisse 		else if (ASIC_IS_AVIVO(rdev))
1405137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1;
141771fe6b9SJerome Glisse 		else
1425137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1;
143771fe6b9SJerome Glisse 		break;
144771fe6b9SJerome Glisse 	case ATOM_DEVICE_LCD2_SUPPORT:
145771fe6b9SJerome Glisse 	case ATOM_DEVICE_DFP2_SUPPORT:
146771fe6b9SJerome Glisse 		if ((rdev->family == CHIP_RS600) ||
147771fe6b9SJerome Glisse 		    (rdev->family == CHIP_RS690) ||
148771fe6b9SJerome Glisse 		    (rdev->family == CHIP_RS740))
1495137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_DDI_ENUM_ID1;
150771fe6b9SJerome Glisse 		else if (ASIC_IS_AVIVO(rdev))
1515137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
152771fe6b9SJerome Glisse 		else
1535137ee94SAlex Deucher 			ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
154771fe6b9SJerome Glisse 		break;
155771fe6b9SJerome Glisse 	case ATOM_DEVICE_DFP3_SUPPORT:
1565137ee94SAlex Deucher 		ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
157771fe6b9SJerome Glisse 		break;
158771fe6b9SJerome Glisse 	}
159771fe6b9SJerome Glisse 
160771fe6b9SJerome Glisse 	return ret;
161771fe6b9SJerome Glisse }
162771fe6b9SJerome Glisse 
163bc13018bSAlex Deucher static void radeon_encoder_add_backlight(struct radeon_encoder *radeon_encoder,
164bc13018bSAlex Deucher 					 struct drm_connector *connector)
165bc13018bSAlex Deucher {
166bc13018bSAlex Deucher 	struct drm_device *dev = radeon_encoder->base.dev;
167bc13018bSAlex Deucher 	struct radeon_device *rdev = dev->dev_private;
168bc13018bSAlex Deucher 	bool use_bl = false;
169bc13018bSAlex Deucher 
170bc13018bSAlex Deucher 	if (!(radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)))
171bc13018bSAlex Deucher 		return;
172bc13018bSAlex Deucher 
173bc13018bSAlex Deucher 	if (radeon_backlight == 0) {
174bc13018bSAlex Deucher 		return;
175bc13018bSAlex Deucher 	} else if (radeon_backlight == 1) {
176bc13018bSAlex Deucher 		use_bl = true;
177bc13018bSAlex Deucher 	} else if (radeon_backlight == -1) {
1788aff6ad5SAlex Deucher 		/* Quirks */
1798aff6ad5SAlex Deucher 		/* Amilo Xi 2550 only works with acpi bl */
1808aff6ad5SAlex Deucher 		if ((rdev->pdev->device == 0x9583) &&
1818aff6ad5SAlex Deucher 		    (rdev->pdev->subsystem_vendor == 0x1734) &&
1828aff6ad5SAlex Deucher 		    (rdev->pdev->subsystem_device == 0x1107))
1838aff6ad5SAlex Deucher 			use_bl = false;
1847a26f9adSNathan-J. Hirschauer /* Older PPC macs use on-GPU backlight controller */
1857a26f9adSNathan-J. Hirschauer #ifndef CONFIG_PPC_PMAC
186b7bc596eSAlex Deucher 		/* disable native backlight control on older asics */
187b7bc596eSAlex Deucher 		else if (rdev->family < CHIP_R600)
188b7bc596eSAlex Deucher 			use_bl = false;
1897a26f9adSNathan-J. Hirschauer #endif
1908aff6ad5SAlex Deucher 		else
191bc13018bSAlex Deucher 			use_bl = true;
192bc13018bSAlex Deucher 	}
193bc13018bSAlex Deucher 
194bc13018bSAlex Deucher 	if (use_bl) {
195bc13018bSAlex Deucher 		if (rdev->is_atom_bios)
196bc13018bSAlex Deucher 			radeon_atom_backlight_init(radeon_encoder, connector);
197bc13018bSAlex Deucher 		else
198bc13018bSAlex Deucher 			radeon_legacy_backlight_init(radeon_encoder, connector);
199bc13018bSAlex Deucher 	}
200bc13018bSAlex Deucher }
201bc13018bSAlex Deucher 
202771fe6b9SJerome Glisse void
203771fe6b9SJerome Glisse radeon_link_encoder_connector(struct drm_device *dev)
204771fe6b9SJerome Glisse {
205771fe6b9SJerome Glisse 	struct drm_connector *connector;
206771fe6b9SJerome Glisse 	struct radeon_connector *radeon_connector;
207771fe6b9SJerome Glisse 	struct drm_encoder *encoder;
208771fe6b9SJerome Glisse 	struct radeon_encoder *radeon_encoder;
209771fe6b9SJerome Glisse 
210771fe6b9SJerome Glisse 	/* walk the list and link encoders to connectors */
211771fe6b9SJerome Glisse 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
212771fe6b9SJerome Glisse 		radeon_connector = to_radeon_connector(connector);
213771fe6b9SJerome Glisse 		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
214771fe6b9SJerome Glisse 			radeon_encoder = to_radeon_encoder(encoder);
215f3728734SAlex Deucher 			if (radeon_encoder->devices & radeon_connector->devices) {
216cde4c44dSDaniel Vetter 				drm_connector_attach_encoder(connector, encoder);
217bc13018bSAlex Deucher 				if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
218bc13018bSAlex Deucher 					radeon_encoder_add_backlight(radeon_encoder, connector);
219f3728734SAlex Deucher 			}
220771fe6b9SJerome Glisse 		}
221771fe6b9SJerome Glisse 	}
222771fe6b9SJerome Glisse }
223771fe6b9SJerome Glisse 
2244ce001abSDave Airlie void radeon_encoder_set_active_device(struct drm_encoder *encoder)
2254ce001abSDave Airlie {
2264ce001abSDave Airlie 	struct drm_device *dev = encoder->dev;
2274ce001abSDave Airlie 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2284ce001abSDave Airlie 	struct drm_connector *connector;
2294ce001abSDave Airlie 
2304ce001abSDave Airlie 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2314ce001abSDave Airlie 		if (connector->encoder == encoder) {
2324ce001abSDave Airlie 			struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2334ce001abSDave Airlie 			radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices;
234d9fdaafbSDave Airlie 			DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
2354ce001abSDave Airlie 				  radeon_encoder->active_device, radeon_encoder->devices,
2364ce001abSDave Airlie 				  radeon_connector->devices, encoder->encoder_type);
2374ce001abSDave Airlie 		}
2384ce001abSDave Airlie 	}
2394ce001abSDave Airlie }
2404ce001abSDave Airlie 
2415b1714d3SAlex Deucher struct drm_connector *
242771fe6b9SJerome Glisse radeon_get_connector_for_encoder(struct drm_encoder *encoder)
243771fe6b9SJerome Glisse {
244771fe6b9SJerome Glisse 	struct drm_device *dev = encoder->dev;
245771fe6b9SJerome Glisse 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
246771fe6b9SJerome Glisse 	struct drm_connector *connector;
247771fe6b9SJerome Glisse 	struct radeon_connector *radeon_connector;
248771fe6b9SJerome Glisse 
249771fe6b9SJerome Glisse 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
250771fe6b9SJerome Glisse 		radeon_connector = to_radeon_connector(connector);
2519843ead0SDave Airlie 		if (radeon_encoder->is_mst_encoder) {
2529843ead0SDave Airlie 			struct radeon_encoder_mst *mst_enc;
2539843ead0SDave Airlie 
2549843ead0SDave Airlie 			if (!radeon_connector->is_mst_connector)
2559843ead0SDave Airlie 				continue;
2569843ead0SDave Airlie 
2579843ead0SDave Airlie 			mst_enc = radeon_encoder->enc_priv;
2589843ead0SDave Airlie 			if (mst_enc->connector == radeon_connector->mst_port)
2599843ead0SDave Airlie 				return connector;
2609843ead0SDave Airlie 		} else if (radeon_encoder->active_device & radeon_connector->devices)
261771fe6b9SJerome Glisse 			return connector;
262771fe6b9SJerome Glisse 	}
263771fe6b9SJerome Glisse 	return NULL;
264771fe6b9SJerome Glisse }
265771fe6b9SJerome Glisse 
2669aa59993SAlex Deucher struct drm_connector *
2679aa59993SAlex Deucher radeon_get_connector_for_encoder_init(struct drm_encoder *encoder)
2689aa59993SAlex Deucher {
2699aa59993SAlex Deucher 	struct drm_device *dev = encoder->dev;
2709aa59993SAlex Deucher 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2719aa59993SAlex Deucher 	struct drm_connector *connector;
2729aa59993SAlex Deucher 	struct radeon_connector *radeon_connector;
2739aa59993SAlex Deucher 
2749aa59993SAlex Deucher 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2759aa59993SAlex Deucher 		radeon_connector = to_radeon_connector(connector);
2769aa59993SAlex Deucher 		if (radeon_encoder->devices & radeon_connector->devices)
2779aa59993SAlex Deucher 			return connector;
2789aa59993SAlex Deucher 	}
2799aa59993SAlex Deucher 	return NULL;
2809aa59993SAlex Deucher }
2819aa59993SAlex Deucher 
2823f03ced8SAlex Deucher struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder)
2833e4b9982SAlex Deucher {
2843e4b9982SAlex Deucher 	struct drm_device *dev = encoder->dev;
2853e4b9982SAlex Deucher 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2863e4b9982SAlex Deucher 	struct drm_encoder *other_encoder;
2873e4b9982SAlex Deucher 	struct radeon_encoder *other_radeon_encoder;
2883e4b9982SAlex Deucher 
2893e4b9982SAlex Deucher 	if (radeon_encoder->is_ext_encoder)
2903e4b9982SAlex Deucher 		return NULL;
2913e4b9982SAlex Deucher 
2923e4b9982SAlex Deucher 	list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
2933e4b9982SAlex Deucher 		if (other_encoder == encoder)
2943e4b9982SAlex Deucher 			continue;
2953e4b9982SAlex Deucher 		other_radeon_encoder = to_radeon_encoder(other_encoder);
2963e4b9982SAlex Deucher 		if (other_radeon_encoder->is_ext_encoder &&
2973e4b9982SAlex Deucher 		    (radeon_encoder->devices & other_radeon_encoder->devices))
2983e4b9982SAlex Deucher 			return other_encoder;
2993e4b9982SAlex Deucher 	}
3003e4b9982SAlex Deucher 	return NULL;
3013e4b9982SAlex Deucher }
3023e4b9982SAlex Deucher 
3031d33e1fcSAlex Deucher u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
304d7fa8bb3SAlex Deucher {
3053f03ced8SAlex Deucher 	struct drm_encoder *other_encoder = radeon_get_external_encoder(encoder);
306d7fa8bb3SAlex Deucher 
307d7fa8bb3SAlex Deucher 	if (other_encoder) {
308d7fa8bb3SAlex Deucher 		struct radeon_encoder *radeon_encoder = to_radeon_encoder(other_encoder);
309d7fa8bb3SAlex Deucher 
310d7fa8bb3SAlex Deucher 		switch (radeon_encoder->encoder_id) {
311d7fa8bb3SAlex Deucher 		case ENCODER_OBJECT_ID_TRAVIS:
312d7fa8bb3SAlex Deucher 		case ENCODER_OBJECT_ID_NUTMEG:
313dc87cd5cSAlex Deucher 			return radeon_encoder->encoder_id;
314d7fa8bb3SAlex Deucher 		default:
315dc87cd5cSAlex Deucher 			return ENCODER_OBJECT_ID_NONE;
316d7fa8bb3SAlex Deucher 		}
317d7fa8bb3SAlex Deucher 	}
318dc87cd5cSAlex Deucher 	return ENCODER_OBJECT_ID_NONE;
319d7fa8bb3SAlex Deucher }
320d7fa8bb3SAlex Deucher 
3213515387bSAlex Deucher void radeon_panel_mode_fixup(struct drm_encoder *encoder,
3223515387bSAlex Deucher 			     struct drm_display_mode *adjusted_mode)
3233515387bSAlex Deucher {
3243515387bSAlex Deucher 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
3253515387bSAlex Deucher 	struct drm_device *dev = encoder->dev;
3263515387bSAlex Deucher 	struct radeon_device *rdev = dev->dev_private;
3273515387bSAlex Deucher 	struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
3283515387bSAlex Deucher 	unsigned hblank = native_mode->htotal - native_mode->hdisplay;
3293515387bSAlex Deucher 	unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
3303515387bSAlex Deucher 	unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
3313515387bSAlex Deucher 	unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
3323515387bSAlex Deucher 	unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
3333515387bSAlex Deucher 	unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;
3343515387bSAlex Deucher 
3353515387bSAlex Deucher 	adjusted_mode->clock = native_mode->clock;
3363515387bSAlex Deucher 	adjusted_mode->flags = native_mode->flags;
3373515387bSAlex Deucher 
3383515387bSAlex Deucher 	if (ASIC_IS_AVIVO(rdev)) {
3393515387bSAlex Deucher 		adjusted_mode->hdisplay = native_mode->hdisplay;
3403515387bSAlex Deucher 		adjusted_mode->vdisplay = native_mode->vdisplay;
3413515387bSAlex Deucher 	}
3423515387bSAlex Deucher 
3433515387bSAlex Deucher 	adjusted_mode->htotal = native_mode->hdisplay + hblank;
3443515387bSAlex Deucher 	adjusted_mode->hsync_start = native_mode->hdisplay + hover;
3453515387bSAlex Deucher 	adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
3463515387bSAlex Deucher 
3473515387bSAlex Deucher 	adjusted_mode->vtotal = native_mode->vdisplay + vblank;
3483515387bSAlex Deucher 	adjusted_mode->vsync_start = native_mode->vdisplay + vover;
3493515387bSAlex Deucher 	adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
3503515387bSAlex Deucher 
3513515387bSAlex Deucher 	drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
3523515387bSAlex Deucher 
3533515387bSAlex Deucher 	if (ASIC_IS_AVIVO(rdev)) {
3543515387bSAlex Deucher 		adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
3553515387bSAlex Deucher 		adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
3563515387bSAlex Deucher 	}
3573515387bSAlex Deucher 
3583515387bSAlex Deucher 	adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
3593515387bSAlex Deucher 	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
3603515387bSAlex Deucher 	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
3613515387bSAlex Deucher 
3623515387bSAlex Deucher 	adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
3633515387bSAlex Deucher 	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
3643515387bSAlex Deucher 	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
3653515387bSAlex Deucher 
3663515387bSAlex Deucher }
3673515387bSAlex Deucher 
3689aa59993SAlex Deucher bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
3699aa59993SAlex Deucher 				    u32 pixel_clock)
3709aa59993SAlex Deucher {
3711b2681baSAlex Deucher 	struct drm_device *dev = encoder->dev;
3721b2681baSAlex Deucher 	struct radeon_device *rdev = dev->dev_private;
3739aa59993SAlex Deucher 	struct drm_connector *connector;
3749aa59993SAlex Deucher 	struct radeon_connector *radeon_connector;
3759aa59993SAlex Deucher 	struct radeon_connector_atom_dig *dig_connector;
3769aa59993SAlex Deucher 
3779aa59993SAlex Deucher 	connector = radeon_get_connector_for_encoder(encoder);
3789aa59993SAlex Deucher 	/* if we don't have an active device yet, just use one of
3799aa59993SAlex Deucher 	 * the connectors tied to the encoder.
3809aa59993SAlex Deucher 	 */
3819aa59993SAlex Deucher 	if (!connector)
3829aa59993SAlex Deucher 		connector = radeon_get_connector_for_encoder_init(encoder);
3839aa59993SAlex Deucher 	radeon_connector = to_radeon_connector(connector);
3849aa59993SAlex Deucher 
3859aa59993SAlex Deucher 	switch (connector->connector_type) {
3869aa59993SAlex Deucher 	case DRM_MODE_CONNECTOR_DVII:
3879aa59993SAlex Deucher 	case DRM_MODE_CONNECTOR_HDMIB:
3889aa59993SAlex Deucher 		if (radeon_connector->use_digital) {
3899aa59993SAlex Deucher 			/* HDMI 1.3 supports up to 340 Mhz over single link */
390377bd8a9SAlex Deucher 			if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
3919aa59993SAlex Deucher 				if (pixel_clock > 340000)
3929aa59993SAlex Deucher 					return true;
3939aa59993SAlex Deucher 				else
3949aa59993SAlex Deucher 					return false;
3959aa59993SAlex Deucher 			} else {
3969aa59993SAlex Deucher 				if (pixel_clock > 165000)
3979aa59993SAlex Deucher 					return true;
3989aa59993SAlex Deucher 				else
3999aa59993SAlex Deucher 					return false;
4009aa59993SAlex Deucher 			}
4019aa59993SAlex Deucher 		} else
4029aa59993SAlex Deucher 			return false;
4039aa59993SAlex Deucher 	case DRM_MODE_CONNECTOR_DVID:
4049aa59993SAlex Deucher 	case DRM_MODE_CONNECTOR_HDMIA:
4059aa59993SAlex Deucher 	case DRM_MODE_CONNECTOR_DisplayPort:
4069843ead0SDave Airlie 		if (radeon_connector->is_mst_connector)
4079843ead0SDave Airlie 			return false;
4089843ead0SDave Airlie 
4099aa59993SAlex Deucher 		dig_connector = radeon_connector->con_priv;
4109aa59993SAlex Deucher 		if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
4119aa59993SAlex Deucher 		    (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
4129aa59993SAlex Deucher 			return false;
4139aa59993SAlex Deucher 		else {
4149aa59993SAlex Deucher 			/* HDMI 1.3 supports up to 340 Mhz over single link */
415377bd8a9SAlex Deucher 			if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
4169aa59993SAlex Deucher 				if (pixel_clock > 340000)
4179aa59993SAlex Deucher 					return true;
4189aa59993SAlex Deucher 				else
4199aa59993SAlex Deucher 					return false;
4209aa59993SAlex Deucher 			} else {
4219aa59993SAlex Deucher 				if (pixel_clock > 165000)
4229aa59993SAlex Deucher 					return true;
4239aa59993SAlex Deucher 				else
4249aa59993SAlex Deucher 					return false;
4259aa59993SAlex Deucher 			}
4269aa59993SAlex Deucher 		}
4279aa59993SAlex Deucher 	default:
4289aa59993SAlex Deucher 		return false;
4299aa59993SAlex Deucher 	}
4309aa59993SAlex Deucher }
4319aa59993SAlex Deucher 
432d740a933SAlex Deucher bool radeon_encoder_is_digital(struct drm_encoder *encoder)
433d740a933SAlex Deucher {
434d740a933SAlex Deucher 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
435d740a933SAlex Deucher 	switch (radeon_encoder->encoder_id) {
436d740a933SAlex Deucher 	case ENCODER_OBJECT_ID_INTERNAL_LVDS:
437d740a933SAlex Deucher 	case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
438d740a933SAlex Deucher 	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
439d740a933SAlex Deucher 	case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
440d740a933SAlex Deucher 	case ENCODER_OBJECT_ID_INTERNAL_DVO1:
441d740a933SAlex Deucher 	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
442d740a933SAlex Deucher 	case ENCODER_OBJECT_ID_INTERNAL_DDI:
443d740a933SAlex Deucher 	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
444d740a933SAlex Deucher 	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
445d740a933SAlex Deucher 	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
446d740a933SAlex Deucher 	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
447d740a933SAlex Deucher 	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3:
448d740a933SAlex Deucher 		return true;
449d740a933SAlex Deucher 	default:
450d740a933SAlex Deucher 		return false;
451d740a933SAlex Deucher 	}
452d740a933SAlex Deucher }
453