1 /** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8 /* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include <drm/drmP.h> 33 #include <drm/radeon_drm.h> 34 #include "radeon_drv.h" 35 36 #include <drm/drm_pciids.h> 37 #include <linux/console.h> 38 #include <linux/module.h> 39 #include <linux/pm_runtime.h> 40 #include <linux/vga_switcheroo.h> 41 #include "drm_crtc_helper.h" 42 /* 43 * KMS wrapper. 44 * - 2.0.0 - initial interface 45 * - 2.1.0 - add square tiling interface 46 * - 2.2.0 - add r6xx/r7xx const buffer support 47 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 48 * - 2.4.0 - add crtc id query 49 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 50 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 51 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 52 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 53 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 54 * 2.10.0 - fusion 2D tiling 55 * 2.11.0 - backend map, initial compute support for the CS checker 56 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 57 * 2.13.0 - virtual memory support, streamout 58 * 2.14.0 - add evergreen tiling informations 59 * 2.15.0 - add max_pipes query 60 * 2.16.0 - fix evergreen 2D tiled surface calculation 61 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 62 * 2.18.0 - r600-eg: allow "invalid" DB formats 63 * 2.19.0 - r600-eg: MSAA textures 64 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 65 * 2.21.0 - r600-r700: FMASK and CMASK 66 * 2.22.0 - r600 only: RESOLVE_BOX allowed 67 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 68 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 69 * 2.25.0 - eg+: new info request for num SE and num SH 70 * 2.26.0 - r600-eg: fix htile size computation 71 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 72 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 73 * 2.29.0 - R500 FP16 color clear registers 74 * 2.30.0 - fix for FMASK texturing 75 * 2.31.0 - Add fastfb support for rs690 76 * 2.32.0 - new info request for rings working 77 * 2.33.0 - Add SI tiling mode array query 78 * 2.34.0 - Add CIK tiling mode array query 79 * 2.35.0 - Add CIK macrotile mode array query 80 * 2.36.0 - Fix CIK DCE tiling setup 81 * 2.37.0 - allow GS ring setup on r6xx/r7xx 82 * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN), 83 * CIK: 1D and linear tiling modes contain valid PIPE_CONFIG 84 * 2.39.0 - Add INFO query for number of active CUs 85 * 2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting 86 * CS to GPU on >= r600 87 */ 88 #define KMS_DRIVER_MAJOR 2 89 #define KMS_DRIVER_MINOR 40 90 #define KMS_DRIVER_PATCHLEVEL 0 91 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 92 int radeon_driver_unload_kms(struct drm_device *dev); 93 void radeon_driver_lastclose_kms(struct drm_device *dev); 94 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 95 void radeon_driver_postclose_kms(struct drm_device *dev, 96 struct drm_file *file_priv); 97 void radeon_driver_preclose_kms(struct drm_device *dev, 98 struct drm_file *file_priv); 99 int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon); 100 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); 101 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc); 102 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc); 103 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc); 104 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc, 105 int *max_error, 106 struct timeval *vblank_time, 107 unsigned flags); 108 void radeon_driver_irq_preinstall_kms(struct drm_device *dev); 109 int radeon_driver_irq_postinstall_kms(struct drm_device *dev); 110 void radeon_driver_irq_uninstall_kms(struct drm_device *dev); 111 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg); 112 void radeon_gem_object_free(struct drm_gem_object *obj); 113 int radeon_gem_object_open(struct drm_gem_object *obj, 114 struct drm_file *file_priv); 115 void radeon_gem_object_close(struct drm_gem_object *obj, 116 struct drm_file *file_priv); 117 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, 118 unsigned int flags, 119 int *vpos, int *hpos, ktime_t *stime, 120 ktime_t *etime); 121 extern bool radeon_is_px(struct drm_device *dev); 122 extern const struct drm_ioctl_desc radeon_ioctls_kms[]; 123 extern int radeon_max_kms_ioctl; 124 int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 125 int radeon_mode_dumb_mmap(struct drm_file *filp, 126 struct drm_device *dev, 127 uint32_t handle, uint64_t *offset_p); 128 int radeon_mode_dumb_create(struct drm_file *file_priv, 129 struct drm_device *dev, 130 struct drm_mode_create_dumb *args); 131 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); 132 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, 133 size_t size, 134 struct sg_table *sg); 135 int radeon_gem_prime_pin(struct drm_gem_object *obj); 136 void radeon_gem_prime_unpin(struct drm_gem_object *obj); 137 struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *); 138 void *radeon_gem_prime_vmap(struct drm_gem_object *obj); 139 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 140 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, 141 unsigned long arg); 142 143 #if defined(CONFIG_DEBUG_FS) 144 int radeon_debugfs_init(struct drm_minor *minor); 145 void radeon_debugfs_cleanup(struct drm_minor *minor); 146 #endif 147 148 /* atpx handler */ 149 #if defined(CONFIG_VGA_SWITCHEROO) 150 void radeon_register_atpx_handler(void); 151 void radeon_unregister_atpx_handler(void); 152 #else 153 static inline void radeon_register_atpx_handler(void) {} 154 static inline void radeon_unregister_atpx_handler(void) {} 155 #endif 156 157 int radeon_no_wb; 158 int radeon_modeset = -1; 159 int radeon_dynclks = -1; 160 int radeon_r4xx_atom = 0; 161 int radeon_agpmode = 0; 162 int radeon_vram_limit = 0; 163 int radeon_gart_size = -1; /* auto */ 164 int radeon_benchmarking = 0; 165 int radeon_testing = 0; 166 int radeon_connector_table = 0; 167 int radeon_tv = 1; 168 int radeon_audio = -1; 169 int radeon_disp_priority = 0; 170 int radeon_hw_i2c = 0; 171 int radeon_pcie_gen2 = -1; 172 int radeon_msi = -1; 173 int radeon_lockup_timeout = 10000; 174 int radeon_fastfb = 0; 175 int radeon_dpm = -1; 176 int radeon_aspm = -1; 177 int radeon_runtime_pm = -1; 178 int radeon_hard_reset = 0; 179 int radeon_vm_size = 8; 180 int radeon_vm_block_size = -1; 181 int radeon_deep_color = 0; 182 int radeon_use_pflipirq = 2; 183 int radeon_bapm = -1; 184 185 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 186 module_param_named(no_wb, radeon_no_wb, int, 0444); 187 188 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 189 module_param_named(modeset, radeon_modeset, int, 0400); 190 191 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 192 module_param_named(dynclks, radeon_dynclks, int, 0444); 193 194 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 195 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 196 197 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); 198 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 199 200 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 201 module_param_named(agpmode, radeon_agpmode, int, 0444); 202 203 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); 204 module_param_named(gartsize, radeon_gart_size, int, 0600); 205 206 MODULE_PARM_DESC(benchmark, "Run benchmark"); 207 module_param_named(benchmark, radeon_benchmarking, int, 0444); 208 209 MODULE_PARM_DESC(test, "Run tests"); 210 module_param_named(test, radeon_testing, int, 0444); 211 212 MODULE_PARM_DESC(connector_table, "Force connector table"); 213 module_param_named(connector_table, radeon_connector_table, int, 0444); 214 215 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 216 module_param_named(tv, radeon_tv, int, 0444); 217 218 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)"); 219 module_param_named(audio, radeon_audio, int, 0444); 220 221 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 222 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 223 224 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 225 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 226 227 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 228 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 229 230 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 231 module_param_named(msi, radeon_msi, int, 0444); 232 233 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)"); 234 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 235 236 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)"); 237 module_param_named(fastfb, radeon_fastfb, int, 0444); 238 239 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)"); 240 module_param_named(dpm, radeon_dpm, int, 0444); 241 242 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)"); 243 module_param_named(aspm, radeon_aspm, int, 0444); 244 245 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)"); 246 module_param_named(runpm, radeon_runtime_pm, int, 0444); 247 248 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); 249 module_param_named(hard_reset, radeon_hard_reset, int, 0444); 250 251 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)"); 252 module_param_named(vm_size, radeon_vm_size, int, 0444); 253 254 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)"); 255 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444); 256 257 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))"); 258 module_param_named(deep_color, radeon_deep_color, int, 0444); 259 260 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))"); 261 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444); 262 263 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)"); 264 module_param_named(bapm, radeon_bapm, int, 0444); 265 266 static struct pci_device_id pciidlist[] = { 267 radeon_PCI_IDS 268 }; 269 270 MODULE_DEVICE_TABLE(pci, pciidlist); 271 272 #ifdef CONFIG_DRM_RADEON_UMS 273 274 static int radeon_suspend(struct drm_device *dev, pm_message_t state) 275 { 276 drm_radeon_private_t *dev_priv = dev->dev_private; 277 278 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 279 return 0; 280 281 /* Disable *all* interrupts */ 282 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 283 RADEON_WRITE(R500_DxMODE_INT_MASK, 0); 284 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); 285 return 0; 286 } 287 288 static int radeon_resume(struct drm_device *dev) 289 { 290 drm_radeon_private_t *dev_priv = dev->dev_private; 291 292 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) 293 return 0; 294 295 /* Restore interrupt registers */ 296 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) 297 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); 298 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); 299 return 0; 300 } 301 302 303 static const struct file_operations radeon_driver_old_fops = { 304 .owner = THIS_MODULE, 305 .open = drm_open, 306 .release = drm_release, 307 .unlocked_ioctl = drm_ioctl, 308 .mmap = drm_mmap, 309 .poll = drm_poll, 310 .read = drm_read, 311 #ifdef CONFIG_COMPAT 312 .compat_ioctl = radeon_compat_ioctl, 313 #endif 314 .llseek = noop_llseek, 315 }; 316 317 static struct drm_driver driver_old = { 318 .driver_features = 319 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | 320 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, 321 .dev_priv_size = sizeof(drm_radeon_buf_priv_t), 322 .load = radeon_driver_load, 323 .firstopen = radeon_driver_firstopen, 324 .open = radeon_driver_open, 325 .preclose = radeon_driver_preclose, 326 .postclose = radeon_driver_postclose, 327 .lastclose = radeon_driver_lastclose, 328 .unload = radeon_driver_unload, 329 .suspend = radeon_suspend, 330 .resume = radeon_resume, 331 .get_vblank_counter = radeon_get_vblank_counter, 332 .enable_vblank = radeon_enable_vblank, 333 .disable_vblank = radeon_disable_vblank, 334 .master_create = radeon_master_create, 335 .master_destroy = radeon_master_destroy, 336 .irq_preinstall = radeon_driver_irq_preinstall, 337 .irq_postinstall = radeon_driver_irq_postinstall, 338 .irq_uninstall = radeon_driver_irq_uninstall, 339 .irq_handler = radeon_driver_irq_handler, 340 .ioctls = radeon_ioctls, 341 .dma_ioctl = radeon_cp_buffers, 342 .fops = &radeon_driver_old_fops, 343 .name = DRIVER_NAME, 344 .desc = DRIVER_DESC, 345 .date = DRIVER_DATE, 346 .major = DRIVER_MAJOR, 347 .minor = DRIVER_MINOR, 348 .patchlevel = DRIVER_PATCHLEVEL, 349 }; 350 351 #endif 352 353 static struct drm_driver kms_driver; 354 355 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) 356 { 357 struct apertures_struct *ap; 358 bool primary = false; 359 360 ap = alloc_apertures(1); 361 if (!ap) 362 return -ENOMEM; 363 364 ap->ranges[0].base = pci_resource_start(pdev, 0); 365 ap->ranges[0].size = pci_resource_len(pdev, 0); 366 367 #ifdef CONFIG_X86 368 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 369 #endif 370 remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 371 kfree(ap); 372 373 return 0; 374 } 375 376 static int radeon_pci_probe(struct pci_dev *pdev, 377 const struct pci_device_id *ent) 378 { 379 int ret; 380 381 /* Get rid of things like offb */ 382 ret = radeon_kick_out_firmware_fb(pdev); 383 if (ret) 384 return ret; 385 386 return drm_get_pci_dev(pdev, ent, &kms_driver); 387 } 388 389 static void 390 radeon_pci_remove(struct pci_dev *pdev) 391 { 392 struct drm_device *dev = pci_get_drvdata(pdev); 393 394 drm_put_dev(dev); 395 } 396 397 static int radeon_pmops_suspend(struct device *dev) 398 { 399 struct pci_dev *pdev = to_pci_dev(dev); 400 struct drm_device *drm_dev = pci_get_drvdata(pdev); 401 return radeon_suspend_kms(drm_dev, true, true); 402 } 403 404 static int radeon_pmops_resume(struct device *dev) 405 { 406 struct pci_dev *pdev = to_pci_dev(dev); 407 struct drm_device *drm_dev = pci_get_drvdata(pdev); 408 return radeon_resume_kms(drm_dev, true, true); 409 } 410 411 static int radeon_pmops_freeze(struct device *dev) 412 { 413 struct pci_dev *pdev = to_pci_dev(dev); 414 struct drm_device *drm_dev = pci_get_drvdata(pdev); 415 return radeon_suspend_kms(drm_dev, false, true); 416 } 417 418 static int radeon_pmops_thaw(struct device *dev) 419 { 420 struct pci_dev *pdev = to_pci_dev(dev); 421 struct drm_device *drm_dev = pci_get_drvdata(pdev); 422 return radeon_resume_kms(drm_dev, false, true); 423 } 424 425 static int radeon_pmops_runtime_suspend(struct device *dev) 426 { 427 struct pci_dev *pdev = to_pci_dev(dev); 428 struct drm_device *drm_dev = pci_get_drvdata(pdev); 429 int ret; 430 431 if (!radeon_is_px(drm_dev)) { 432 pm_runtime_forbid(dev); 433 return -EBUSY; 434 } 435 436 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 437 drm_kms_helper_poll_disable(drm_dev); 438 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); 439 440 ret = radeon_suspend_kms(drm_dev, false, false); 441 pci_save_state(pdev); 442 pci_disable_device(pdev); 443 pci_ignore_hotplug(pdev); 444 pci_set_power_state(pdev, PCI_D3cold); 445 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 446 447 return 0; 448 } 449 450 static int radeon_pmops_runtime_resume(struct device *dev) 451 { 452 struct pci_dev *pdev = to_pci_dev(dev); 453 struct drm_device *drm_dev = pci_get_drvdata(pdev); 454 int ret; 455 456 if (!radeon_is_px(drm_dev)) 457 return -EINVAL; 458 459 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 460 461 pci_set_power_state(pdev, PCI_D0); 462 pci_restore_state(pdev); 463 ret = pci_enable_device(pdev); 464 if (ret) 465 return ret; 466 pci_set_master(pdev); 467 468 ret = radeon_resume_kms(drm_dev, false, false); 469 drm_kms_helper_poll_enable(drm_dev); 470 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); 471 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 472 return 0; 473 } 474 475 static int radeon_pmops_runtime_idle(struct device *dev) 476 { 477 struct pci_dev *pdev = to_pci_dev(dev); 478 struct drm_device *drm_dev = pci_get_drvdata(pdev); 479 struct drm_crtc *crtc; 480 481 if (!radeon_is_px(drm_dev)) { 482 pm_runtime_forbid(dev); 483 return -EBUSY; 484 } 485 486 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { 487 if (crtc->enabled) { 488 DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); 489 return -EBUSY; 490 } 491 } 492 493 pm_runtime_mark_last_busy(dev); 494 pm_runtime_autosuspend(dev); 495 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 496 return 1; 497 } 498 499 long radeon_drm_ioctl(struct file *filp, 500 unsigned int cmd, unsigned long arg) 501 { 502 struct drm_file *file_priv = filp->private_data; 503 struct drm_device *dev; 504 long ret; 505 dev = file_priv->minor->dev; 506 ret = pm_runtime_get_sync(dev->dev); 507 if (ret < 0) 508 return ret; 509 510 ret = drm_ioctl(filp, cmd, arg); 511 512 pm_runtime_mark_last_busy(dev->dev); 513 pm_runtime_put_autosuspend(dev->dev); 514 return ret; 515 } 516 517 static const struct dev_pm_ops radeon_pm_ops = { 518 .suspend = radeon_pmops_suspend, 519 .resume = radeon_pmops_resume, 520 .freeze = radeon_pmops_freeze, 521 .thaw = radeon_pmops_thaw, 522 .poweroff = radeon_pmops_freeze, 523 .restore = radeon_pmops_resume, 524 .runtime_suspend = radeon_pmops_runtime_suspend, 525 .runtime_resume = radeon_pmops_runtime_resume, 526 .runtime_idle = radeon_pmops_runtime_idle, 527 }; 528 529 static const struct file_operations radeon_driver_kms_fops = { 530 .owner = THIS_MODULE, 531 .open = drm_open, 532 .release = drm_release, 533 .unlocked_ioctl = radeon_drm_ioctl, 534 .mmap = radeon_mmap, 535 .poll = drm_poll, 536 .read = drm_read, 537 #ifdef CONFIG_COMPAT 538 .compat_ioctl = radeon_kms_compat_ioctl, 539 #endif 540 }; 541 542 static struct drm_driver kms_driver = { 543 .driver_features = 544 DRIVER_USE_AGP | 545 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | 546 DRIVER_PRIME | DRIVER_RENDER, 547 .load = radeon_driver_load_kms, 548 .open = radeon_driver_open_kms, 549 .preclose = radeon_driver_preclose_kms, 550 .postclose = radeon_driver_postclose_kms, 551 .lastclose = radeon_driver_lastclose_kms, 552 .unload = radeon_driver_unload_kms, 553 .get_vblank_counter = radeon_get_vblank_counter_kms, 554 .enable_vblank = radeon_enable_vblank_kms, 555 .disable_vblank = radeon_disable_vblank_kms, 556 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, 557 .get_scanout_position = radeon_get_crtc_scanoutpos, 558 #if defined(CONFIG_DEBUG_FS) 559 .debugfs_init = radeon_debugfs_init, 560 .debugfs_cleanup = radeon_debugfs_cleanup, 561 #endif 562 .irq_preinstall = radeon_driver_irq_preinstall_kms, 563 .irq_postinstall = radeon_driver_irq_postinstall_kms, 564 .irq_uninstall = radeon_driver_irq_uninstall_kms, 565 .irq_handler = radeon_driver_irq_handler_kms, 566 .ioctls = radeon_ioctls_kms, 567 .gem_free_object = radeon_gem_object_free, 568 .gem_open_object = radeon_gem_object_open, 569 .gem_close_object = radeon_gem_object_close, 570 .dumb_create = radeon_mode_dumb_create, 571 .dumb_map_offset = radeon_mode_dumb_mmap, 572 .dumb_destroy = drm_gem_dumb_destroy, 573 .fops = &radeon_driver_kms_fops, 574 575 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 576 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 577 .gem_prime_export = drm_gem_prime_export, 578 .gem_prime_import = drm_gem_prime_import, 579 .gem_prime_pin = radeon_gem_prime_pin, 580 .gem_prime_unpin = radeon_gem_prime_unpin, 581 .gem_prime_res_obj = radeon_gem_prime_res_obj, 582 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, 583 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, 584 .gem_prime_vmap = radeon_gem_prime_vmap, 585 .gem_prime_vunmap = radeon_gem_prime_vunmap, 586 587 .name = DRIVER_NAME, 588 .desc = DRIVER_DESC, 589 .date = DRIVER_DATE, 590 .major = KMS_DRIVER_MAJOR, 591 .minor = KMS_DRIVER_MINOR, 592 .patchlevel = KMS_DRIVER_PATCHLEVEL, 593 }; 594 595 static struct drm_driver *driver; 596 static struct pci_driver *pdriver; 597 598 #ifdef CONFIG_DRM_RADEON_UMS 599 static struct pci_driver radeon_pci_driver = { 600 .name = DRIVER_NAME, 601 .id_table = pciidlist, 602 }; 603 #endif 604 605 static struct pci_driver radeon_kms_pci_driver = { 606 .name = DRIVER_NAME, 607 .id_table = pciidlist, 608 .probe = radeon_pci_probe, 609 .remove = radeon_pci_remove, 610 .driver.pm = &radeon_pm_ops, 611 }; 612 613 static int __init radeon_init(void) 614 { 615 #ifdef CONFIG_VGA_CONSOLE 616 if (vgacon_text_force() && radeon_modeset == -1) { 617 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 618 radeon_modeset = 0; 619 } 620 #endif 621 /* set to modesetting by default if not nomodeset */ 622 if (radeon_modeset == -1) 623 radeon_modeset = 1; 624 625 if (radeon_modeset == 1) { 626 DRM_INFO("radeon kernel modesetting enabled.\n"); 627 driver = &kms_driver; 628 pdriver = &radeon_kms_pci_driver; 629 driver->driver_features |= DRIVER_MODESET; 630 driver->num_ioctls = radeon_max_kms_ioctl; 631 radeon_register_atpx_handler(); 632 633 } else { 634 #ifdef CONFIG_DRM_RADEON_UMS 635 DRM_INFO("radeon userspace modesetting enabled.\n"); 636 driver = &driver_old; 637 pdriver = &radeon_pci_driver; 638 driver->driver_features &= ~DRIVER_MODESET; 639 driver->num_ioctls = radeon_max_ioctl; 640 #else 641 DRM_ERROR("No UMS support in radeon module!\n"); 642 return -EINVAL; 643 #endif 644 } 645 646 /* let modprobe override vga console setting */ 647 return drm_pci_init(driver, pdriver); 648 } 649 650 static void __exit radeon_exit(void) 651 { 652 drm_pci_exit(driver, pdriver); 653 radeon_unregister_atpx_handler(); 654 } 655 656 module_init(radeon_init); 657 module_exit(radeon_exit); 658 659 MODULE_AUTHOR(DRIVER_AUTHOR); 660 MODULE_DESCRIPTION(DRIVER_DESC); 661 MODULE_LICENSE("GPL and additional rights"); 662