xref: /openbmc/linux/drivers/gpu/drm/radeon/atombios_i2c.c (revision 4543eda52113d1e2cc0e9bf416f79597e6ef1ec7)
130388c6eSAlex Deucher /*
230388c6eSAlex Deucher  * Copyright 2011 Advanced Micro Devices, Inc.
330388c6eSAlex Deucher  *
430388c6eSAlex Deucher  * Permission is hereby granted, free of charge, to any person obtaining a
530388c6eSAlex Deucher  * copy of this software and associated documentation files (the "Software"),
630388c6eSAlex Deucher  * to deal in the Software without restriction, including without limitation
730388c6eSAlex Deucher  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
830388c6eSAlex Deucher  * and/or sell copies of the Software, and to permit persons to whom the
930388c6eSAlex Deucher  * Software is furnished to do so, subject to the following conditions:
1030388c6eSAlex Deucher  *
1130388c6eSAlex Deucher  * The above copyright notice and this permission notice shall be included in
1230388c6eSAlex Deucher  * all copies or substantial portions of the Software.
1330388c6eSAlex Deucher  *
1430388c6eSAlex Deucher  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1530388c6eSAlex Deucher  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1630388c6eSAlex Deucher  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1730388c6eSAlex Deucher  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
1830388c6eSAlex Deucher  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
1930388c6eSAlex Deucher  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
2030388c6eSAlex Deucher  * OTHER DEALINGS IN THE SOFTWARE.
2130388c6eSAlex Deucher  *
2230388c6eSAlex Deucher  * Authors: Alex Deucher
2330388c6eSAlex Deucher  *
2430388c6eSAlex Deucher  */
25760285e7SDavid Howells #include <drm/drmP.h>
26760285e7SDavid Howells #include <drm/radeon_drm.h>
2730388c6eSAlex Deucher #include "radeon.h"
2830388c6eSAlex Deucher #include "atom.h"
2930388c6eSAlex Deucher 
30*4543eda5SAlex Deucher extern void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
31*4543eda5SAlex Deucher 
3230388c6eSAlex Deucher #define TARGET_HW_I2C_CLOCK 50
3330388c6eSAlex Deucher 
3430388c6eSAlex Deucher /* these are a limitation of ProcessI2cChannelTransaction not the hw */
3530388c6eSAlex Deucher #define ATOM_MAX_HW_I2C_WRITE 2
3630388c6eSAlex Deucher #define ATOM_MAX_HW_I2C_READ  255
3730388c6eSAlex Deucher 
3830388c6eSAlex Deucher static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
3930388c6eSAlex Deucher 				 u8 slave_addr, u8 flags,
4030388c6eSAlex Deucher 				 u8 *buf, u8 num)
4130388c6eSAlex Deucher {
4230388c6eSAlex Deucher 	struct drm_device *dev = chan->dev;
4330388c6eSAlex Deucher 	struct radeon_device *rdev = dev->dev_private;
4430388c6eSAlex Deucher 	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
4530388c6eSAlex Deucher 	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
4630388c6eSAlex Deucher 	unsigned char *base;
4730388c6eSAlex Deucher 	u16 out;
4830388c6eSAlex Deucher 
4930388c6eSAlex Deucher 	memset(&args, 0, sizeof(args));
5030388c6eSAlex Deucher 
5130388c6eSAlex Deucher 	base = (unsigned char *)rdev->mode_info.atom_context->scratch;
5230388c6eSAlex Deucher 
5330388c6eSAlex Deucher 	if (flags & HW_I2C_WRITE) {
5430388c6eSAlex Deucher 		if (num > ATOM_MAX_HW_I2C_WRITE) {
5530388c6eSAlex Deucher 			DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 2)\n", num);
5630388c6eSAlex Deucher 			return -EINVAL;
5730388c6eSAlex Deucher 		}
5830388c6eSAlex Deucher 		memcpy(&out, buf, num);
5930388c6eSAlex Deucher 		args.lpI2CDataOut = cpu_to_le16(out);
6030388c6eSAlex Deucher 	} else {
6130388c6eSAlex Deucher 		if (num > ATOM_MAX_HW_I2C_READ) {
6230388c6eSAlex Deucher 			DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num);
6330388c6eSAlex Deucher 			return -EINVAL;
6430388c6eSAlex Deucher 		}
6530388c6eSAlex Deucher 	}
6630388c6eSAlex Deucher 
6730388c6eSAlex Deucher 	args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
6830388c6eSAlex Deucher 	args.ucRegIndex = 0;
6930388c6eSAlex Deucher 	args.ucTransBytes = num;
7030388c6eSAlex Deucher 	args.ucSlaveAddr = slave_addr << 1;
7130388c6eSAlex Deucher 	args.ucLineNumber = chan->rec.i2c_id;
7230388c6eSAlex Deucher 
7330388c6eSAlex Deucher 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
7430388c6eSAlex Deucher 
7530388c6eSAlex Deucher 	/* error */
7630388c6eSAlex Deucher 	if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
7730388c6eSAlex Deucher 		DRM_DEBUG_KMS("hw_i2c error\n");
7830388c6eSAlex Deucher 		return -EIO;
7930388c6eSAlex Deucher 	}
8030388c6eSAlex Deucher 
8130388c6eSAlex Deucher 	if (!(flags & HW_I2C_WRITE))
82*4543eda5SAlex Deucher 		radeon_atom_copy_swap(buf, base, num, false);
8330388c6eSAlex Deucher 
8430388c6eSAlex Deucher 	return 0;
8530388c6eSAlex Deucher }
8630388c6eSAlex Deucher 
8730388c6eSAlex Deucher int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
8830388c6eSAlex Deucher 			    struct i2c_msg *msgs, int num)
8930388c6eSAlex Deucher {
9030388c6eSAlex Deucher 	struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
9130388c6eSAlex Deucher 	struct i2c_msg *p;
9230388c6eSAlex Deucher 	int i, remaining, current_count, buffer_offset, max_bytes, ret;
9330388c6eSAlex Deucher 	u8 buf = 0, flags;
9430388c6eSAlex Deucher 
9530388c6eSAlex Deucher 	/* check for bus probe */
9630388c6eSAlex Deucher 	p = &msgs[0];
9730388c6eSAlex Deucher 	if ((num == 1) && (p->len == 0)) {
9830388c6eSAlex Deucher 		ret = radeon_process_i2c_ch(i2c,
9930388c6eSAlex Deucher 					    p->addr, HW_I2C_WRITE,
10030388c6eSAlex Deucher 					    &buf, 1);
10130388c6eSAlex Deucher 		if (ret)
10230388c6eSAlex Deucher 			return ret;
10330388c6eSAlex Deucher 		else
10430388c6eSAlex Deucher 			return num;
10530388c6eSAlex Deucher 	}
10630388c6eSAlex Deucher 
10730388c6eSAlex Deucher 	for (i = 0; i < num; i++) {
10830388c6eSAlex Deucher 		p = &msgs[i];
10930388c6eSAlex Deucher 		remaining = p->len;
11030388c6eSAlex Deucher 		buffer_offset = 0;
11130388c6eSAlex Deucher 		/* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
11230388c6eSAlex Deucher 		if (p->flags & I2C_M_RD) {
11330388c6eSAlex Deucher 			max_bytes = ATOM_MAX_HW_I2C_READ;
11430388c6eSAlex Deucher 			flags = HW_I2C_READ;
11530388c6eSAlex Deucher 		} else {
11630388c6eSAlex Deucher 			max_bytes = ATOM_MAX_HW_I2C_WRITE;
11730388c6eSAlex Deucher 			flags = HW_I2C_WRITE;
11830388c6eSAlex Deucher 		}
11930388c6eSAlex Deucher 		while (remaining) {
12030388c6eSAlex Deucher 			if (remaining > max_bytes)
12130388c6eSAlex Deucher 				current_count = max_bytes;
12230388c6eSAlex Deucher 			else
12330388c6eSAlex Deucher 				current_count = remaining;
12430388c6eSAlex Deucher 			ret = radeon_process_i2c_ch(i2c,
12530388c6eSAlex Deucher 						    p->addr, flags,
12630388c6eSAlex Deucher 						    &p->buf[buffer_offset], current_count);
12730388c6eSAlex Deucher 			if (ret)
12830388c6eSAlex Deucher 				return ret;
12930388c6eSAlex Deucher 			remaining -= current_count;
13030388c6eSAlex Deucher 			buffer_offset += current_count;
13130388c6eSAlex Deucher 		}
13230388c6eSAlex Deucher 	}
13330388c6eSAlex Deucher 
13430388c6eSAlex Deucher 	return num;
13530388c6eSAlex Deucher }
13630388c6eSAlex Deucher 
13730388c6eSAlex Deucher u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
13830388c6eSAlex Deucher {
13930388c6eSAlex Deucher 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
14030388c6eSAlex Deucher }
14130388c6eSAlex Deucher 
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