19aa2c232SShawn Guo // SPDX-License-Identifier: GPL-2.0-only
29aa2c232SShawn Guo /*
39aa2c232SShawn Guo * Copyright (c) 2021, Linaro Limited
49aa2c232SShawn Guo *
59aa2c232SShawn Guo * Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree:
69aa2c232SShawn Guo * Copyright (c) 2013, The Linux Foundation. All rights reserved.
79aa2c232SShawn Guo */
89aa2c232SShawn Guo
99aa2c232SShawn Guo #include <linux/backlight.h>
109aa2c232SShawn Guo #include <linux/delay.h>
119aa2c232SShawn Guo #include <linux/gpio/consumer.h>
129aa2c232SShawn Guo #include <linux/module.h>
139aa2c232SShawn Guo #include <linux/of.h>
149aa2c232SShawn Guo #include <linux/regulator/consumer.h>
159aa2c232SShawn Guo
169aa2c232SShawn Guo #include <drm/drm_mipi_dsi.h>
179aa2c232SShawn Guo #include <drm/drm_modes.h>
189aa2c232SShawn Guo #include <drm/drm_panel.h>
199aa2c232SShawn Guo
209aa2c232SShawn Guo struct truly_nt35521 {
219aa2c232SShawn Guo struct drm_panel panel;
229aa2c232SShawn Guo struct mipi_dsi_device *dsi;
239aa2c232SShawn Guo struct regulator_bulk_data supplies[2];
249aa2c232SShawn Guo struct gpio_desc *reset_gpio;
259aa2c232SShawn Guo struct gpio_desc *blen_gpio;
269aa2c232SShawn Guo bool prepared;
279aa2c232SShawn Guo bool enabled;
289aa2c232SShawn Guo };
299aa2c232SShawn Guo
309aa2c232SShawn Guo static inline
to_truly_nt35521(struct drm_panel * panel)319aa2c232SShawn Guo struct truly_nt35521 *to_truly_nt35521(struct drm_panel *panel)
329aa2c232SShawn Guo {
339aa2c232SShawn Guo return container_of(panel, struct truly_nt35521, panel);
349aa2c232SShawn Guo }
359aa2c232SShawn Guo
truly_nt35521_reset(struct truly_nt35521 * ctx)369aa2c232SShawn Guo static void truly_nt35521_reset(struct truly_nt35521 *ctx)
379aa2c232SShawn Guo {
389aa2c232SShawn Guo gpiod_set_value_cansleep(ctx->reset_gpio, 1);
399aa2c232SShawn Guo usleep_range(1000, 2000);
409aa2c232SShawn Guo gpiod_set_value_cansleep(ctx->reset_gpio, 1);
419aa2c232SShawn Guo usleep_range(10000, 11000);
429aa2c232SShawn Guo gpiod_set_value_cansleep(ctx->reset_gpio, 0);
439aa2c232SShawn Guo msleep(150);
449aa2c232SShawn Guo }
459aa2c232SShawn Guo
truly_nt35521_on(struct truly_nt35521 * ctx)469aa2c232SShawn Guo static int truly_nt35521_on(struct truly_nt35521 *ctx)
479aa2c232SShawn Guo {
489aa2c232SShawn Guo struct mipi_dsi_device *dsi = ctx->dsi;
499aa2c232SShawn Guo struct device *dev = &dsi->dev;
509aa2c232SShawn Guo int ret;
519aa2c232SShawn Guo
529aa2c232SShawn Guo dsi->mode_flags |= MIPI_DSI_MODE_LPM;
539aa2c232SShawn Guo
54*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
55*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xff, 0xaa, 0x55, 0xa5, 0x80);
56*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0x6f, 0x11, 0x00);
57*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf7, 0x20, 0x00);
58*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0x6f, 0x01);
59*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb1, 0x21);
60*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbd, 0x01, 0xa0, 0x10, 0x08, 0x01);
61*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb8, 0x01, 0x02, 0x0c, 0x02);
62*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbb, 0x11, 0x11);
63*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbc, 0x00, 0x00);
64*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb6, 0x02);
65*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x01);
66*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb0, 0x09, 0x09);
67*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb1, 0x09, 0x09);
68*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbc, 0x8c, 0x00);
69*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbd, 0x8c, 0x00);
70*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xca, 0x00);
71*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc0, 0x04);
72*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbe, 0xb5);
73*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb3, 0x35, 0x35);
74*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb4, 0x25, 0x25);
75*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb9, 0x43, 0x43);
76*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xba, 0x24, 0x24);
77*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x02);
78*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xee, 0x03);
79*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb0,
809aa2c232SShawn Guo 0x00, 0xb2, 0x00, 0xb3, 0x00, 0xb6, 0x00, 0xc3,
819aa2c232SShawn Guo 0x00, 0xce, 0x00, 0xe1, 0x00, 0xf3, 0x01, 0x11);
82*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb1,
839aa2c232SShawn Guo 0x01, 0x2e, 0x01, 0x5c, 0x01, 0x82, 0x01, 0xc3,
849aa2c232SShawn Guo 0x01, 0xfe, 0x02, 0x00, 0x02, 0x37, 0x02, 0x77);
85*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb2,
869aa2c232SShawn Guo 0x02, 0xa1, 0x02, 0xd7, 0x02, 0xfe, 0x03, 0x2c,
879aa2c232SShawn Guo 0x03, 0x4b, 0x03, 0x63, 0x03, 0x8f, 0x03, 0x90);
88*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb3, 0x03, 0x96, 0x03, 0x98);
89*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb4,
909aa2c232SShawn Guo 0x00, 0x81, 0x00, 0x8b, 0x00, 0x9c, 0x00, 0xa9,
919aa2c232SShawn Guo 0x00, 0xb5, 0x00, 0xcb, 0x00, 0xdf, 0x01, 0x02);
92*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb5,
939aa2c232SShawn Guo 0x01, 0x1f, 0x01, 0x51, 0x01, 0x7a, 0x01, 0xbf,
949aa2c232SShawn Guo 0x01, 0xfa, 0x01, 0xfc, 0x02, 0x34, 0x02, 0x76);
95*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb6,
969aa2c232SShawn Guo 0x02, 0x9f, 0x02, 0xd7, 0x02, 0xfc, 0x03, 0x2c,
979aa2c232SShawn Guo 0x03, 0x4a, 0x03, 0x63, 0x03, 0x8f, 0x03, 0xa2);
98*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb7, 0x03, 0xb8, 0x03, 0xba);
99*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb8,
1009aa2c232SShawn Guo 0x00, 0x01, 0x00, 0x02, 0x00, 0x0e, 0x00, 0x2a,
1019aa2c232SShawn Guo 0x00, 0x41, 0x00, 0x67, 0x00, 0x87, 0x00, 0xb9);
102*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb9,
1039aa2c232SShawn Guo 0x00, 0xe2, 0x01, 0x22, 0x01, 0x54, 0x01, 0xa3,
1049aa2c232SShawn Guo 0x01, 0xe6, 0x01, 0xe7, 0x02, 0x24, 0x02, 0x67);
105*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xba,
1069aa2c232SShawn Guo 0x02, 0x93, 0x02, 0xcd, 0x02, 0xf6, 0x03, 0x31,
1079aa2c232SShawn Guo 0x03, 0x6c, 0x03, 0xe9, 0x03, 0xef, 0x03, 0xf4);
108*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbb, 0x03, 0xf6, 0x03, 0xf7);
109*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x03);
110*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb0, 0x22, 0x00);
111*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb1, 0x22, 0x00);
112*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb2, 0x05, 0x00, 0x60, 0x00, 0x00);
113*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb3, 0x05, 0x00, 0x60, 0x00, 0x00);
114*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb4, 0x05, 0x00, 0x60, 0x00, 0x00);
115*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb5, 0x05, 0x00, 0x60, 0x00, 0x00);
116*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xba, 0x53, 0x00, 0x60, 0x00, 0x00);
117*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbb, 0x53, 0x00, 0x60, 0x00, 0x00);
118*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbc, 0x53, 0x00, 0x60, 0x00, 0x00);
119*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbd, 0x53, 0x00, 0x60, 0x00, 0x00);
120*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc0, 0x00, 0x34, 0x00, 0x00);
121*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc1, 0x00, 0x00, 0x34, 0x00);
122*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc2, 0x00, 0x00, 0x34, 0x00);
123*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc3, 0x00, 0x00, 0x34, 0x00);
124*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc4, 0x60);
125*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc5, 0xc0);
126*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc6, 0x00);
127*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc7, 0x00);
128*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x05);
129*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb0, 0x17, 0x06);
130*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb1, 0x17, 0x06);
131*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb2, 0x17, 0x06);
132*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb3, 0x17, 0x06);
133*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb4, 0x17, 0x06);
134*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb5, 0x17, 0x06);
135*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb6, 0x17, 0x06);
136*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb7, 0x17, 0x06);
137*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb8, 0x00);
138*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb9, 0x00, 0x03);
139*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xba, 0x00, 0x00);
140*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbb, 0x02, 0x03);
141*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbc, 0x02, 0x03);
142*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbd, 0x03, 0x03, 0x00, 0x03, 0x03);
143*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc0, 0x0b);
144*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc1, 0x09);
145*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc2, 0xa6);
146*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc3, 0x05);
147*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc4, 0x00);
148*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc5, 0x02);
149*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc6, 0x22);
150*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc7, 0x03);
151*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc8, 0x07, 0x20);
152*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc9, 0x03, 0x20);
153*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xca, 0x01, 0x60);
154*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xcb, 0x01, 0x60);
155*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xcc, 0x00, 0x00, 0x02);
156*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xcd, 0x00, 0x00, 0x02);
157*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xce, 0x00, 0x00, 0x02);
158*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xcf, 0x00, 0x00, 0x02);
159*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd1, 0x00, 0x05, 0x01, 0x07, 0x10);
160*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd2, 0x10, 0x05, 0x05, 0x03, 0x10);
161*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd3, 0x20, 0x00, 0x43, 0x07, 0x10);
162*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd4, 0x30, 0x00, 0x43, 0x07, 0x10);
163*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd0,
1649aa2c232SShawn Guo 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
165*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd5,
1669aa2c232SShawn Guo 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1679aa2c232SShawn Guo 0x00, 0x00, 0x00);
168*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd6,
1699aa2c232SShawn Guo 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1709aa2c232SShawn Guo 0x00, 0x00, 0x00);
171*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd7,
1729aa2c232SShawn Guo 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1739aa2c232SShawn Guo 0x00, 0x00, 0x00);
174*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00);
175*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xe5, 0x06);
176*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xe6, 0x06);
177*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xe7, 0x00);
178*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xe8, 0x06);
179*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xe9, 0x06);
180*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xea, 0x06);
181*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xeb, 0x00);
182*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xec, 0x00);
183*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xed, 0x30);
184*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x06);
185*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb0, 0x31, 0x31);
186*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb1, 0x31, 0x31);
187*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb2, 0x2d, 0x2e);
188*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb3, 0x31, 0x34);
189*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb4, 0x29, 0x2a);
190*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb5, 0x12, 0x10);
191*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb6, 0x18, 0x16);
192*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb7, 0x00, 0x02);
193*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb8, 0x08, 0x31);
194*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb9, 0x31, 0x31);
195*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xba, 0x31, 0x31);
196*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbb, 0x31, 0x08);
197*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbc, 0x03, 0x01);
198*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbd, 0x17, 0x19);
199*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbe, 0x11, 0x13);
200*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xbf, 0x2a, 0x29);
201*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc0, 0x34, 0x31);
202*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc1, 0x2e, 0x2d);
203*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc2, 0x31, 0x31);
204*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc3, 0x31, 0x31);
205*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc4, 0x31, 0x31);
206*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc5, 0x31, 0x31);
207*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc6, 0x2e, 0x2d);
208*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc7, 0x31, 0x34);
209*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc8, 0x29, 0x2a);
210*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xc9, 0x17, 0x19);
211*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xca, 0x11, 0x13);
212*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xcb, 0x03, 0x01);
213*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xcc, 0x08, 0x31);
214*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xcd, 0x31, 0x31);
215*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xce, 0x31, 0x31);
216*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xcf, 0x31, 0x08);
217*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd0, 0x00, 0x02);
218*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd1, 0x12, 0x10);
219*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd2, 0x18, 0x16);
220*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd3, 0x2a, 0x29);
221*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd4, 0x34, 0x31);
222*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd5, 0x2d, 0x2e);
223*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd6, 0x31, 0x31);
224*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd7, 0x31, 0x31);
225*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xe5, 0x31, 0x31);
226*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xe6, 0x31, 0x31);
227*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00);
228*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd9, 0x00, 0x00, 0x00, 0x00, 0x00);
229*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xe7, 0x00);
230*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0x6f, 0x02);
231*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf7, 0x47);
232*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0x6f, 0x0a);
233*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf7, 0x02);
234*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0x6f, 0x17);
235*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf4, 0x60);
236*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0x6f, 0x01);
237*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf9, 0x46);
238*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0x6f, 0x11);
239*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf3, 0x01);
240*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0x35, 0x00);
241*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
242*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xd9, 0x02, 0x03, 0x00);
243*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00);
244*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
245*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xb1, 0x6c, 0x21);
246*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00);
247*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0x35, 0x00);
2489aa2c232SShawn Guo
2499aa2c232SShawn Guo ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
2509aa2c232SShawn Guo if (ret < 0) {
2519aa2c232SShawn Guo dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
2529aa2c232SShawn Guo return ret;
2539aa2c232SShawn Guo }
2549aa2c232SShawn Guo msleep(120);
2559aa2c232SShawn Guo
2569aa2c232SShawn Guo ret = mipi_dsi_dcs_set_display_on(dsi);
2579aa2c232SShawn Guo if (ret < 0) {
2589aa2c232SShawn Guo dev_err(dev, "Failed to set display on: %d\n", ret);
2599aa2c232SShawn Guo return ret;
2609aa2c232SShawn Guo }
2619aa2c232SShawn Guo usleep_range(1000, 2000);
2629aa2c232SShawn Guo
263*7b00536aSJavier Martinez Canillas mipi_dsi_generic_write_seq(dsi, 0x53, 0x24);
2649aa2c232SShawn Guo
2659aa2c232SShawn Guo return 0;
2669aa2c232SShawn Guo }
2679aa2c232SShawn Guo
truly_nt35521_off(struct truly_nt35521 * ctx)2689aa2c232SShawn Guo static int truly_nt35521_off(struct truly_nt35521 *ctx)
2699aa2c232SShawn Guo {
2709aa2c232SShawn Guo struct mipi_dsi_device *dsi = ctx->dsi;
2719aa2c232SShawn Guo struct device *dev = &dsi->dev;
2729aa2c232SShawn Guo int ret;
2739aa2c232SShawn Guo
2749aa2c232SShawn Guo dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
2759aa2c232SShawn Guo
2769aa2c232SShawn Guo ret = mipi_dsi_dcs_set_display_off(dsi);
2779aa2c232SShawn Guo if (ret < 0) {
2789aa2c232SShawn Guo dev_err(dev, "Failed to set display off: %d\n", ret);
2799aa2c232SShawn Guo return ret;
2809aa2c232SShawn Guo }
2819aa2c232SShawn Guo msleep(50);
2829aa2c232SShawn Guo
2839aa2c232SShawn Guo ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
2849aa2c232SShawn Guo if (ret < 0) {
2859aa2c232SShawn Guo dev_err(dev, "Failed to enter sleep mode: %d\n", ret);
2869aa2c232SShawn Guo return ret;
2879aa2c232SShawn Guo }
2889aa2c232SShawn Guo msleep(150);
2899aa2c232SShawn Guo
2909aa2c232SShawn Guo return 0;
2919aa2c232SShawn Guo }
2929aa2c232SShawn Guo
truly_nt35521_prepare(struct drm_panel * panel)2939aa2c232SShawn Guo static int truly_nt35521_prepare(struct drm_panel *panel)
2949aa2c232SShawn Guo {
2959aa2c232SShawn Guo struct truly_nt35521 *ctx = to_truly_nt35521(panel);
2969aa2c232SShawn Guo struct device *dev = &ctx->dsi->dev;
2979aa2c232SShawn Guo int ret;
2989aa2c232SShawn Guo
2999aa2c232SShawn Guo if (ctx->prepared)
3009aa2c232SShawn Guo return 0;
3019aa2c232SShawn Guo
3029aa2c232SShawn Guo ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
3039aa2c232SShawn Guo if (ret < 0) {
3049aa2c232SShawn Guo dev_err(dev, "Failed to enable regulators: %d\n", ret);
3059aa2c232SShawn Guo return ret;
3069aa2c232SShawn Guo }
3079aa2c232SShawn Guo
3089aa2c232SShawn Guo truly_nt35521_reset(ctx);
3099aa2c232SShawn Guo
3109aa2c232SShawn Guo ret = truly_nt35521_on(ctx);
3119aa2c232SShawn Guo if (ret < 0) {
3129aa2c232SShawn Guo dev_err(dev, "Failed to initialize panel: %d\n", ret);
3139aa2c232SShawn Guo gpiod_set_value_cansleep(ctx->reset_gpio, 1);
3149aa2c232SShawn Guo return ret;
3159aa2c232SShawn Guo }
3169aa2c232SShawn Guo
3179aa2c232SShawn Guo ctx->prepared = true;
3189aa2c232SShawn Guo return 0;
3199aa2c232SShawn Guo }
3209aa2c232SShawn Guo
truly_nt35521_unprepare(struct drm_panel * panel)3219aa2c232SShawn Guo static int truly_nt35521_unprepare(struct drm_panel *panel)
3229aa2c232SShawn Guo {
3239aa2c232SShawn Guo struct truly_nt35521 *ctx = to_truly_nt35521(panel);
3249aa2c232SShawn Guo struct device *dev = &ctx->dsi->dev;
3259aa2c232SShawn Guo int ret;
3269aa2c232SShawn Guo
3279aa2c232SShawn Guo if (!ctx->prepared)
3289aa2c232SShawn Guo return 0;
3299aa2c232SShawn Guo
3309aa2c232SShawn Guo ret = truly_nt35521_off(ctx);
3319aa2c232SShawn Guo if (ret < 0)
3329aa2c232SShawn Guo dev_err(dev, "Failed to un-initialize panel: %d\n", ret);
3339aa2c232SShawn Guo
3349aa2c232SShawn Guo gpiod_set_value_cansleep(ctx->reset_gpio, 1);
3359aa2c232SShawn Guo regulator_bulk_disable(ARRAY_SIZE(ctx->supplies),
3369aa2c232SShawn Guo ctx->supplies);
3379aa2c232SShawn Guo
3389aa2c232SShawn Guo ctx->prepared = false;
3399aa2c232SShawn Guo return 0;
3409aa2c232SShawn Guo }
3419aa2c232SShawn Guo
truly_nt35521_enable(struct drm_panel * panel)3429aa2c232SShawn Guo static int truly_nt35521_enable(struct drm_panel *panel)
3439aa2c232SShawn Guo {
3449aa2c232SShawn Guo struct truly_nt35521 *ctx = to_truly_nt35521(panel);
3459aa2c232SShawn Guo
3469aa2c232SShawn Guo if (ctx->enabled)
3479aa2c232SShawn Guo return 0;
3489aa2c232SShawn Guo
3499aa2c232SShawn Guo gpiod_set_value_cansleep(ctx->blen_gpio, 1);
3509aa2c232SShawn Guo
3519aa2c232SShawn Guo ctx->enabled = true;
3529aa2c232SShawn Guo return 0;
3539aa2c232SShawn Guo }
3549aa2c232SShawn Guo
truly_nt35521_disable(struct drm_panel * panel)3559aa2c232SShawn Guo static int truly_nt35521_disable(struct drm_panel *panel)
3569aa2c232SShawn Guo {
3579aa2c232SShawn Guo struct truly_nt35521 *ctx = to_truly_nt35521(panel);
3589aa2c232SShawn Guo
3599aa2c232SShawn Guo if (!ctx->enabled)
3609aa2c232SShawn Guo return 0;
3619aa2c232SShawn Guo
3629aa2c232SShawn Guo gpiod_set_value_cansleep(ctx->blen_gpio, 0);
3639aa2c232SShawn Guo
3649aa2c232SShawn Guo ctx->enabled = false;
3659aa2c232SShawn Guo return 0;
3669aa2c232SShawn Guo }
3679aa2c232SShawn Guo
3689aa2c232SShawn Guo static const struct drm_display_mode truly_nt35521_mode = {
3699aa2c232SShawn Guo .clock = (720 + 232 + 20 + 112) * (1280 + 18 + 1 + 18) * 60 / 1000,
3709aa2c232SShawn Guo .hdisplay = 720,
3719aa2c232SShawn Guo .hsync_start = 720 + 232,
3729aa2c232SShawn Guo .hsync_end = 720 + 232 + 20,
3739aa2c232SShawn Guo .htotal = 720 + 232 + 20 + 112,
3749aa2c232SShawn Guo .vdisplay = 1280,
3759aa2c232SShawn Guo .vsync_start = 1280 + 18,
3769aa2c232SShawn Guo .vsync_end = 1280 + 18 + 1,
3779aa2c232SShawn Guo .vtotal = 1280 + 18 + 1 + 18,
3789aa2c232SShawn Guo .width_mm = 65,
3799aa2c232SShawn Guo .height_mm = 116,
3809aa2c232SShawn Guo };
3819aa2c232SShawn Guo
truly_nt35521_get_modes(struct drm_panel * panel,struct drm_connector * connector)3829aa2c232SShawn Guo static int truly_nt35521_get_modes(struct drm_panel *panel,
3839aa2c232SShawn Guo struct drm_connector *connector)
3849aa2c232SShawn Guo {
3859aa2c232SShawn Guo struct drm_display_mode *mode;
3869aa2c232SShawn Guo
3879aa2c232SShawn Guo mode = drm_mode_duplicate(connector->dev, &truly_nt35521_mode);
3889aa2c232SShawn Guo if (!mode)
3899aa2c232SShawn Guo return -ENOMEM;
3909aa2c232SShawn Guo
3919aa2c232SShawn Guo drm_mode_set_name(mode);
3929aa2c232SShawn Guo
3939aa2c232SShawn Guo mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
3949aa2c232SShawn Guo connector->display_info.width_mm = mode->width_mm;
3959aa2c232SShawn Guo connector->display_info.height_mm = mode->height_mm;
3969aa2c232SShawn Guo drm_mode_probed_add(connector, mode);
3979aa2c232SShawn Guo
3989aa2c232SShawn Guo return 1;
3999aa2c232SShawn Guo }
4009aa2c232SShawn Guo
4019aa2c232SShawn Guo static const struct drm_panel_funcs truly_nt35521_panel_funcs = {
4029aa2c232SShawn Guo .prepare = truly_nt35521_prepare,
4039aa2c232SShawn Guo .unprepare = truly_nt35521_unprepare,
4049aa2c232SShawn Guo .enable = truly_nt35521_enable,
4059aa2c232SShawn Guo .disable = truly_nt35521_disable,
4069aa2c232SShawn Guo .get_modes = truly_nt35521_get_modes,
4079aa2c232SShawn Guo };
4089aa2c232SShawn Guo
truly_nt35521_bl_update_status(struct backlight_device * bl)4099aa2c232SShawn Guo static int truly_nt35521_bl_update_status(struct backlight_device *bl)
4109aa2c232SShawn Guo {
4119aa2c232SShawn Guo struct mipi_dsi_device *dsi = bl_get_data(bl);
4129aa2c232SShawn Guo u16 brightness = backlight_get_brightness(bl);
4139aa2c232SShawn Guo int ret;
4149aa2c232SShawn Guo
4159aa2c232SShawn Guo ret = mipi_dsi_dcs_set_display_brightness(dsi, brightness);
4169aa2c232SShawn Guo if (ret < 0)
4179aa2c232SShawn Guo return ret;
4189aa2c232SShawn Guo
4199aa2c232SShawn Guo return 0;
4209aa2c232SShawn Guo }
4219aa2c232SShawn Guo
truly_nt35521_bl_get_brightness(struct backlight_device * bl)4229aa2c232SShawn Guo static int truly_nt35521_bl_get_brightness(struct backlight_device *bl)
4239aa2c232SShawn Guo {
4249aa2c232SShawn Guo struct mipi_dsi_device *dsi = bl_get_data(bl);
4259aa2c232SShawn Guo u16 brightness;
4269aa2c232SShawn Guo int ret;
4279aa2c232SShawn Guo
4289aa2c232SShawn Guo ret = mipi_dsi_dcs_get_display_brightness(dsi, &brightness);
4299aa2c232SShawn Guo if (ret < 0)
4309aa2c232SShawn Guo return ret;
4319aa2c232SShawn Guo
4329aa2c232SShawn Guo return brightness & 0xff;
4339aa2c232SShawn Guo }
4349aa2c232SShawn Guo
4359aa2c232SShawn Guo static const struct backlight_ops truly_nt35521_bl_ops = {
4369aa2c232SShawn Guo .update_status = truly_nt35521_bl_update_status,
4379aa2c232SShawn Guo .get_brightness = truly_nt35521_bl_get_brightness,
4389aa2c232SShawn Guo };
4399aa2c232SShawn Guo
4409aa2c232SShawn Guo static struct backlight_device *
truly_nt35521_create_backlight(struct mipi_dsi_device * dsi)4419aa2c232SShawn Guo truly_nt35521_create_backlight(struct mipi_dsi_device *dsi)
4429aa2c232SShawn Guo {
4439aa2c232SShawn Guo struct device *dev = &dsi->dev;
4449aa2c232SShawn Guo const struct backlight_properties props = {
4459aa2c232SShawn Guo .type = BACKLIGHT_RAW,
4469aa2c232SShawn Guo .brightness = 255,
4479aa2c232SShawn Guo .max_brightness = 255,
4489aa2c232SShawn Guo };
4499aa2c232SShawn Guo
4509aa2c232SShawn Guo return devm_backlight_device_register(dev, dev_name(dev), dev, dsi,
4519aa2c232SShawn Guo &truly_nt35521_bl_ops, &props);
4529aa2c232SShawn Guo }
4539aa2c232SShawn Guo
truly_nt35521_probe(struct mipi_dsi_device * dsi)4549aa2c232SShawn Guo static int truly_nt35521_probe(struct mipi_dsi_device *dsi)
4559aa2c232SShawn Guo {
4569aa2c232SShawn Guo struct device *dev = &dsi->dev;
4579aa2c232SShawn Guo struct truly_nt35521 *ctx;
4589aa2c232SShawn Guo int ret;
4599aa2c232SShawn Guo
4609aa2c232SShawn Guo ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
4619aa2c232SShawn Guo if (!ctx)
4629aa2c232SShawn Guo return -ENOMEM;
4639aa2c232SShawn Guo
4649aa2c232SShawn Guo ctx->supplies[0].supply = "positive5";
4659aa2c232SShawn Guo ctx->supplies[1].supply = "negative5";
4669aa2c232SShawn Guo ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
4679aa2c232SShawn Guo ctx->supplies);
4689aa2c232SShawn Guo if (ret < 0) {
4699aa2c232SShawn Guo dev_err(dev, "Failed to get regulators: %d\n", ret);
4709aa2c232SShawn Guo return ret;
4719aa2c232SShawn Guo }
4729aa2c232SShawn Guo
4739aa2c232SShawn Guo ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
4749aa2c232SShawn Guo if (IS_ERR(ctx->reset_gpio))
4759aa2c232SShawn Guo return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
4769aa2c232SShawn Guo "Failed to get reset-gpios\n");
4779aa2c232SShawn Guo
4789aa2c232SShawn Guo ctx->blen_gpio = devm_gpiod_get(dev, "backlight", GPIOD_OUT_LOW);
4799aa2c232SShawn Guo if (IS_ERR(ctx->blen_gpio))
4809aa2c232SShawn Guo return dev_err_probe(dev, PTR_ERR(ctx->blen_gpio),
4819aa2c232SShawn Guo "Failed to get backlight-gpios\n");
4829aa2c232SShawn Guo
4839aa2c232SShawn Guo ctx->dsi = dsi;
4849aa2c232SShawn Guo mipi_dsi_set_drvdata(dsi, ctx);
4859aa2c232SShawn Guo
4869aa2c232SShawn Guo dsi->lanes = 4;
4879aa2c232SShawn Guo dsi->format = MIPI_DSI_FMT_RGB888;
4889aa2c232SShawn Guo dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
4899aa2c232SShawn Guo MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_NO_EOT_PACKET |
4909aa2c232SShawn Guo MIPI_DSI_CLOCK_NON_CONTINUOUS;
4919aa2c232SShawn Guo
4929aa2c232SShawn Guo drm_panel_init(&ctx->panel, dev, &truly_nt35521_panel_funcs,
4939aa2c232SShawn Guo DRM_MODE_CONNECTOR_DSI);
4949aa2c232SShawn Guo
4959aa2c232SShawn Guo ctx->panel.backlight = truly_nt35521_create_backlight(dsi);
4969aa2c232SShawn Guo if (IS_ERR(ctx->panel.backlight))
4979aa2c232SShawn Guo return dev_err_probe(dev, PTR_ERR(ctx->panel.backlight),
4989aa2c232SShawn Guo "Failed to create backlight\n");
4999aa2c232SShawn Guo
5009aa2c232SShawn Guo drm_panel_add(&ctx->panel);
5019aa2c232SShawn Guo
5029aa2c232SShawn Guo ret = mipi_dsi_attach(dsi);
5039aa2c232SShawn Guo if (ret < 0) {
5049aa2c232SShawn Guo dev_err(dev, "Failed to attach to DSI host: %d\n", ret);
5059aa2c232SShawn Guo drm_panel_remove(&ctx->panel);
5069aa2c232SShawn Guo return ret;
5079aa2c232SShawn Guo }
5089aa2c232SShawn Guo
5099aa2c232SShawn Guo return 0;
5109aa2c232SShawn Guo }
5119aa2c232SShawn Guo
truly_nt35521_remove(struct mipi_dsi_device * dsi)51279abca2bSUwe Kleine-König static void truly_nt35521_remove(struct mipi_dsi_device *dsi)
5139aa2c232SShawn Guo {
5149aa2c232SShawn Guo struct truly_nt35521 *ctx = mipi_dsi_get_drvdata(dsi);
5159aa2c232SShawn Guo int ret;
5169aa2c232SShawn Guo
5179aa2c232SShawn Guo ret = mipi_dsi_detach(dsi);
5189aa2c232SShawn Guo if (ret < 0)
5199aa2c232SShawn Guo dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
5209aa2c232SShawn Guo
5219aa2c232SShawn Guo drm_panel_remove(&ctx->panel);
5229aa2c232SShawn Guo }
5239aa2c232SShawn Guo
5249aa2c232SShawn Guo static const struct of_device_id truly_nt35521_of_match[] = {
5259aa2c232SShawn Guo { .compatible = "sony,tulip-truly-nt35521" },
5269aa2c232SShawn Guo { /* sentinel */ }
5279aa2c232SShawn Guo };
5289aa2c232SShawn Guo MODULE_DEVICE_TABLE(of, truly_nt35521_of_match);
5299aa2c232SShawn Guo
5309aa2c232SShawn Guo static struct mipi_dsi_driver truly_nt35521_driver = {
5319aa2c232SShawn Guo .probe = truly_nt35521_probe,
5329aa2c232SShawn Guo .remove = truly_nt35521_remove,
5339aa2c232SShawn Guo .driver = {
5349aa2c232SShawn Guo .name = "panel-truly-nt35521",
5359aa2c232SShawn Guo .of_match_table = truly_nt35521_of_match,
5369aa2c232SShawn Guo },
5379aa2c232SShawn Guo };
5389aa2c232SShawn Guo module_mipi_dsi_driver(truly_nt35521_driver);
5399aa2c232SShawn Guo
5409aa2c232SShawn Guo MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
5419aa2c232SShawn Guo MODULE_DESCRIPTION("DRM driver for Sony Tulip Truly NT35521 panel");
5429aa2c232SShawn Guo MODULE_LICENSE("GPL v2");
543