10993234aSJianhua Lu // SPDX-License-Identifier: GPL-2.0-only
20993234aSJianhua Lu /*
30993234aSJianhua Lu * Novatek NT36523 DriverIC panels driver
40993234aSJianhua Lu *
50993234aSJianhua Lu * Copyright (c) 2022, 2023 Jianhua Lu <lujianhua000@gmail.com>
60993234aSJianhua Lu */
70993234aSJianhua Lu
8aecb583cSKonrad Dybcio #include <linux/backlight.h>
90993234aSJianhua Lu #include <linux/delay.h>
100993234aSJianhua Lu #include <linux/gpio/consumer.h>
110993234aSJianhua Lu #include <linux/module.h>
12722d4f06SRob Herring #include <linux/of.h>
130993234aSJianhua Lu #include <linux/of_graph.h>
140993234aSJianhua Lu #include <linux/regulator/consumer.h>
150993234aSJianhua Lu
164f048de2SKonrad Dybcio #include <video/mipi_display.h>
174f048de2SKonrad Dybcio
180993234aSJianhua Lu #include <drm/drm_connector.h>
190993234aSJianhua Lu #include <drm/drm_crtc.h>
200993234aSJianhua Lu #include <drm/drm_mipi_dsi.h>
210993234aSJianhua Lu #include <drm/drm_modes.h>
220993234aSJianhua Lu #include <drm/drm_panel.h>
230993234aSJianhua Lu
240993234aSJianhua Lu #define DSI_NUM_MIN 1
250993234aSJianhua Lu
260993234aSJianhua Lu #define mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, cmd, seq...) \
270993234aSJianhua Lu do { \
280993234aSJianhua Lu mipi_dsi_dcs_write_seq(dsi0, cmd, seq); \
290993234aSJianhua Lu mipi_dsi_dcs_write_seq(dsi1, cmd, seq); \
300993234aSJianhua Lu } while (0)
310993234aSJianhua Lu
320993234aSJianhua Lu struct panel_info {
330993234aSJianhua Lu struct drm_panel panel;
340993234aSJianhua Lu struct mipi_dsi_device *dsi[2];
350993234aSJianhua Lu const struct panel_desc *desc;
361eae88faSKonrad Dybcio enum drm_panel_orientation orientation;
370993234aSJianhua Lu
380993234aSJianhua Lu struct gpio_desc *reset_gpio;
390993234aSJianhua Lu struct backlight_device *backlight;
400993234aSJianhua Lu struct regulator *vddio;
410993234aSJianhua Lu
420993234aSJianhua Lu bool prepared;
430993234aSJianhua Lu };
440993234aSJianhua Lu
450993234aSJianhua Lu struct panel_desc {
460993234aSJianhua Lu unsigned int width_mm;
470993234aSJianhua Lu unsigned int height_mm;
480993234aSJianhua Lu
490993234aSJianhua Lu unsigned int bpc;
500993234aSJianhua Lu unsigned int lanes;
510993234aSJianhua Lu unsigned long mode_flags;
520993234aSJianhua Lu enum mipi_dsi_pixel_format format;
530993234aSJianhua Lu
540993234aSJianhua Lu const struct drm_display_mode *modes;
550993234aSJianhua Lu unsigned int num_modes;
560993234aSJianhua Lu const struct mipi_dsi_device_info dsi_info;
570993234aSJianhua Lu int (*init_sequence)(struct panel_info *pinfo);
580993234aSJianhua Lu
590993234aSJianhua Lu bool is_dual_dsi;
60aecb583cSKonrad Dybcio bool has_dcs_backlight;
610993234aSJianhua Lu };
620993234aSJianhua Lu
to_panel_info(struct drm_panel * panel)630993234aSJianhua Lu static inline struct panel_info *to_panel_info(struct drm_panel *panel)
640993234aSJianhua Lu {
650993234aSJianhua Lu return container_of(panel, struct panel_info, panel);
660993234aSJianhua Lu }
670993234aSJianhua Lu
elish_boe_init_sequence(struct panel_info * pinfo)680993234aSJianhua Lu static int elish_boe_init_sequence(struct panel_info *pinfo)
690993234aSJianhua Lu {
700993234aSJianhua Lu struct mipi_dsi_device *dsi0 = pinfo->dsi[0];
710993234aSJianhua Lu struct mipi_dsi_device *dsi1 = pinfo->dsi[1];
720993234aSJianhua Lu /* No datasheet, so write magic init sequence directly */
730993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
740993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
750993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x05);
760993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20);
770993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
780993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x18, 0x40);
790993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
800993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
810993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x02);
820993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x23);
830993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
840993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x80);
850993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0x84);
860993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x05, 0x2d);
870993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x06, 0x00);
880993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x07, 0x00);
890993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x08, 0x01);
900993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0x45);
910993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11, 0x02);
920993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x12, 0x80);
930993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x15, 0x83);
940993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x16, 0x0c);
950993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29, 0x0a);
960993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0xff);
970993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x31, 0xfe);
980993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x32, 0xfd);
990993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x33, 0xfb);
1000993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x34, 0xf8);
1010993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0xf5);
1020993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x36, 0xf3);
1030993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x37, 0xf2);
1040993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x38, 0xf2);
1050993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0xf2);
1060993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0xef);
1070993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0xec);
1080993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3d, 0xe9);
1090993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3f, 0xe5);
1100993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x40, 0xe5);
1110993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x41, 0xe5);
1120993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x13);
1130993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x45, 0xff);
1140993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x46, 0xf4);
1150993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x47, 0xe7);
1160993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x48, 0xda);
1170993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x49, 0xcd);
1180993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4a, 0xc0);
1190993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4b, 0xb3);
1200993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4c, 0xb2);
1210993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4d, 0xb2);
1220993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4e, 0xb2);
1230993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x99);
1240993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x50, 0x80);
1250993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x68);
1260993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x52, 0x66);
1270993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x66);
1280993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x54, 0x66);
1290993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0x0e);
1300993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x58, 0xff);
1310993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x59, 0xfb);
1320993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5a, 0xf7);
1330993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5b, 0xf3);
1340993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5c, 0xef);
1350993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5d, 0xe3);
1360993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5e, 0xda);
1370993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5f, 0xd8);
1380993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x60, 0xd8);
1390993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x61, 0xd8);
1400993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x62, 0xcb);
1410993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x63, 0xbf);
1420993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x64, 0xb3);
1430993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x65, 0xb2);
1440993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x66, 0xb2);
1450993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x67, 0xb2);
1460993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a);
1470993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
1480993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x25, 0x47);
1490993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0x47);
1500993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0x47);
1510993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26);
1520993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
1530993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x10);
1540993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1a, 0xe0);
1550993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x10);
1560993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x00);
1570993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x10);
1580993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0xe0);
1590993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
1600993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
1610993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0);
1620993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
1630993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x84, 0x08);
1640993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x85, 0x0c);
1650993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20);
1660993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
1670993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x00);
1680993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25);
1690993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
1700993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x91, 0x1f);
1710993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x92, 0x0f);
1720993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x93, 0x01);
1730993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x94, 0x18);
1740993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x95, 0x03);
1750993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x96, 0x01);
1760993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
1770993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb0, 0x01);
1780993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25);
1790993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
1800993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x1f);
1810993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x1b);
1820993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x24);
1830993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
1840993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x28);
1850993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x27);
1860993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
1870993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x31);
1880993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd1, 0x20);
1890993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd2, 0x30);
1900993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x08);
1910993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xde, 0x80);
1920993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdf, 0x02);
1930993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26);
1940993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
1950993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x81);
1960993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0xb0);
1970993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x22);
1980993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
1990993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9f, 0x50);
2000993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x6f, 0x01);
2010993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x70, 0x11);
2020993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x73, 0x01);
2030993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x74, 0x49);
2040993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x76, 0x01);
2050993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x77, 0x49);
2060993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa0, 0x3f);
2070993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa9, 0x50);
2080993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xaa, 0x28);
2090993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xab, 0x28);
2100993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xad, 0x10);
2110993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x00);
2120993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x49);
2130993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xba, 0x49);
2140993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x49);
2150993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbe, 0x04);
2160993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbf, 0x49);
2170993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc0, 0x04);
2180993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc1, 0x59);
2190993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc2, 0x00);
2200993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc5, 0x00);
2210993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc6, 0x01);
2220993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc7, 0x48);
2230993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xca, 0x43);
2240993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcb, 0x3c);
2250993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xce, 0x00);
2260993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcf, 0x43);
2270993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x3c);
2280993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd3, 0x43);
2290993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x3c);
2300993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd7, 0x00);
2310993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdc, 0x43);
2320993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdd, 0x3c);
2330993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xe1, 0x43);
2340993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xe2, 0x3c);
2350993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xf2, 0x00);
2360993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xf3, 0x01);
2370993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xf4, 0x48);
2380993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25);
2390993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
2400993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x13, 0x01);
2410993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x14, 0x23);
2420993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbc, 0x01);
2430993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbd, 0x23);
2440993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a);
2450993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
2460993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x97, 0x3c);
2470993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x98, 0x02);
2480993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x99, 0x95);
2490993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9a, 0x03);
2500993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9b, 0x00);
2510993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9c, 0x0b);
2520993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9d, 0x0a);
2530993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9e, 0x90);
2540993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x22);
2550993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
2560993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9f, 0x50);
2570993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x23);
2580993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
2590993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa3, 0x50);
2600993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xe0);
2610993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
2620993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x14, 0x60);
2630993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x16, 0xc0);
2640993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x02);
2650993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0);
2660993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
2670993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0x08);
2680993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xd0);
2690993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
2700993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x02, 0xaf);
2710993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0xee);
2720993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x99);
2730993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1d, 0x09);
2740993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
2750993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
2760993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x0f, 0xff);
2770993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x2c);
2780993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0x00);
2790993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x13);
2800993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0x03, 0xac, 0x1a, 0x04, 0x04);
2810993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11);
2820993234aSJianhua Lu msleep(70);
2830993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29);
2840993234aSJianhua Lu
2850993234aSJianhua Lu return 0;
2860993234aSJianhua Lu }
2870993234aSJianhua Lu
elish_csot_init_sequence(struct panel_info * pinfo)2880993234aSJianhua Lu static int elish_csot_init_sequence(struct panel_info *pinfo)
2890993234aSJianhua Lu {
2900993234aSJianhua Lu struct mipi_dsi_device *dsi0 = pinfo->dsi[0];
2910993234aSJianhua Lu struct mipi_dsi_device *dsi1 = pinfo->dsi[1];
2920993234aSJianhua Lu /* No datasheet, so write magic init sequence directly */
2930993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
2940993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
2950993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x05);
2960993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20);
2970993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
2980993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x18, 0x40);
2990993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
3000993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
3010993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x02);
3020993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xd0);
3030993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
3040993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x02, 0xaf);
3050993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x30);
3060993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0xee);
3070993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x99);
3080993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1d, 0x09);
3090993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0);
3100993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
3110993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0x08);
3120993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xe0);
3130993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
3140993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x02);
3150993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20);
3160993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
3170993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x58, 0x40);
3180993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
3190993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
3200993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0x00);
3210993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x23);
3220993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
3230993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x80);
3240993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0x84);
3250993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x05, 0x2d);
3260993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x06, 0x00);
3270993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x07, 0x00);
3280993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x08, 0x01);
3290993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0x45);
3300993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11, 0x02);
3310993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x12, 0x80);
3320993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x15, 0x83);
3330993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x16, 0x0c);
3340993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29, 0x0a);
3350993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0xff);
3360993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x31, 0xfe);
3370993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x32, 0xfd);
3380993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x33, 0xfb);
3390993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x34, 0xf8);
3400993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0xf5);
3410993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x36, 0xf3);
3420993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x37, 0xf2);
3430993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x38, 0xf2);
3440993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0xf2);
3450993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0xef);
3460993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0xec);
3470993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3d, 0xe9);
3480993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3f, 0xe5);
3490993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x40, 0xe5);
3500993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x41, 0xe5);
3510993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x13);
3520993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x45, 0xff);
3530993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x46, 0xf4);
3540993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x47, 0xe7);
3550993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x48, 0xda);
3560993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x49, 0xcd);
3570993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4a, 0xc0);
3580993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4b, 0xb3);
3590993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4c, 0xb2);
3600993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4d, 0xb2);
3610993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4e, 0xb2);
3620993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x99);
3630993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x50, 0x80);
3640993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x68);
3650993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x52, 0x66);
3660993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x66);
3670993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x54, 0x66);
3680993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0x0e);
3690993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x58, 0xff);
3700993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x59, 0xfb);
3710993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5a, 0xf7);
3720993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5b, 0xf3);
3730993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5c, 0xef);
3740993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5d, 0xe3);
3750993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5e, 0xda);
3760993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5f, 0xd8);
3770993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x60, 0xd8);
3780993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x61, 0xd8);
3790993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x62, 0xcb);
3800993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x63, 0xbf);
3810993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x64, 0xb3);
3820993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x65, 0xb2);
3830993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x66, 0xb2);
3840993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x67, 0xb2);
3850993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
3860993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
3870993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x0f, 0xff);
3880993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x2c);
3890993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x55, 0x00);
3900993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x13);
3910993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0x03, 0xac, 0x1a, 0x04, 0x04);
3920993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a);
3930993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
3940993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x25, 0x46);
3950993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0x46);
3960993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0x46);
3970993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26);
3980993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
3990993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0xb0);
4000993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x10);
4010993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1a, 0xe0);
4020993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x10);
4030993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x00);
4040993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x10);
4050993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0xe0);
4060993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0);
4070993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
4080993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x84, 0x08);
4090993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x85, 0x0c);
4100993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20);
4110993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
4120993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x00);
4130993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25);
4140993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
4150993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x91, 0x1f);
4160993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x92, 0x0f);
4170993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x93, 0x01);
4180993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x94, 0x18);
4190993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x95, 0x03);
4200993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x96, 0x01);
4210993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
4220993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb0, 0x01);
4230993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25);
4240993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
4250993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x1f);
4260993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x1b);
4270993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x24);
4280993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
4290993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x28);
4300993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x27);
4310993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
4320993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x31);
4330993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd1, 0x20);
4340993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x08);
4350993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xde, 0x80);
4360993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdf, 0x02);
4370993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26);
4380993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
4390993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x81);
4400993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0xb0);
4410993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x22);
4420993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
4430993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x6f, 0x01);
4440993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x70, 0x11);
4450993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x73, 0x01);
4460993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x74, 0x4d);
4470993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa0, 0x3f);
4480993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa9, 0x50);
4490993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xaa, 0x28);
4500993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xab, 0x28);
4510993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xad, 0x10);
4520993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x00);
4530993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x4b);
4540993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xba, 0x96);
4550993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x4b);
4560993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbe, 0x07);
4570993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbf, 0x4b);
4580993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc0, 0x07);
4590993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc1, 0x5c);
4600993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc2, 0x00);
4610993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc5, 0x00);
4620993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc6, 0x3f);
4630993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc7, 0x00);
4640993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xca, 0x08);
4650993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcb, 0x40);
4660993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xce, 0x00);
4670993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcf, 0x08);
4680993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x40);
4690993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd3, 0x08);
4700993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x40);
4710993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25);
4720993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
4730993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbc, 0x01);
4740993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbd, 0x1c);
4750993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a);
4760993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01);
4770993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9a, 0x03);
4780993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10);
4790993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11);
4800993234aSJianhua Lu msleep(70);
4810993234aSJianhua Lu mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29);
4820993234aSJianhua Lu
4830993234aSJianhua Lu return 0;
4840993234aSJianhua Lu }
4850993234aSJianhua Lu
j606f_boe_init_sequence(struct panel_info * pinfo)4864f048de2SKonrad Dybcio static int j606f_boe_init_sequence(struct panel_info *pinfo)
4874f048de2SKonrad Dybcio {
4884f048de2SKonrad Dybcio struct mipi_dsi_device *dsi = pinfo->dsi[0];
4894f048de2SKonrad Dybcio struct device *dev = &dsi->dev;
4904f048de2SKonrad Dybcio int ret;
4914f048de2SKonrad Dybcio
4924f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x20);
4934f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
4944f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x05, 0xd9);
4954f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x07, 0x78);
4964f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x08, 0x5a);
4974f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0d, 0x63);
4984f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0e, 0x91);
4994f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0f, 0x73);
5004f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x95, 0xeb);
5014f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x96, 0xeb);
5024f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0x11);
5034f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x6d, 0x66);
5044f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x75, 0xa2);
5054f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x77, 0xb3);
5064f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 0x00,
5074f048de2SKonrad Dybcio 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9);
5084f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb1, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 0x01,
5094f048de2SKonrad Dybcio 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31);
5104f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 0x03,
5114f048de2SKonrad Dybcio 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b);
5124f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 0x03,
5134f048de2SKonrad Dybcio 0xfd, 0x03, 0xff);
5144f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 0x00,
5154f048de2SKonrad Dybcio 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9);
5164f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 0x01,
5174f048de2SKonrad Dybcio 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31);
5184f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 0x03,
5194f048de2SKonrad Dybcio 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b);
5204f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 0x03,
5214f048de2SKonrad Dybcio 0xfd, 0x03, 0xff);
5224f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 0x00,
5234f048de2SKonrad Dybcio 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9);
5244f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 0x01,
5254f048de2SKonrad Dybcio 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31);
5264f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xba, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 0x03,
5274f048de2SKonrad Dybcio 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b);
5284f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 0x03,
5294f048de2SKonrad Dybcio 0xfd, 0x03, 0xff);
5304f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x21);
5314f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
5324f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 0x00,
5334f048de2SKonrad Dybcio 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1);
5344f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb1, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 0x01,
5354f048de2SKonrad Dybcio 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29);
5364f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 0x03,
5374f048de2SKonrad Dybcio 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73);
5384f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 0x03,
5394f048de2SKonrad Dybcio 0xf5, 0x03, 0xf7);
5404f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 0x00,
5414f048de2SKonrad Dybcio 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1);
5424f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 0x01,
5434f048de2SKonrad Dybcio 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29);
5444f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 0x03,
5454f048de2SKonrad Dybcio 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73);
5464f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 0x03,
5474f048de2SKonrad Dybcio 0xf5, 0x03, 0xf7);
5484f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 0x00,
5494f048de2SKonrad Dybcio 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1);
5504f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 0x01,
5514f048de2SKonrad Dybcio 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29);
5524f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xba, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 0x03,
5534f048de2SKonrad Dybcio 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73);
5544f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 0x03,
5554f048de2SKonrad Dybcio 0xf5, 0x03, 0xf7);
5564f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x23);
5574f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
5584f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x00, 0x80);
5594f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00);
5604f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x11, 0x01);
5614f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x12, 0x77);
5624f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x15, 0x07);
5634f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x16, 0x07);
5644f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x24);
5654f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
5664f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x00, 0x00);
5674f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00);
5684f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x02, 0x1c);
5694f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x03, 0x1c);
5704f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x04, 0x1d);
5714f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x05, 0x1d);
5724f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04);
5734f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x07, 0x04);
5744f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0f);
5754f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x09, 0x0f);
5764f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0a, 0x0e);
5774f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0b, 0x0e);
5784f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0c, 0x0d);
5794f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0d, 0x0d);
5804f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0e, 0x0c);
5814f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0f, 0x0c);
5824f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x10, 0x08);
5834f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08);
5844f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x12, 0x00);
5854f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x13, 0x00);
5864f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x14, 0x00);
5874f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x15, 0x00);
5884f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x16, 0x00);
5894f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x17, 0x00);
5904f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x18, 0x1c);
5914f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x19, 0x1c);
5924f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1a, 0x1d);
5934f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1b, 0x1d);
5944f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1c, 0x04);
5954f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1d, 0x04);
5964f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1e, 0x0f);
5974f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1f, 0x0f);
5984f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x20, 0x0e);
5994f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x21, 0x0e);
6004f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x22, 0x0d);
6014f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x23, 0x0d);
6024f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x24, 0x0c);
6034f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x25, 0x0c);
6044f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0x08);
6054f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x27, 0x08);
6064f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x28, 0x00);
6074f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x29, 0x00);
6084f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x00);
6094f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x00);
6104f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_LUT, 0x20);
6114f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x2f, 0x0a);
6124f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0x44);
6134f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x33, 0x0c);
6144f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x34, 0x32);
6154f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x37, 0x44);
6164f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x38, 0x40);
6174f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x39, 0x00);
6184f048de2SKonrad Dybcio
6194f048de2SKonrad Dybcio ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x9a);
6204f048de2SKonrad Dybcio if (ret < 0) {
6214f048de2SKonrad Dybcio dev_err(dev, "Failed to set pixel format: %d\n", ret);
6224f048de2SKonrad Dybcio return ret;
6234f048de2SKonrad Dybcio }
6244f048de2SKonrad Dybcio
6254f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x3b, 0xa0);
6264f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x42);
6274f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x3f, 0x06);
6284f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x43, 0x06);
6294f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x47, 0x66);
6304f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x4a, 0x9a);
6314f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x4b, 0xa0);
6324f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x4c, 0x91);
6334f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x4d, 0x21);
6344f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x4e, 0x43);
6354f048de2SKonrad Dybcio
6364f048de2SKonrad Dybcio ret = mipi_dsi_dcs_set_display_brightness(dsi, 18);
6374f048de2SKonrad Dybcio if (ret < 0) {
6384f048de2SKonrad Dybcio dev_err(dev, "Failed to set display brightness: %d\n", ret);
6394f048de2SKonrad Dybcio return ret;
6404f048de2SKonrad Dybcio }
6414f048de2SKonrad Dybcio
6424f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x52, 0x34);
6434f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x55, 0x82, 0x02);
6444f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x56, 0x04);
6454f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x58, 0x21);
6464f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x59, 0x30);
6474f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5a, 0xba);
6484f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5b, 0xa0);
6494f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00, 0x06);
6504f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5f, 0x00);
6514f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x65, 0x82);
6524f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x7e, 0x20);
6534f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x7f, 0x3c);
6544f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x82, 0x04);
6554f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x97, 0xc0);
6564f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb6,
6574f048de2SKonrad Dybcio 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05,
6584f048de2SKonrad Dybcio 0x05, 0x00, 0x00);
6594f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x92, 0xc4);
6604f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x93, 0x1a);
6614f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x94, 0x5f);
6624f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xd7, 0x55);
6634f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xda, 0x0a);
6644f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xde, 0x08);
6654f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xdb, 0x05);
6664f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xdc, 0xc4);
6674f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xdd, 0x22);
6684f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x05);
6694f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe0, 0xc4);
6704f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe1, 0x05);
6714f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe2, 0xc4);
6724f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe3, 0x05);
6734f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe4, 0xc4);
6744f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe5, 0x05);
6754f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe6, 0xc4);
6764f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x88);
6774f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x08);
6784f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x8d, 0x88);
6794f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x8e, 0x08);
6804f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x90);
6814f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x25);
6824f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
6834f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x05, 0x00);
6844f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x19, 0x07);
6854f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1f, 0xba);
6864f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x20, 0xa0);
6874f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0xba);
6884f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x27, 0xa0);
6894f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x33, 0xba);
6904f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x34, 0xa0);
6914f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x3f, 0xe0);
6924f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_VSYNC_TIMING, 0x00);
6934f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x44, 0x00);
6944f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_GET_SCANLINE, 0x40);
6954f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x48, 0xba);
6964f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x49, 0xa0);
6974f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x00);
6984f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x00);
6994f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x00);
7004f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0xd0);
7014f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x61, 0xba);
7024f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x62, 0xa0);
7034f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xf1, 0x10);
7044f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x2a);
7054f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
7064f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x64, 0x16);
7074f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x67, 0x16);
7084f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x6a, 0x16);
7094f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x70, 0x30);
7104f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_READ_PPS_START, 0xf3);
7114f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xa3, 0xff);
7124f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xa4, 0xff);
7134f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xa5, 0xff);
7144f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xd6, 0x08);
7154f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x26);
7164f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
7174f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x00, 0xa1);
7184f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0a, 0xf2);
7194f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x04, 0x28);
7204f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x06, 0x30);
7214f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0c, 0x13);
7224f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0d, 0x0a);
7234f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x0f, 0x0a);
7244f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x11, 0x00);
7254f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x12, 0x50);
7264f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x13, 0x51);
7274f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x14, 0x65);
7284f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x15, 0x00);
7294f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x16, 0x10);
7304f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x17, 0xa0);
7314f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x18, 0x86);
7324f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x19, 0x11);
7334f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1a, 0x7b);
7344f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1b, 0x10);
7354f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1c, 0xbb);
7364f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x22, 0x00);
7374f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x23, 0x00);
7384f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x11);
7394f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x7b);
7404f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1d, 0x00);
7414f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1e, 0xc3);
7424f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1f, 0xc3);
7434f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
7444f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x25, 0xc3);
7454f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x2f, 0x05);
7464f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0xc3);
7474f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x00);
7484f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x32, 0xc3);
7494f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x39, 0x00);
7504f048de2SKonrad Dybcio
7514f048de2SKonrad Dybcio ret = mipi_dsi_dcs_set_pixel_format(dsi, 0xc3);
7524f048de2SKonrad Dybcio if (ret < 0) {
7534f048de2SKonrad Dybcio dev_err(dev, "Failed to set pixel format: %d\n", ret);
7544f048de2SKonrad Dybcio return ret;
7554f048de2SKonrad Dybcio }
7564f048de2SKonrad Dybcio
7574f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01);
7584f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x33, 0x11);
7594f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x34, 0x78);
7604f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x35, 0x16);
7614f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xc8, 0x04);
7624f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xc9, 0x82);
7634f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xca, 0x4e);
7644f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xcb, 0x00);
7654f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_READ_PPS_CONTINUE, 0x4c);
7664f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xaa, 0x47);
7674f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x27);
7684f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
7694f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x56, 0x06);
7704f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x58, 0x80);
7714f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x59, 0x53);
7724f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5a, 0x00);
7734f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x14);
7744f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x00);
7754f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x01);
7764f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x20);
7774f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5f, 0x10);
7784f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00);
7794f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x61, 0x1d);
7804f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x62, 0x00);
7814f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x63, 0x01);
7824f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x64, 0x24);
7834f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x65, 0x1c);
7844f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x66, 0x00);
7854f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x67, 0x01);
7864f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x68, 0x25);
7874f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x00, 0x00);
7884f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x78, 0x00);
7894f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xc3, 0x00);
7904f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xd1, 0x24);
7914f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xd2, 0x30);
7924f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x2a);
7934f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
7944f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x22, 0x2f);
7954f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x23, 0x08);
7964f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00);
7974f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x25, 0xc3);
7984f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0xf8);
7994f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00);
8004f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x28, 0x1a);
8014f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x29, 0x00);
8024f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x1a);
8034f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x00);
8044f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_LUT, 0x1a);
8054f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0xe0);
8064f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
8074f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x14, 0x60);
8084f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x16, 0xc0);
8094f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0xf0);
8104f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
8114f048de2SKonrad Dybcio
8124f048de2SKonrad Dybcio ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x08);
8134f048de2SKonrad Dybcio if (ret < 0) {
8144f048de2SKonrad Dybcio dev_err(dev, "Failed to set pixel format: %d\n", ret);
8154f048de2SKonrad Dybcio return ret;
8164f048de2SKonrad Dybcio }
8174f048de2SKonrad Dybcio
8184f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x24);
8194f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
8204f048de2SKonrad Dybcio
8214f048de2SKonrad Dybcio ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x5d);
8224f048de2SKonrad Dybcio if (ret < 0) {
8234f048de2SKonrad Dybcio dev_err(dev, "Failed to set pixel format: %d\n", ret);
8244f048de2SKonrad Dybcio return ret;
8254f048de2SKonrad Dybcio }
8264f048de2SKonrad Dybcio
8274f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x3b, 0x60);
8284f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x4a, 0x5d);
8294f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x4b, 0x60);
8304f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5a, 0x70);
8314f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x60);
8324f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x91, 0x44);
8334f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x92, 0x75);
8344f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xdb, 0x05);
8354f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xdc, 0x75);
8364f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xdd, 0x22);
8374f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x05);
8384f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe0, 0x75);
8394f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe1, 0x05);
8404f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe2, 0x75);
8414f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe3, 0x05);
8424f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe4, 0x75);
8434f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe5, 0x05);
8444f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xe6, 0x75);
8454f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x00);
8464f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x00);
8474f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x8d, 0x00);
8484f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x8e, 0x00);
8494f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x25);
8504f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
8514f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1f, 0x70);
8524f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x20, 0x60);
8534f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0x70);
8544f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x27, 0x60);
8554f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x33, 0x70);
8564f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x34, 0x60);
8574f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x48, 0x70);
8584f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x49, 0x60);
8594f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x00);
8604f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x61, 0x70);
8614f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x62, 0x60);
8624f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x26);
8634f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
8644f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x02, 0x31);
8654f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0a);
8664f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1a, 0x7f);
8674f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1b, 0x0a);
8684f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1c, 0x0c);
8694f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x0a);
8704f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x7f);
8714f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1e, 0x75);
8724f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x1f, 0x75);
8734f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x25, 0x75);
8744f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0x75);
8754f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x05);
8764f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x32, 0x8d);
8774f048de2SKonrad Dybcio
8784f048de2SKonrad Dybcio ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x75);
8794f048de2SKonrad Dybcio if (ret < 0) {
8804f048de2SKonrad Dybcio dev_err(dev, "Failed to set pixel format: %d\n", ret);
8814f048de2SKonrad Dybcio return ret;
8824f048de2SKonrad Dybcio }
8834f048de2SKonrad Dybcio
8844f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x2a);
8854f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
8864f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x25, 0x75);
8874f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x10);
8884f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
8894f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x01);
8904f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x20);
8914f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
8924f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x18, 0x40);
8934f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x10);
8944f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
8954f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x02);
8964f048de2SKonrad Dybcio
8974f048de2SKonrad Dybcio ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
8984f048de2SKonrad Dybcio if (ret < 0) {
8994f048de2SKonrad Dybcio dev_err(dev, "Failed to set tear on: %d\n", ret);
9004f048de2SKonrad Dybcio return ret;
9014f048de2SKonrad Dybcio }
9024f048de2SKonrad Dybcio
9034f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x13);
9044f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x3b, 0x03, 0x5f, 0x1a, 0x04, 0x04);
9054f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xff, 0x10);
9064f048de2SKonrad Dybcio usleep_range(10000, 11000);
9074f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01);
9084f048de2SKonrad Dybcio
9094f048de2SKonrad Dybcio ret = mipi_dsi_dcs_set_display_brightness(dsi, 0);
9104f048de2SKonrad Dybcio if (ret < 0) {
9114f048de2SKonrad Dybcio dev_err(dev, "Failed to set display brightness: %d\n", ret);
9124f048de2SKonrad Dybcio return ret;
9134f048de2SKonrad Dybcio }
9144f048de2SKonrad Dybcio
9154f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2c);
9164f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
9174f048de2SKonrad Dybcio mipi_dsi_dcs_write_seq(dsi, 0x68, 0x05, 0x01);
9184f048de2SKonrad Dybcio
9194f048de2SKonrad Dybcio ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
9204f048de2SKonrad Dybcio if (ret < 0) {
9214f048de2SKonrad Dybcio dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
9224f048de2SKonrad Dybcio return ret;
9234f048de2SKonrad Dybcio }
9244f048de2SKonrad Dybcio msleep(100);
9254f048de2SKonrad Dybcio
9264f048de2SKonrad Dybcio ret = mipi_dsi_dcs_set_display_on(dsi);
9274f048de2SKonrad Dybcio if (ret < 0) {
9284f048de2SKonrad Dybcio dev_err(dev, "Failed to set display on: %d\n", ret);
9294f048de2SKonrad Dybcio return ret;
9304f048de2SKonrad Dybcio }
9314f048de2SKonrad Dybcio msleep(30);
9324f048de2SKonrad Dybcio
9334f048de2SKonrad Dybcio return 0;
9344f048de2SKonrad Dybcio }
9354f048de2SKonrad Dybcio
9360993234aSJianhua Lu static const struct drm_display_mode elish_boe_modes[] = {
9370993234aSJianhua Lu {
938*ad569ac6SJianhua Lu .clock = (1600 + 60 + 8 + 60) * (2560 + 26 + 4 + 168) * 120 / 1000,
9390993234aSJianhua Lu .hdisplay = 1600,
9400993234aSJianhua Lu .hsync_start = 1600 + 60,
9410993234aSJianhua Lu .hsync_end = 1600 + 60 + 8,
9420993234aSJianhua Lu .htotal = 1600 + 60 + 8 + 60,
9430993234aSJianhua Lu .vdisplay = 2560,
9440993234aSJianhua Lu .vsync_start = 2560 + 26,
9450993234aSJianhua Lu .vsync_end = 2560 + 26 + 4,
9460993234aSJianhua Lu .vtotal = 2560 + 26 + 4 + 168,
9470993234aSJianhua Lu },
9480993234aSJianhua Lu };
9490993234aSJianhua Lu
9500993234aSJianhua Lu static const struct drm_display_mode elish_csot_modes[] = {
9510993234aSJianhua Lu {
952*ad569ac6SJianhua Lu .clock = (1600 + 200 + 40 + 52) * (2560 + 26 + 4 + 168) * 120 / 1000,
9530993234aSJianhua Lu .hdisplay = 1600,
9540993234aSJianhua Lu .hsync_start = 1600 + 200,
9550993234aSJianhua Lu .hsync_end = 1600 + 200 + 40,
9560993234aSJianhua Lu .htotal = 1600 + 200 + 40 + 52,
9570993234aSJianhua Lu .vdisplay = 2560,
9580993234aSJianhua Lu .vsync_start = 2560 + 26,
9590993234aSJianhua Lu .vsync_end = 2560 + 26 + 4,
9600993234aSJianhua Lu .vtotal = 2560 + 26 + 4 + 168,
9610993234aSJianhua Lu },
9620993234aSJianhua Lu };
9630993234aSJianhua Lu
9644f048de2SKonrad Dybcio static const struct drm_display_mode j606f_boe_modes[] = {
9654f048de2SKonrad Dybcio {
9664f048de2SKonrad Dybcio .clock = (1200 + 58 + 2 + 60) * (2000 + 26 + 2 + 93) * 60 / 1000,
9674f048de2SKonrad Dybcio .hdisplay = 1200,
9684f048de2SKonrad Dybcio .hsync_start = 1200 + 58,
9694f048de2SKonrad Dybcio .hsync_end = 1200 + 58 + 2,
9704f048de2SKonrad Dybcio .htotal = 1200 + 58 + 2 + 60,
9714f048de2SKonrad Dybcio .vdisplay = 2000,
9724f048de2SKonrad Dybcio .vsync_start = 2000 + 26,
9734f048de2SKonrad Dybcio .vsync_end = 2000 + 26 + 2,
9744f048de2SKonrad Dybcio .vtotal = 2000 + 26 + 2 + 93,
9754f048de2SKonrad Dybcio .width_mm = 143,
9764f048de2SKonrad Dybcio .height_mm = 235,
9774f048de2SKonrad Dybcio },
9784f048de2SKonrad Dybcio };
9794f048de2SKonrad Dybcio
9800993234aSJianhua Lu static const struct panel_desc elish_boe_desc = {
9810993234aSJianhua Lu .modes = elish_boe_modes,
9820993234aSJianhua Lu .num_modes = ARRAY_SIZE(elish_boe_modes),
9830993234aSJianhua Lu .dsi_info = {
9840993234aSJianhua Lu .type = "BOE-elish",
9850993234aSJianhua Lu .channel = 0,
9860993234aSJianhua Lu .node = NULL,
9870993234aSJianhua Lu },
9880993234aSJianhua Lu .width_mm = 127,
9890993234aSJianhua Lu .height_mm = 203,
9900993234aSJianhua Lu .bpc = 8,
9910993234aSJianhua Lu .lanes = 3,
9920993234aSJianhua Lu .format = MIPI_DSI_FMT_RGB888,
9930993234aSJianhua Lu .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
9940993234aSJianhua Lu .init_sequence = elish_boe_init_sequence,
9950993234aSJianhua Lu .is_dual_dsi = true,
9960993234aSJianhua Lu };
9970993234aSJianhua Lu
9980993234aSJianhua Lu static const struct panel_desc elish_csot_desc = {
9990993234aSJianhua Lu .modes = elish_csot_modes,
10000993234aSJianhua Lu .num_modes = ARRAY_SIZE(elish_csot_modes),
10010993234aSJianhua Lu .dsi_info = {
10020993234aSJianhua Lu .type = "CSOT-elish",
10030993234aSJianhua Lu .channel = 0,
10040993234aSJianhua Lu .node = NULL,
10050993234aSJianhua Lu },
10060993234aSJianhua Lu .width_mm = 127,
10070993234aSJianhua Lu .height_mm = 203,
10080993234aSJianhua Lu .bpc = 8,
10090993234aSJianhua Lu .lanes = 3,
10100993234aSJianhua Lu .format = MIPI_DSI_FMT_RGB888,
10110993234aSJianhua Lu .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
10120993234aSJianhua Lu .init_sequence = elish_csot_init_sequence,
10130993234aSJianhua Lu .is_dual_dsi = true,
10140993234aSJianhua Lu };
10150993234aSJianhua Lu
10164f048de2SKonrad Dybcio static const struct panel_desc j606f_boe_desc = {
10174f048de2SKonrad Dybcio .modes = j606f_boe_modes,
10184f048de2SKonrad Dybcio .num_modes = ARRAY_SIZE(j606f_boe_modes),
10194f048de2SKonrad Dybcio .width_mm = 143,
10204f048de2SKonrad Dybcio .height_mm = 235,
10214f048de2SKonrad Dybcio .bpc = 8,
10224f048de2SKonrad Dybcio .lanes = 4,
10234f048de2SKonrad Dybcio .format = MIPI_DSI_FMT_RGB888,
10244f048de2SKonrad Dybcio .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
10254f048de2SKonrad Dybcio MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM,
10264f048de2SKonrad Dybcio .init_sequence = j606f_boe_init_sequence,
10274f048de2SKonrad Dybcio .has_dcs_backlight = true,
10284f048de2SKonrad Dybcio };
10294f048de2SKonrad Dybcio
nt36523_reset(struct panel_info * pinfo)10300993234aSJianhua Lu static void nt36523_reset(struct panel_info *pinfo)
10310993234aSJianhua Lu {
10320993234aSJianhua Lu gpiod_set_value_cansleep(pinfo->reset_gpio, 1);
10330993234aSJianhua Lu usleep_range(12000, 13000);
10340993234aSJianhua Lu gpiod_set_value_cansleep(pinfo->reset_gpio, 0);
10350993234aSJianhua Lu usleep_range(12000, 13000);
10360993234aSJianhua Lu gpiod_set_value_cansleep(pinfo->reset_gpio, 1);
10370993234aSJianhua Lu usleep_range(12000, 13000);
10380993234aSJianhua Lu gpiod_set_value_cansleep(pinfo->reset_gpio, 0);
10390993234aSJianhua Lu usleep_range(12000, 13000);
10400993234aSJianhua Lu }
10410993234aSJianhua Lu
nt36523_prepare(struct drm_panel * panel)10420993234aSJianhua Lu static int nt36523_prepare(struct drm_panel *panel)
10430993234aSJianhua Lu {
10440993234aSJianhua Lu struct panel_info *pinfo = to_panel_info(panel);
10450993234aSJianhua Lu int ret;
10460993234aSJianhua Lu
10470993234aSJianhua Lu if (pinfo->prepared)
10480993234aSJianhua Lu return 0;
10490993234aSJianhua Lu
10500993234aSJianhua Lu ret = regulator_enable(pinfo->vddio);
10510993234aSJianhua Lu if (ret) {
10520993234aSJianhua Lu dev_err(panel->dev, "failed to enable vddio regulator: %d\n", ret);
10530993234aSJianhua Lu return ret;
10540993234aSJianhua Lu }
10550993234aSJianhua Lu
10560993234aSJianhua Lu nt36523_reset(pinfo);
10570993234aSJianhua Lu
10580993234aSJianhua Lu ret = pinfo->desc->init_sequence(pinfo);
10590993234aSJianhua Lu if (ret < 0) {
10600993234aSJianhua Lu regulator_disable(pinfo->vddio);
10610993234aSJianhua Lu dev_err(panel->dev, "failed to initialize panel: %d\n", ret);
10620993234aSJianhua Lu return ret;
10630993234aSJianhua Lu }
10640993234aSJianhua Lu
10650993234aSJianhua Lu pinfo->prepared = true;
10660993234aSJianhua Lu
10670993234aSJianhua Lu return 0;
10680993234aSJianhua Lu }
10690993234aSJianhua Lu
nt36523_disable(struct drm_panel * panel)10700993234aSJianhua Lu static int nt36523_disable(struct drm_panel *panel)
10710993234aSJianhua Lu {
10720993234aSJianhua Lu struct panel_info *pinfo = to_panel_info(panel);
10730993234aSJianhua Lu int i, ret;
10740993234aSJianhua Lu
10750993234aSJianhua Lu for (i = 0; i < DSI_NUM_MIN + pinfo->desc->is_dual_dsi; i++) {
10760993234aSJianhua Lu ret = mipi_dsi_dcs_set_display_off(pinfo->dsi[i]);
10770993234aSJianhua Lu if (ret < 0)
10780993234aSJianhua Lu dev_err(&pinfo->dsi[i]->dev, "failed to set display off: %d\n", ret);
10790993234aSJianhua Lu }
10800993234aSJianhua Lu
10810993234aSJianhua Lu for (i = 0; i < DSI_NUM_MIN + pinfo->desc->is_dual_dsi; i++) {
10820993234aSJianhua Lu ret = mipi_dsi_dcs_enter_sleep_mode(pinfo->dsi[i]);
10830993234aSJianhua Lu if (ret < 0)
10840993234aSJianhua Lu dev_err(&pinfo->dsi[i]->dev, "failed to enter sleep mode: %d\n", ret);
10850993234aSJianhua Lu }
10860993234aSJianhua Lu
10870993234aSJianhua Lu msleep(70);
10880993234aSJianhua Lu
10890993234aSJianhua Lu return 0;
10900993234aSJianhua Lu }
10910993234aSJianhua Lu
nt36523_unprepare(struct drm_panel * panel)10920993234aSJianhua Lu static int nt36523_unprepare(struct drm_panel *panel)
10930993234aSJianhua Lu {
10940993234aSJianhua Lu struct panel_info *pinfo = to_panel_info(panel);
10950993234aSJianhua Lu
10960993234aSJianhua Lu if (!pinfo->prepared)
10970993234aSJianhua Lu return 0;
10980993234aSJianhua Lu
10990993234aSJianhua Lu gpiod_set_value_cansleep(pinfo->reset_gpio, 1);
11000993234aSJianhua Lu regulator_disable(pinfo->vddio);
11010993234aSJianhua Lu
11020993234aSJianhua Lu pinfo->prepared = false;
11030993234aSJianhua Lu
11040993234aSJianhua Lu return 0;
11050993234aSJianhua Lu }
11060993234aSJianhua Lu
nt36523_remove(struct mipi_dsi_device * dsi)11070993234aSJianhua Lu static void nt36523_remove(struct mipi_dsi_device *dsi)
11080993234aSJianhua Lu {
11090993234aSJianhua Lu struct panel_info *pinfo = mipi_dsi_get_drvdata(dsi);
11100993234aSJianhua Lu int ret;
11110993234aSJianhua Lu
11120993234aSJianhua Lu ret = mipi_dsi_detach(pinfo->dsi[0]);
11130993234aSJianhua Lu if (ret < 0)
11140993234aSJianhua Lu dev_err(&dsi->dev, "failed to detach from DSI0 host: %d\n", ret);
11150993234aSJianhua Lu
11160993234aSJianhua Lu if (pinfo->desc->is_dual_dsi) {
11170993234aSJianhua Lu ret = mipi_dsi_detach(pinfo->dsi[1]);
11180993234aSJianhua Lu if (ret < 0)
11190993234aSJianhua Lu dev_err(&pinfo->dsi[1]->dev, "failed to detach from DSI1 host: %d\n", ret);
11200993234aSJianhua Lu mipi_dsi_device_unregister(pinfo->dsi[1]);
11210993234aSJianhua Lu }
11220993234aSJianhua Lu
11230993234aSJianhua Lu drm_panel_remove(&pinfo->panel);
11240993234aSJianhua Lu }
11250993234aSJianhua Lu
nt36523_get_modes(struct drm_panel * panel,struct drm_connector * connector)11260993234aSJianhua Lu static int nt36523_get_modes(struct drm_panel *panel,
11270993234aSJianhua Lu struct drm_connector *connector)
11280993234aSJianhua Lu {
11290993234aSJianhua Lu struct panel_info *pinfo = to_panel_info(panel);
11300993234aSJianhua Lu int i;
11310993234aSJianhua Lu
11320993234aSJianhua Lu for (i = 0; i < pinfo->desc->num_modes; i++) {
11330993234aSJianhua Lu const struct drm_display_mode *m = &pinfo->desc->modes[i];
11340993234aSJianhua Lu struct drm_display_mode *mode;
11350993234aSJianhua Lu
11360993234aSJianhua Lu mode = drm_mode_duplicate(connector->dev, m);
11370993234aSJianhua Lu if (!mode) {
11380993234aSJianhua Lu dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
11390993234aSJianhua Lu m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
11400993234aSJianhua Lu return -ENOMEM;
11410993234aSJianhua Lu }
11420993234aSJianhua Lu
11430993234aSJianhua Lu mode->type = DRM_MODE_TYPE_DRIVER;
11440993234aSJianhua Lu if (i == 0)
11450993234aSJianhua Lu mode->type |= DRM_MODE_TYPE_PREFERRED;
11460993234aSJianhua Lu
11470993234aSJianhua Lu drm_mode_set_name(mode);
11480993234aSJianhua Lu drm_mode_probed_add(connector, mode);
11490993234aSJianhua Lu }
11500993234aSJianhua Lu
11510993234aSJianhua Lu connector->display_info.width_mm = pinfo->desc->width_mm;
11520993234aSJianhua Lu connector->display_info.height_mm = pinfo->desc->height_mm;
11530993234aSJianhua Lu connector->display_info.bpc = pinfo->desc->bpc;
11540993234aSJianhua Lu
11550993234aSJianhua Lu return pinfo->desc->num_modes;
11560993234aSJianhua Lu }
11570993234aSJianhua Lu
nt36523_get_orientation(struct drm_panel * panel)11581eae88faSKonrad Dybcio static enum drm_panel_orientation nt36523_get_orientation(struct drm_panel *panel)
11591eae88faSKonrad Dybcio {
11601eae88faSKonrad Dybcio struct panel_info *pinfo = to_panel_info(panel);
11611eae88faSKonrad Dybcio
11621eae88faSKonrad Dybcio return pinfo->orientation;
11631eae88faSKonrad Dybcio }
11641eae88faSKonrad Dybcio
11650993234aSJianhua Lu static const struct drm_panel_funcs nt36523_panel_funcs = {
11660993234aSJianhua Lu .disable = nt36523_disable,
11670993234aSJianhua Lu .prepare = nt36523_prepare,
11680993234aSJianhua Lu .unprepare = nt36523_unprepare,
11690993234aSJianhua Lu .get_modes = nt36523_get_modes,
11701eae88faSKonrad Dybcio .get_orientation = nt36523_get_orientation,
11710993234aSJianhua Lu };
11720993234aSJianhua Lu
nt36523_bl_update_status(struct backlight_device * bl)1173aecb583cSKonrad Dybcio static int nt36523_bl_update_status(struct backlight_device *bl)
1174aecb583cSKonrad Dybcio {
1175aecb583cSKonrad Dybcio struct mipi_dsi_device *dsi = bl_get_data(bl);
1176aecb583cSKonrad Dybcio u16 brightness = backlight_get_brightness(bl);
1177aecb583cSKonrad Dybcio int ret;
1178aecb583cSKonrad Dybcio
1179aecb583cSKonrad Dybcio dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
1180aecb583cSKonrad Dybcio
1181aecb583cSKonrad Dybcio ret = mipi_dsi_dcs_set_display_brightness_large(dsi, brightness);
1182aecb583cSKonrad Dybcio if (ret < 0)
1183aecb583cSKonrad Dybcio return ret;
1184aecb583cSKonrad Dybcio
1185aecb583cSKonrad Dybcio dsi->mode_flags |= MIPI_DSI_MODE_LPM;
1186aecb583cSKonrad Dybcio
1187aecb583cSKonrad Dybcio return 0;
1188aecb583cSKonrad Dybcio }
1189aecb583cSKonrad Dybcio
nt36523_bl_get_brightness(struct backlight_device * bl)1190aecb583cSKonrad Dybcio static int nt36523_bl_get_brightness(struct backlight_device *bl)
1191aecb583cSKonrad Dybcio {
1192aecb583cSKonrad Dybcio struct mipi_dsi_device *dsi = bl_get_data(bl);
1193aecb583cSKonrad Dybcio u16 brightness;
1194aecb583cSKonrad Dybcio int ret;
1195aecb583cSKonrad Dybcio
1196aecb583cSKonrad Dybcio dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
1197aecb583cSKonrad Dybcio
1198aecb583cSKonrad Dybcio ret = mipi_dsi_dcs_get_display_brightness_large(dsi, &brightness);
1199aecb583cSKonrad Dybcio if (ret < 0)
1200aecb583cSKonrad Dybcio return ret;
1201aecb583cSKonrad Dybcio
1202aecb583cSKonrad Dybcio dsi->mode_flags |= MIPI_DSI_MODE_LPM;
1203aecb583cSKonrad Dybcio
1204aecb583cSKonrad Dybcio return brightness;
1205aecb583cSKonrad Dybcio }
1206aecb583cSKonrad Dybcio
1207aecb583cSKonrad Dybcio static const struct backlight_ops nt36523_bl_ops = {
1208aecb583cSKonrad Dybcio .update_status = nt36523_bl_update_status,
1209aecb583cSKonrad Dybcio .get_brightness = nt36523_bl_get_brightness,
1210aecb583cSKonrad Dybcio };
1211aecb583cSKonrad Dybcio
nt36523_create_backlight(struct mipi_dsi_device * dsi)1212aecb583cSKonrad Dybcio static struct backlight_device *nt36523_create_backlight(struct mipi_dsi_device *dsi)
1213aecb583cSKonrad Dybcio {
1214aecb583cSKonrad Dybcio struct device *dev = &dsi->dev;
1215aecb583cSKonrad Dybcio const struct backlight_properties props = {
1216aecb583cSKonrad Dybcio .type = BACKLIGHT_RAW,
1217aecb583cSKonrad Dybcio .brightness = 512,
1218aecb583cSKonrad Dybcio .max_brightness = 4095,
1219aecb583cSKonrad Dybcio .scale = BACKLIGHT_SCALE_NON_LINEAR,
1220aecb583cSKonrad Dybcio };
1221aecb583cSKonrad Dybcio
1222aecb583cSKonrad Dybcio return devm_backlight_device_register(dev, dev_name(dev), dev, dsi,
1223aecb583cSKonrad Dybcio &nt36523_bl_ops, &props);
1224aecb583cSKonrad Dybcio }
1225aecb583cSKonrad Dybcio
nt36523_probe(struct mipi_dsi_device * dsi)12260993234aSJianhua Lu static int nt36523_probe(struct mipi_dsi_device *dsi)
12270993234aSJianhua Lu {
12280993234aSJianhua Lu struct device *dev = &dsi->dev;
12290993234aSJianhua Lu struct device_node *dsi1;
12300993234aSJianhua Lu struct mipi_dsi_host *dsi1_host;
12310993234aSJianhua Lu struct panel_info *pinfo;
12320993234aSJianhua Lu const struct mipi_dsi_device_info *info;
12330993234aSJianhua Lu int i, ret;
12340993234aSJianhua Lu
12350993234aSJianhua Lu pinfo = devm_kzalloc(dev, sizeof(*pinfo), GFP_KERNEL);
12360993234aSJianhua Lu if (!pinfo)
12370993234aSJianhua Lu return -ENOMEM;
12380993234aSJianhua Lu
12390993234aSJianhua Lu pinfo->vddio = devm_regulator_get(dev, "vddio");
12400993234aSJianhua Lu if (IS_ERR(pinfo->vddio))
12410993234aSJianhua Lu return dev_err_probe(dev, PTR_ERR(pinfo->vddio), "failed to get vddio regulator\n");
12420993234aSJianhua Lu
12430993234aSJianhua Lu pinfo->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
12440993234aSJianhua Lu if (IS_ERR(pinfo->reset_gpio))
12450993234aSJianhua Lu return dev_err_probe(dev, PTR_ERR(pinfo->reset_gpio), "failed to get reset gpio\n");
12460993234aSJianhua Lu
12470993234aSJianhua Lu pinfo->desc = of_device_get_match_data(dev);
12480993234aSJianhua Lu if (!pinfo->desc)
12490993234aSJianhua Lu return -ENODEV;
12500993234aSJianhua Lu
12510993234aSJianhua Lu /* If the panel is dual dsi, register DSI1 */
12520993234aSJianhua Lu if (pinfo->desc->is_dual_dsi) {
12530993234aSJianhua Lu info = &pinfo->desc->dsi_info;
12540993234aSJianhua Lu
12550993234aSJianhua Lu dsi1 = of_graph_get_remote_node(dsi->dev.of_node, 1, -1);
12560993234aSJianhua Lu if (!dsi1) {
12570993234aSJianhua Lu dev_err(dev, "cannot get secondary DSI node.\n");
12580993234aSJianhua Lu return -ENODEV;
12590993234aSJianhua Lu }
12600993234aSJianhua Lu
12610993234aSJianhua Lu dsi1_host = of_find_mipi_dsi_host_by_node(dsi1);
12620993234aSJianhua Lu of_node_put(dsi1);
12630993234aSJianhua Lu if (!dsi1_host)
12640993234aSJianhua Lu return dev_err_probe(dev, -EPROBE_DEFER, "cannot get secondary DSI host\n");
12650993234aSJianhua Lu
12660993234aSJianhua Lu pinfo->dsi[1] = mipi_dsi_device_register_full(dsi1_host, info);
1267684cf5d6SYang Yingliang if (IS_ERR(pinfo->dsi[1])) {
12680993234aSJianhua Lu dev_err(dev, "cannot get secondary DSI device\n");
1269684cf5d6SYang Yingliang return PTR_ERR(pinfo->dsi[1]);
12700993234aSJianhua Lu }
12710993234aSJianhua Lu }
12720993234aSJianhua Lu
12730993234aSJianhua Lu pinfo->dsi[0] = dsi;
12740993234aSJianhua Lu mipi_dsi_set_drvdata(dsi, pinfo);
12750993234aSJianhua Lu drm_panel_init(&pinfo->panel, dev, &nt36523_panel_funcs, DRM_MODE_CONNECTOR_DSI);
12760993234aSJianhua Lu
12771eae88faSKonrad Dybcio ret = of_drm_get_panel_orientation(dev->of_node, &pinfo->orientation);
12781eae88faSKonrad Dybcio if (ret < 0) {
12791eae88faSKonrad Dybcio dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret);
12801eae88faSKonrad Dybcio return ret;
12811eae88faSKonrad Dybcio }
12821eae88faSKonrad Dybcio
1283aecb583cSKonrad Dybcio if (pinfo->desc->has_dcs_backlight) {
1284aecb583cSKonrad Dybcio pinfo->panel.backlight = nt36523_create_backlight(dsi);
1285aecb583cSKonrad Dybcio if (IS_ERR(pinfo->panel.backlight))
1286aecb583cSKonrad Dybcio return dev_err_probe(dev, PTR_ERR(pinfo->panel.backlight),
1287aecb583cSKonrad Dybcio "Failed to create backlight\n");
1288aecb583cSKonrad Dybcio } else {
12890993234aSJianhua Lu ret = drm_panel_of_backlight(&pinfo->panel);
12900993234aSJianhua Lu if (ret)
1291aecb583cSKonrad Dybcio return dev_err_probe(dev, ret, "Failed to get backlight\n");
1292aecb583cSKonrad Dybcio }
12930993234aSJianhua Lu
12940993234aSJianhua Lu drm_panel_add(&pinfo->panel);
12950993234aSJianhua Lu
12960993234aSJianhua Lu for (i = 0; i < DSI_NUM_MIN + pinfo->desc->is_dual_dsi; i++) {
12970993234aSJianhua Lu pinfo->dsi[i]->lanes = pinfo->desc->lanes;
12980993234aSJianhua Lu pinfo->dsi[i]->format = pinfo->desc->format;
12990993234aSJianhua Lu pinfo->dsi[i]->mode_flags = pinfo->desc->mode_flags;
13000993234aSJianhua Lu
13010993234aSJianhua Lu ret = mipi_dsi_attach(pinfo->dsi[i]);
13020993234aSJianhua Lu if (ret < 0)
13030993234aSJianhua Lu return dev_err_probe(dev, ret, "cannot attach to DSI%d host.\n", i);
13040993234aSJianhua Lu }
13050993234aSJianhua Lu
13060993234aSJianhua Lu return 0;
13070993234aSJianhua Lu }
13080993234aSJianhua Lu
13090993234aSJianhua Lu static const struct of_device_id nt36523_of_match[] = {
13100993234aSJianhua Lu {
13114f048de2SKonrad Dybcio .compatible = "lenovo,j606f-boe-nt36523w",
13124f048de2SKonrad Dybcio .data = &j606f_boe_desc,
13134f048de2SKonrad Dybcio },
13144f048de2SKonrad Dybcio {
13150993234aSJianhua Lu .compatible = "xiaomi,elish-boe-nt36523",
13160993234aSJianhua Lu .data = &elish_boe_desc,
13170993234aSJianhua Lu },
13180993234aSJianhua Lu {
13190993234aSJianhua Lu .compatible = "xiaomi,elish-csot-nt36523",
13200993234aSJianhua Lu .data = &elish_csot_desc,
13210993234aSJianhua Lu },
13220993234aSJianhua Lu {},
13230993234aSJianhua Lu };
13240993234aSJianhua Lu MODULE_DEVICE_TABLE(of, nt36523_of_match);
13250993234aSJianhua Lu
13260993234aSJianhua Lu static struct mipi_dsi_driver nt36523_driver = {
13270993234aSJianhua Lu .probe = nt36523_probe,
13280993234aSJianhua Lu .remove = nt36523_remove,
13290993234aSJianhua Lu .driver = {
13300993234aSJianhua Lu .name = "panel-novatek-nt36523",
13310993234aSJianhua Lu .of_match_table = nt36523_of_match,
13320993234aSJianhua Lu },
13330993234aSJianhua Lu };
13340993234aSJianhua Lu module_mipi_dsi_driver(nt36523_driver);
13350993234aSJianhua Lu
13360993234aSJianhua Lu MODULE_AUTHOR("Jianhua Lu <lujianhua000@gmail.com>");
13370993234aSJianhua Lu MODULE_DESCRIPTION("DRM driver for Novatek NT36523 based MIPI DSI panels");
13380993234aSJianhua Lu MODULE_LICENSE("GPL");
1339