xref: /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bar/tu102.c (revision d0034a7a4ac7fae708146ac0059b9c47a1543f0d)
1ef7664d9SBen Skeggs /*
2ef7664d9SBen Skeggs  * Copyright 2018 Red Hat Inc.
3ef7664d9SBen Skeggs  *
4ef7664d9SBen Skeggs  * Permission is hereby granted, free of charge, to any person obtaining a
5ef7664d9SBen Skeggs  * copy of this software and associated documentation files (the "Software"),
6ef7664d9SBen Skeggs  * to deal in the Software without restriction, including without limitation
7ef7664d9SBen Skeggs  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8ef7664d9SBen Skeggs  * and/or sell copies of the Software, and to permit persons to whom the
9ef7664d9SBen Skeggs  * Software is furnished to do so, subject to the following conditions:
10ef7664d9SBen Skeggs  *
11ef7664d9SBen Skeggs  * The above copyright notice and this permission notice shall be included in
12ef7664d9SBen Skeggs  * all copies or substantial portions of the Software.
13ef7664d9SBen Skeggs  *
14ef7664d9SBen Skeggs  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15ef7664d9SBen Skeggs  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16ef7664d9SBen Skeggs  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17ef7664d9SBen Skeggs  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18ef7664d9SBen Skeggs  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19ef7664d9SBen Skeggs  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20ef7664d9SBen Skeggs  * OTHER DEALINGS IN THE SOFTWARE.
21ef7664d9SBen Skeggs  */
22ef7664d9SBen Skeggs #include "gf100.h"
23ef7664d9SBen Skeggs 
24ef7664d9SBen Skeggs #include <core/memory.h>
25ef7664d9SBen Skeggs #include <subdev/timer.h>
26ef7664d9SBen Skeggs 
27ef7664d9SBen Skeggs static void
tu102_bar_bar2_wait(struct nvkm_bar * bar)28ef7664d9SBen Skeggs tu102_bar_bar2_wait(struct nvkm_bar *bar)
29ef7664d9SBen Skeggs {
30ef7664d9SBen Skeggs 	struct nvkm_device *device = bar->subdev.device;
31ef7664d9SBen Skeggs 	nvkm_msec(device, 2000,
32ef7664d9SBen Skeggs 		if (!(nvkm_rd32(device, 0xb80f50) & 0x0000000c))
33ef7664d9SBen Skeggs 			break;
34ef7664d9SBen Skeggs 	);
35ef7664d9SBen Skeggs }
36ef7664d9SBen Skeggs 
37ef7664d9SBen Skeggs static void
tu102_bar_bar2_fini(struct nvkm_bar * bar)38ef7664d9SBen Skeggs tu102_bar_bar2_fini(struct nvkm_bar *bar)
39ef7664d9SBen Skeggs {
40ef7664d9SBen Skeggs 	nvkm_mask(bar->subdev.device, 0xb80f48, 0x80000000, 0x00000000);
41ef7664d9SBen Skeggs }
42ef7664d9SBen Skeggs 
43ef7664d9SBen Skeggs static void
tu102_bar_bar2_init(struct nvkm_bar * base)44ef7664d9SBen Skeggs tu102_bar_bar2_init(struct nvkm_bar *base)
45ef7664d9SBen Skeggs {
46ef7664d9SBen Skeggs 	struct nvkm_device *device = base->subdev.device;
47ef7664d9SBen Skeggs 	struct gf100_bar *bar = gf100_bar(base);
48ef7664d9SBen Skeggs 	u32 addr = nvkm_memory_addr(bar->bar[0].inst) >> 12;
49ef7664d9SBen Skeggs 	if (bar->bar2_halve)
50ef7664d9SBen Skeggs 		addr |= 0x40000000;
51ef7664d9SBen Skeggs 	nvkm_wr32(device, 0xb80f48, 0x80000000 | addr);
52ef7664d9SBen Skeggs }
53ef7664d9SBen Skeggs 
54ef7664d9SBen Skeggs static void
tu102_bar_bar1_wait(struct nvkm_bar * bar)55ef7664d9SBen Skeggs tu102_bar_bar1_wait(struct nvkm_bar *bar)
56ef7664d9SBen Skeggs {
57ef7664d9SBen Skeggs 	struct nvkm_device *device = bar->subdev.device;
58ef7664d9SBen Skeggs 	nvkm_msec(device, 2000,
59ef7664d9SBen Skeggs 		if (!(nvkm_rd32(device, 0xb80f50) & 0x00000003))
60ef7664d9SBen Skeggs 			break;
61ef7664d9SBen Skeggs 	);
62ef7664d9SBen Skeggs }
63ef7664d9SBen Skeggs 
64ef7664d9SBen Skeggs static void
tu102_bar_bar1_fini(struct nvkm_bar * bar)65ef7664d9SBen Skeggs tu102_bar_bar1_fini(struct nvkm_bar *bar)
66ef7664d9SBen Skeggs {
67ef7664d9SBen Skeggs 	nvkm_mask(bar->subdev.device, 0xb80f40, 0x80000000, 0x00000000);
68ef7664d9SBen Skeggs }
69ef7664d9SBen Skeggs 
70ef7664d9SBen Skeggs static void
tu102_bar_bar1_init(struct nvkm_bar * base)71ef7664d9SBen Skeggs tu102_bar_bar1_init(struct nvkm_bar *base)
72ef7664d9SBen Skeggs {
73ef7664d9SBen Skeggs 	struct nvkm_device *device = base->subdev.device;
74ef7664d9SBen Skeggs 	struct gf100_bar *bar = gf100_bar(base);
75ef7664d9SBen Skeggs 	const u32 addr = nvkm_memory_addr(bar->bar[1].inst) >> 12;
76ef7664d9SBen Skeggs 	nvkm_wr32(device, 0xb80f40, 0x80000000 | addr);
77ef7664d9SBen Skeggs }
78ef7664d9SBen Skeggs 
79ef7664d9SBen Skeggs static const struct nvkm_bar_func
80ef7664d9SBen Skeggs tu102_bar = {
81ef7664d9SBen Skeggs 	.dtor = gf100_bar_dtor,
82ef7664d9SBen Skeggs 	.oneinit = gf100_bar_oneinit,
83ef7664d9SBen Skeggs 	.bar1.init = tu102_bar_bar1_init,
84ef7664d9SBen Skeggs 	.bar1.fini = tu102_bar_bar1_fini,
85ef7664d9SBen Skeggs 	.bar1.wait = tu102_bar_bar1_wait,
86ef7664d9SBen Skeggs 	.bar1.vmm = gf100_bar_bar1_vmm,
87ef7664d9SBen Skeggs 	.bar2.init = tu102_bar_bar2_init,
88ef7664d9SBen Skeggs 	.bar2.fini = tu102_bar_bar2_fini,
89ef7664d9SBen Skeggs 	.bar2.wait = tu102_bar_bar2_wait,
90ef7664d9SBen Skeggs 	.bar2.vmm = gf100_bar_bar2_vmm,
91ef7664d9SBen Skeggs 	.flush = g84_bar_flush,
92ef7664d9SBen Skeggs };
93ef7664d9SBen Skeggs 
94ef7664d9SBen Skeggs int
tu102_bar_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_bar ** pbar)95*917b24a3SBen Skeggs tu102_bar_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
96*917b24a3SBen Skeggs 	      struct nvkm_bar **pbar)
97ef7664d9SBen Skeggs {
98*917b24a3SBen Skeggs 	return gf100_bar_new_(&tu102_bar, device, type, inst, pbar);
99ef7664d9SBen Skeggs }
100