xref: /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/acr/gv100.c (revision d0e99511834b6828c960e978d9a8cb6e5731250d)
1  /*
2   * Copyright 2022 Red Hat Inc.
3   *
4   * Permission is hereby granted, free of charge, to any person obtaining a
5   * copy of this software and associated documentation files (the "Software"),
6   * to deal in the Software without restriction, including without limitation
7   * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8   * and/or sell copies of the Software, and to permit persons to whom the
9   * Software is furnished to do so, subject to the following conditions:
10   *
11   * The above copyright notice and this permission notice shall be included in
12   * all copies or substantial portions of the Software.
13   *
14   * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15   * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16   * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17   * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18   * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19   * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20   * OTHER DEALINGS IN THE SOFTWARE.
21   */
22  #include "priv.h"
23  
24  MODULE_FIRMWARE("nvidia/gv100/acr/unload_bl.bin");
25  MODULE_FIRMWARE("nvidia/gv100/acr/ucode_unload.bin");
26  
27  static const struct nvkm_acr_hsf_fwif
28  gv100_acr_unload_fwif[] = {
29  	{ 0, gm200_acr_hsfw_ctor, &gp108_acr_hsfw_0, NVKM_ACR_HSF_PMU, 0, 0x00000000 },
30  	{}
31  };
32  
33  MODULE_FIRMWARE("nvidia/gv100/acr/bl.bin");
34  MODULE_FIRMWARE("nvidia/gv100/acr/ucode_load.bin");
35  
36  static const struct nvkm_acr_hsf_fwif
37  gv100_acr_load_fwif[] = {
38  	{ 0, gm200_acr_hsfw_ctor, &gp108_acr_load_0, NVKM_ACR_HSF_SEC2, 0, 0x00000010 },
39  	{}
40  };
41  
42  static const struct nvkm_acr_func
43  gv100_acr = {
44  	.load = gv100_acr_load_fwif,
45  	.unload = gv100_acr_unload_fwif,
46  	.wpr_parse = gp102_acr_wpr_parse,
47  	.wpr_layout = gp102_acr_wpr_layout,
48  	.wpr_alloc = gp102_acr_wpr_alloc,
49  	.wpr_build = gp102_acr_wpr_build,
50  	.wpr_patch = gp102_acr_wpr_patch,
51  	.wpr_check = gm200_acr_wpr_check,
52  	.init = gm200_acr_init,
53  };
54  
55  static const struct nvkm_acr_fwif
56  gv100_acr_fwif[] = {
57  	{  0, gp102_acr_load, &gv100_acr },
58  	{ -1, gm200_acr_nofw, &gm200_acr },
59  	{}
60  };
61  
62  int
63  gv100_acr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
64  	      struct nvkm_acr **pacr)
65  {
66  	return nvkm_acr_new_(gv100_acr_fwif, device, type, inst, pacr);
67  }
68