xref: /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga102.c (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1*a51c69eeSBen Skeggs /*
2*a51c69eeSBen Skeggs  * Copyright 2021 Red Hat Inc.
3*a51c69eeSBen Skeggs  *
4*a51c69eeSBen Skeggs  * Permission is hereby granted, free of charge, to any person obtaining a
5*a51c69eeSBen Skeggs  * copy of this software and associated documentation files (the "Software"),
6*a51c69eeSBen Skeggs  * to deal in the Software without restriction, including without limitation
7*a51c69eeSBen Skeggs  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*a51c69eeSBen Skeggs  * and/or sell copies of the Software, and to permit persons to whom the
9*a51c69eeSBen Skeggs  * Software is furnished to do so, subject to the following conditions:
10*a51c69eeSBen Skeggs  *
11*a51c69eeSBen Skeggs  * The above copyright notice and this permission notice shall be included in
12*a51c69eeSBen Skeggs  * all copies or substantial portions of the Software.
13*a51c69eeSBen Skeggs  *
14*a51c69eeSBen Skeggs  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*a51c69eeSBen Skeggs  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*a51c69eeSBen Skeggs  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*a51c69eeSBen Skeggs  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*a51c69eeSBen Skeggs  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*a51c69eeSBen Skeggs  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*a51c69eeSBen Skeggs  * OTHER DEALINGS IN THE SOFTWARE.
21*a51c69eeSBen Skeggs  */
22*a51c69eeSBen Skeggs #include "priv.h"
23*a51c69eeSBen Skeggs 
24*a51c69eeSBen Skeggs #include <subdev/mc.h>
25*a51c69eeSBen Skeggs #include <subdev/timer.h>
26*a51c69eeSBen Skeggs 
27*a51c69eeSBen Skeggs static const struct nvkm_falcon_func
28*a51c69eeSBen Skeggs ga102_nvdec_flcn = {
29*a51c69eeSBen Skeggs 	.disable = gm200_flcn_disable,
30*a51c69eeSBen Skeggs 	.enable = gm200_flcn_enable,
31*a51c69eeSBen Skeggs 	.addr2 = 0x1c00,
32*a51c69eeSBen Skeggs 	.reset_pmc = true,
33*a51c69eeSBen Skeggs 	.reset_prep = ga102_flcn_reset_prep,
34*a51c69eeSBen Skeggs 	.reset_wait_mem_scrubbing = ga102_flcn_reset_wait_mem_scrubbing,
35*a51c69eeSBen Skeggs 	.imem_dma = &ga102_flcn_dma,
36*a51c69eeSBen Skeggs 	.dmem_dma = &ga102_flcn_dma,
37*a51c69eeSBen Skeggs };
38*a51c69eeSBen Skeggs 
39*a51c69eeSBen Skeggs static const struct nvkm_nvdec_func
40*a51c69eeSBen Skeggs ga102_nvdec = {
41*a51c69eeSBen Skeggs 	.flcn = &ga102_nvdec_flcn,
42*a51c69eeSBen Skeggs };
43*a51c69eeSBen Skeggs 
44*a51c69eeSBen Skeggs static int
ga102_nvdec_nofw(struct nvkm_nvdec * nvdec,int ver,const struct nvkm_nvdec_fwif * fwif)45*a51c69eeSBen Skeggs ga102_nvdec_nofw(struct nvkm_nvdec *nvdec, int ver, const struct nvkm_nvdec_fwif *fwif)
46*a51c69eeSBen Skeggs {
47*a51c69eeSBen Skeggs 	return 0;
48*a51c69eeSBen Skeggs }
49*a51c69eeSBen Skeggs 
50*a51c69eeSBen Skeggs static const struct nvkm_nvdec_fwif
51*a51c69eeSBen Skeggs ga102_nvdec_fwif[] = {
52*a51c69eeSBen Skeggs 	{ -1, ga102_nvdec_nofw, &ga102_nvdec },
53*a51c69eeSBen Skeggs 	{}
54*a51c69eeSBen Skeggs };
55*a51c69eeSBen Skeggs 
56*a51c69eeSBen Skeggs int
ga102_nvdec_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_nvdec ** pnvdec)57*a51c69eeSBen Skeggs ga102_nvdec_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
58*a51c69eeSBen Skeggs 		struct nvkm_nvdec **pnvdec)
59*a51c69eeSBen Skeggs {
60*a51c69eeSBen Skeggs 	return nvkm_nvdec_new_(ga102_nvdec_fwif, device, type, inst, 0x848000, pnvdec);
61*a51c69eeSBen Skeggs }
62