1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include <subdev/vga.h> 25 26 u8 27 nv_rdport(void *obj, int head, u16 port) 28 { 29 struct nvkm_device *device = nv_device(obj); 30 31 if (device->card_type >= NV_50) 32 return nv_rd08(obj, 0x601000 + port); 33 34 if (port == 0x03c0 || port == 0x03c1 || /* AR */ 35 port == 0x03c2 || port == 0x03da || /* INP0 */ 36 port == 0x03d4 || port == 0x03d5) /* CR */ 37 return nv_rd08(obj, 0x601000 + (head * 0x2000) + port); 38 39 if (port == 0x03c2 || port == 0x03cc || /* MISC */ 40 port == 0x03c4 || port == 0x03c5 || /* SR */ 41 port == 0x03ce || port == 0x03cf) { /* GR */ 42 if (device->card_type < NV_40) 43 head = 0; /* CR44 selects head */ 44 return nv_rd08(obj, 0x0c0000 + (head * 0x2000) + port); 45 } 46 47 nv_error(obj, "unknown vga port 0x%04x\n", port); 48 return 0x00; 49 } 50 51 void 52 nv_wrport(void *obj, int head, u16 port, u8 data) 53 { 54 struct nvkm_device *device = nv_device(obj); 55 56 if (device->card_type >= NV_50) 57 nv_wr08(obj, 0x601000 + port, data); 58 else 59 if (port == 0x03c0 || port == 0x03c1 || /* AR */ 60 port == 0x03c2 || port == 0x03da || /* INP0 */ 61 port == 0x03d4 || port == 0x03d5) /* CR */ 62 nv_wr08(obj, 0x601000 + (head * 0x2000) + port, data); 63 else 64 if (port == 0x03c2 || port == 0x03cc || /* MISC */ 65 port == 0x03c4 || port == 0x03c5 || /* SR */ 66 port == 0x03ce || port == 0x03cf) { /* GR */ 67 if (device->card_type < NV_40) 68 head = 0; /* CR44 selects head */ 69 nv_wr08(obj, 0x0c0000 + (head * 0x2000) + port, data); 70 } else 71 nv_error(obj, "unknown vga port 0x%04x\n", port); 72 } 73 74 u8 75 nv_rdvgas(void *obj, int head, u8 index) 76 { 77 nv_wrport(obj, head, 0x03c4, index); 78 return nv_rdport(obj, head, 0x03c5); 79 } 80 81 void 82 nv_wrvgas(void *obj, int head, u8 index, u8 value) 83 { 84 nv_wrport(obj, head, 0x03c4, index); 85 nv_wrport(obj, head, 0x03c5, value); 86 } 87 88 u8 89 nv_rdvgag(void *obj, int head, u8 index) 90 { 91 nv_wrport(obj, head, 0x03ce, index); 92 return nv_rdport(obj, head, 0x03cf); 93 } 94 95 void 96 nv_wrvgag(void *obj, int head, u8 index, u8 value) 97 { 98 nv_wrport(obj, head, 0x03ce, index); 99 nv_wrport(obj, head, 0x03cf, value); 100 } 101 102 u8 103 nv_rdvgac(void *obj, int head, u8 index) 104 { 105 nv_wrport(obj, head, 0x03d4, index); 106 return nv_rdport(obj, head, 0x03d5); 107 } 108 109 void 110 nv_wrvgac(void *obj, int head, u8 index, u8 value) 111 { 112 nv_wrport(obj, head, 0x03d4, index); 113 nv_wrport(obj, head, 0x03d5, value); 114 } 115 116 u8 117 nv_rdvgai(void *obj, int head, u16 port, u8 index) 118 { 119 if (port == 0x03c4) return nv_rdvgas(obj, head, index); 120 if (port == 0x03ce) return nv_rdvgag(obj, head, index); 121 if (port == 0x03d4) return nv_rdvgac(obj, head, index); 122 nv_error(obj, "unknown indexed vga port 0x%04x\n", port); 123 return 0x00; 124 } 125 126 void 127 nv_wrvgai(void *obj, int head, u16 port, u8 index, u8 value) 128 { 129 if (port == 0x03c4) nv_wrvgas(obj, head, index, value); 130 else if (port == 0x03ce) nv_wrvgag(obj, head, index, value); 131 else if (port == 0x03d4) nv_wrvgac(obj, head, index, value); 132 else nv_error(obj, "unknown indexed vga port 0x%04x\n", port); 133 } 134 135 bool 136 nv_lockvgac(void *obj, bool lock) 137 { 138 struct nvkm_device *dev = nv_device(obj); 139 140 bool locked = !nv_rdvgac(obj, 0, 0x1f); 141 u8 data = lock ? 0x99 : 0x57; 142 if (dev->card_type < NV_50) 143 nv_wrvgac(obj, 0, 0x1f, data); 144 else 145 nv_wrvgac(obj, 0, 0x3f, data); 146 if (dev->chipset == 0x11) { 147 if (!(nv_rd32(obj, 0x001084) & 0x10000000)) 148 nv_wrvgac(obj, 1, 0x1f, data); 149 } 150 return locked; 151 } 152 153 /* CR44 takes values 0 (head A), 3 (head B) and 4 (heads tied) 154 * it affects only the 8 bit vga io regs, which we access using mmio at 155 * 0xc{0,2}3c*, 0x60{1,3}3*, and 0x68{1,3}3d* 156 * in general, the set value of cr44 does not matter: reg access works as 157 * expected and values can be set for the appropriate head by using a 0x2000 158 * offset as required 159 * however: 160 * a) pre nv40, the head B range of PRMVIO regs at 0xc23c* was not exposed and 161 * cr44 must be set to 0 or 3 for accessing values on the correct head 162 * through the common 0xc03c* addresses 163 * b) in tied mode (4) head B is programmed to the values set on head A, and 164 * access using the head B addresses can have strange results, ergo we leave 165 * tied mode in init once we know to what cr44 should be restored on exit 166 * 167 * the owner parameter is slightly abused: 168 * 0 and 1 are treated as head values and so the set value is (owner * 3) 169 * other values are treated as literal values to set 170 */ 171 u8 172 nv_rdvgaowner(void *obj) 173 { 174 if (nv_device(obj)->card_type < NV_50) { 175 if (nv_device(obj)->chipset == 0x11) { 176 u32 tied = nv_rd32(obj, 0x001084) & 0x10000000; 177 if (tied == 0) { 178 u8 slA = nv_rdvgac(obj, 0, 0x28) & 0x80; 179 u8 tvA = nv_rdvgac(obj, 0, 0x33) & 0x01; 180 u8 slB = nv_rdvgac(obj, 1, 0x28) & 0x80; 181 u8 tvB = nv_rdvgac(obj, 1, 0x33) & 0x01; 182 if (slA && !tvA) return 0x00; 183 if (slB && !tvB) return 0x03; 184 if (slA) return 0x00; 185 if (slB) return 0x03; 186 return 0x00; 187 } 188 return 0x04; 189 } 190 191 return nv_rdvgac(obj, 0, 0x44); 192 } 193 194 nv_error(obj, "rdvgaowner after nv4x\n"); 195 return 0x00; 196 } 197 198 void 199 nv_wrvgaowner(void *obj, u8 select) 200 { 201 if (nv_device(obj)->card_type < NV_50) { 202 u8 owner = (select == 1) ? 3 : select; 203 if (nv_device(obj)->chipset == 0x11) { 204 /* workaround hw lockup bug */ 205 nv_rdvgac(obj, 0, 0x1f); 206 nv_rdvgac(obj, 1, 0x1f); 207 } 208 209 nv_wrvgac(obj, 0, 0x44, owner); 210 211 if (nv_device(obj)->chipset == 0x11) { 212 nv_wrvgac(obj, 0, 0x2e, owner); 213 nv_wrvgac(obj, 0, 0x2e, owner); 214 } 215 } else 216 nv_error(obj, "wrvgaowner after nv4x\n"); 217 } 218