1b7019ac5SIlia Mirkin /* SPDX-License-Identifier: MIT */ 221b13791SBen Skeggs #ifndef __NVKM_PMU_H__ 321b13791SBen Skeggs #define __NVKM_PMU_H__ 4ebb58dc2SBen Skeggs #include <core/subdev.h> 52952a2b4SBen Skeggs #include <core/falcon.h> 6ebb58dc2SBen Skeggs 721b13791SBen Skeggs struct nvkm_pmu { 8e2ca4e7dSBen Skeggs const struct nvkm_pmu_func *func; 95a7d1e22SBen Skeggs struct nvkm_subdev subdev; 102952a2b4SBen Skeggs struct nvkm_falcon falcon; 118763955bSBen Skeggs 128763955bSBen Skeggs struct nvkm_falcon_qmgr *qmgr; 13acc466abSBen Skeggs struct nvkm_falcon_cmdq *hpq; 14acc466abSBen Skeggs struct nvkm_falcon_cmdq *lpq; 1522431189SBen Skeggs struct nvkm_falcon_msgq *msgq; 16d114a139SBen Skeggs bool initmsg_received; 17ebb58dc2SBen Skeggs 182e8a6597SBen Skeggs struct completion wpr_ready; 192e8a6597SBen Skeggs 20ebb58dc2SBen Skeggs struct { 215a479d45SBen Skeggs struct mutex mutex; 22ebb58dc2SBen Skeggs u32 base; 23ebb58dc2SBen Skeggs u32 size; 24ebb58dc2SBen Skeggs } send; 25ebb58dc2SBen Skeggs 26ebb58dc2SBen Skeggs struct { 27ebb58dc2SBen Skeggs u32 base; 28ebb58dc2SBen Skeggs u32 size; 29ebb58dc2SBen Skeggs 30ebb58dc2SBen Skeggs struct work_struct work; 31ebb58dc2SBen Skeggs wait_queue_head_t wait; 32ebb58dc2SBen Skeggs u32 process; 33ebb58dc2SBen Skeggs u32 message; 34ebb58dc2SBen Skeggs u32 data[2]; 35ebb58dc2SBen Skeggs } recv; 36ebb58dc2SBen Skeggs }; 37ebb58dc2SBen Skeggs 38e2ca4e7dSBen Skeggs int nvkm_pmu_send(struct nvkm_pmu *, u32 reply[2], u32 process, 39e2ca4e7dSBen Skeggs u32 message, u32 data0, u32 data1); 40e2ca4e7dSBen Skeggs void nvkm_pmu_pgob(struct nvkm_pmu *, bool enable); 4169cbbb7bSBen Skeggs bool nvkm_pmu_fan_controlled(struct nvkm_device *); 42ebb58dc2SBen Skeggs 43*e4b15b4cSBen Skeggs int gt215_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **); 44*e4b15b4cSBen Skeggs int gf100_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **); 45*e4b15b4cSBen Skeggs int gf119_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **); 46*e4b15b4cSBen Skeggs int gk104_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **); 47*e4b15b4cSBen Skeggs int gk110_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **); 48*e4b15b4cSBen Skeggs int gk208_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **); 49*e4b15b4cSBen Skeggs int gk20a_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **); 50*e4b15b4cSBen Skeggs int gm107_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **); 51*e4b15b4cSBen Skeggs int gm200_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **); 52*e4b15b4cSBen Skeggs int gm20b_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **); 53*e4b15b4cSBen Skeggs int gp102_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **); 54*e4b15b4cSBen Skeggs int gp10b_pmu_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pmu **); 55ebb58dc2SBen Skeggs 56ebb58dc2SBen Skeggs /* interface to MEMX process running on PMU */ 5721b13791SBen Skeggs struct nvkm_memx; 5821b13791SBen Skeggs int nvkm_memx_init(struct nvkm_pmu *, struct nvkm_memx **); 5921b13791SBen Skeggs int nvkm_memx_fini(struct nvkm_memx **, bool exec); 6021b13791SBen Skeggs void nvkm_memx_wr32(struct nvkm_memx *, u32 addr, u32 data); 6121b13791SBen Skeggs void nvkm_memx_wait(struct nvkm_memx *, u32 addr, u32 mask, u32 data, u32 nsec); 6221b13791SBen Skeggs void nvkm_memx_nsec(struct nvkm_memx *, u32 nsec); 6321b13791SBen Skeggs void nvkm_memx_wait_vblank(struct nvkm_memx *); 6421b13791SBen Skeggs void nvkm_memx_train(struct nvkm_memx *); 6521b13791SBen Skeggs int nvkm_memx_train_result(struct nvkm_pmu *, u32 *, int); 6621b13791SBen Skeggs void nvkm_memx_block(struct nvkm_memx *); 6721b13791SBen Skeggs void nvkm_memx_unblock(struct nvkm_memx *); 68ebb58dc2SBen Skeggs #endif 69