1b7019ac5SIlia Mirkin /* SPDX-License-Identifier: MIT */ 20a34fb31SBen Skeggs #ifndef __NVKM_PCI_H__ 30a34fb31SBen Skeggs #define __NVKM_PCI_H__ 40a34fb31SBen Skeggs #include <core/subdev.h> 50a34fb31SBen Skeggs 6bcc19d9bSKarol Herbst enum nvkm_pcie_speed { 7bcc19d9bSKarol Herbst NVKM_PCIE_SPEED_2_5, 8bcc19d9bSKarol Herbst NVKM_PCIE_SPEED_5_0, 9bcc19d9bSKarol Herbst NVKM_PCIE_SPEED_8_0, 10bcc19d9bSKarol Herbst }; 11bcc19d9bSKarol Herbst 120a34fb31SBen Skeggs struct nvkm_pci { 130a34fb31SBen Skeggs const struct nvkm_pci_func *func; 140a34fb31SBen Skeggs struct nvkm_subdev subdev; 152b700825SBen Skeggs struct pci_dev *pdev; 16340b0e7cSBen Skeggs 17340b0e7cSBen Skeggs struct { 18340b0e7cSBen Skeggs struct agp_bridge_data *bridge; 19340b0e7cSBen Skeggs u32 mode; 20340b0e7cSBen Skeggs u64 base; 21340b0e7cSBen Skeggs u64 size; 22340b0e7cSBen Skeggs int mtrr; 23340b0e7cSBen Skeggs bool cma; 24340b0e7cSBen Skeggs bool acquired; 25340b0e7cSBen Skeggs } agp; 26340b0e7cSBen Skeggs 27bcc19d9bSKarol Herbst struct { 28bcc19d9bSKarol Herbst enum nvkm_pcie_speed speed; 29bcc19d9bSKarol Herbst u8 width; 30bcc19d9bSKarol Herbst } pcie; 31bcc19d9bSKarol Herbst 322b700825SBen Skeggs bool msi; 330a34fb31SBen Skeggs }; 340a34fb31SBen Skeggs 350a34fb31SBen Skeggs u32 nvkm_pci_rd32(struct nvkm_pci *, u16 addr); 360a34fb31SBen Skeggs void nvkm_pci_wr08(struct nvkm_pci *, u16 addr, u8 data); 370a34fb31SBen Skeggs void nvkm_pci_wr32(struct nvkm_pci *, u16 addr, u32 data); 385d5b43f5SPierre Moreau u32 nvkm_pci_mask(struct nvkm_pci *, u16 addr, u32 mask, u32 value); 390a34fb31SBen Skeggs void nvkm_pci_rom_shadow(struct nvkm_pci *, bool shadow); 40*727fd72fSBen Skeggs void nvkm_pci_msi_rearm(struct nvkm_device *); 410a34fb31SBen Skeggs 429b70cd54SBen Skeggs int nv04_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **); 439b70cd54SBen Skeggs int nv40_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **); 449b70cd54SBen Skeggs int nv46_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **); 459b70cd54SBen Skeggs int nv4c_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **); 469b70cd54SBen Skeggs int g84_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **); 479b70cd54SBen Skeggs int g92_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **); 489b70cd54SBen Skeggs int g94_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **); 499b70cd54SBen Skeggs int gf100_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **); 509b70cd54SBen Skeggs int gf106_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **); 519b70cd54SBen Skeggs int gk104_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **); 529b70cd54SBen Skeggs int gp100_pci_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pci **); 53bcc19d9bSKarol Herbst 54bcc19d9bSKarol Herbst /* pcie functions */ 55bcc19d9bSKarol Herbst int nvkm_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8 width); 560a34fb31SBen Skeggs #endif 57