11590700dSBen Skeggs #ifndef __NV50_KMS_H__ 21590700dSBen Skeggs #define __NV50_KMS_H__ 3*12885ecbSLyude Paul #include <linux/workqueue.h> 41590700dSBen Skeggs #include <nvif/mem.h> 51590700dSBen Skeggs 61590700dSBen Skeggs #include "nouveau_display.h" 71590700dSBen Skeggs 85ff0cb1cSLyude Paul struct nv50_msto; 9*12885ecbSLyude Paul struct nouveau_encoder; 105ff0cb1cSLyude Paul 111590700dSBen Skeggs struct nv50_disp { 121590700dSBen Skeggs struct nvif_disp *disp; 131590700dSBen Skeggs struct nv50_core *core; 144a2cb418SLyude Paul struct nvif_object caps; 151590700dSBen Skeggs 161590700dSBen Skeggs #define NV50_DISP_SYNC(c, o) ((c) * 0x040 + (o)) 171590700dSBen Skeggs #define NV50_DISP_CORE_NTFY NV50_DISP_SYNC(0 , 0x00) 181590700dSBen Skeggs #define NV50_DISP_WNDW_SEM0(c) NV50_DISP_SYNC(1 + (c), 0x00) 191590700dSBen Skeggs #define NV50_DISP_WNDW_SEM1(c) NV50_DISP_SYNC(1 + (c), 0x10) 201590700dSBen Skeggs #define NV50_DISP_WNDW_NTFY(c) NV50_DISP_SYNC(1 + (c), 0x20) 211590700dSBen Skeggs #define NV50_DISP_BASE_SEM0(c) NV50_DISP_WNDW_SEM0(0 + (c)) 221590700dSBen Skeggs #define NV50_DISP_BASE_SEM1(c) NV50_DISP_WNDW_SEM1(0 + (c)) 231590700dSBen Skeggs #define NV50_DISP_BASE_NTFY(c) NV50_DISP_WNDW_NTFY(0 + (c)) 242ce7f386SBen Skeggs #define NV50_DISP_OVLY_SEM0(c) NV50_DISP_WNDW_SEM0(4 + (c)) 252ce7f386SBen Skeggs #define NV50_DISP_OVLY_SEM1(c) NV50_DISP_WNDW_SEM1(4 + (c)) 262ce7f386SBen Skeggs #define NV50_DISP_OVLY_NTFY(c) NV50_DISP_WNDW_NTFY(4 + (c)) 271590700dSBen Skeggs struct nouveau_bo *sync; 281590700dSBen Skeggs 291590700dSBen Skeggs struct mutex mutex; 301590700dSBen Skeggs }; 311590700dSBen Skeggs 321590700dSBen Skeggs static inline struct nv50_disp * 331590700dSBen Skeggs nv50_disp(struct drm_device *dev) 341590700dSBen Skeggs { 351590700dSBen Skeggs return nouveau_display(dev)->priv; 361590700dSBen Skeggs } 371590700dSBen Skeggs 3853e0a3e7SBen Skeggs struct nv50_disp_interlock { 3953e0a3e7SBen Skeggs enum nv50_disp_interlock_type { 4053e0a3e7SBen Skeggs NV50_DISP_INTERLOCK_CORE = 0, 4153e0a3e7SBen Skeggs NV50_DISP_INTERLOCK_CURS, 4253e0a3e7SBen Skeggs NV50_DISP_INTERLOCK_BASE, 4353e0a3e7SBen Skeggs NV50_DISP_INTERLOCK_OVLY, 44facaed62SBen Skeggs NV50_DISP_INTERLOCK_WNDW, 45facaed62SBen Skeggs NV50_DISP_INTERLOCK_WIMM, 4653e0a3e7SBen Skeggs NV50_DISP_INTERLOCK__SIZE 4753e0a3e7SBen Skeggs } type; 4853e0a3e7SBen Skeggs u32 data; 49d2434e4dSBen Skeggs u32 wimm; 5053e0a3e7SBen Skeggs }; 5153e0a3e7SBen Skeggs 52facaed62SBen Skeggs void corec37d_ntfy_init(struct nouveau_bo *, u32); 53facaed62SBen Skeggs 54cb55cd0cSBen Skeggs void head907d_olut_load(struct drm_color_lut *, int size, void __iomem *); 55cb55cd0cSBen Skeggs 561590700dSBen Skeggs struct nv50_chan { 571590700dSBen Skeggs struct nvif_object user; 581590700dSBen Skeggs struct nvif_device *device; 591590700dSBen Skeggs }; 601590700dSBen Skeggs 611590700dSBen Skeggs struct nv50_dmac { 621590700dSBen Skeggs struct nv50_chan base; 631590700dSBen Skeggs 641590700dSBen Skeggs struct nvif_mem push; 651590700dSBen Skeggs u32 *ptr; 661590700dSBen Skeggs 671590700dSBen Skeggs struct nvif_object sync; 681590700dSBen Skeggs struct nvif_object vram; 691590700dSBen Skeggs 701590700dSBen Skeggs /* Protects against concurrent pushbuf access to this channel, lock is 711590700dSBen Skeggs * grabbed by evo_wait (if the pushbuf reservation is successful) and 721590700dSBen Skeggs * dropped again by evo_kick. */ 731590700dSBen Skeggs struct mutex lock; 741590700dSBen Skeggs }; 751590700dSBen Skeggs 76ebec8847SLyude Paul struct nv50_outp_atom { 77ebec8847SLyude Paul struct list_head head; 78ebec8847SLyude Paul 79ebec8847SLyude Paul struct drm_encoder *encoder; 80ebec8847SLyude Paul bool flush_disable; 81ebec8847SLyude Paul 82ebec8847SLyude Paul union nv50_outp_atom_mask { 83ebec8847SLyude Paul struct { 84ebec8847SLyude Paul bool ctrl:1; 85ebec8847SLyude Paul }; 86ebec8847SLyude Paul u8 mask; 87ebec8847SLyude Paul } set, clr; 88ebec8847SLyude Paul }; 89ebec8847SLyude Paul 901590700dSBen Skeggs int nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp, 911590700dSBen Skeggs const s32 *oclass, u8 head, void *data, u32 size, 921590700dSBen Skeggs u64 syncbuf, struct nv50_dmac *dmac); 931590700dSBen Skeggs void nv50_dmac_destroy(struct nv50_dmac *); 941590700dSBen Skeggs 95*12885ecbSLyude Paul /* 96*12885ecbSLyude Paul * For normal encoders this just returns the encoder. For active MST encoders, 97*12885ecbSLyude Paul * this returns the real outp that's driving displays on the topology. 98*12885ecbSLyude Paul * Inactive MST encoders return NULL, since they would have no real outp to 99*12885ecbSLyude Paul * return anyway. 100*12885ecbSLyude Paul */ 101*12885ecbSLyude Paul struct nouveau_encoder *nv50_real_outp(struct drm_encoder *encoder); 102*12885ecbSLyude Paul 1031590700dSBen Skeggs u32 *evo_wait(struct nv50_dmac *, int nr); 1041590700dSBen Skeggs void evo_kick(u32 *, struct nv50_dmac *); 1051590700dSBen Skeggs 106c586f30bSJames Jones extern const u64 disp50xx_modifiers[]; 107c586f30bSJames Jones extern const u64 disp90xx_modifiers[]; 108c586f30bSJames Jones extern const u64 wndwc57e_modifiers[]; 109c586f30bSJames Jones 1101590700dSBen Skeggs #define evo_mthd(p, m, s) do { \ 1111590700dSBen Skeggs const u32 _m = (m), _s = (s); \ 1124f632fb2SJani Nikula if (drm_debug_enabled(DRM_UT_KMS)) \ 1131590700dSBen Skeggs pr_err("%04x %d %s\n", _m, _s, __func__); \ 1141590700dSBen Skeggs *((p)++) = ((_s << 18) | _m); \ 1151590700dSBen Skeggs } while(0) 1161590700dSBen Skeggs 1171590700dSBen Skeggs #define evo_data(p, d) do { \ 1181590700dSBen Skeggs const u32 _d = (d); \ 1194f632fb2SJani Nikula if (drm_debug_enabled(DRM_UT_KMS)) \ 1201590700dSBen Skeggs pr_err("\t%08x\n", _d); \ 1211590700dSBen Skeggs *((p)++) = _d; \ 1221590700dSBen Skeggs } while(0) 1231590700dSBen Skeggs #endif 124