1*57cbdbe6SLyude Paul // SPDX-License-Identifier: MIT
2*57cbdbe6SLyude Paul
3*57cbdbe6SLyude Paul #include "crc.h"
4*57cbdbe6SLyude Paul #include "crcc37d.h"
5*57cbdbe6SLyude Paul #include "core.h"
6*57cbdbe6SLyude Paul #include "disp.h"
7*57cbdbe6SLyude Paul #include "head.h"
8*57cbdbe6SLyude Paul
9*57cbdbe6SLyude Paul #include <nvif/pushc37b.h>
10*57cbdbe6SLyude Paul
11*57cbdbe6SLyude Paul #include <nvhw/class/clc57d.h>
12*57cbdbe6SLyude Paul
crcc57d_set_src(struct nv50_head * head,int or,enum nv50_crc_source_type source,struct nv50_crc_notifier_ctx * ctx)13*57cbdbe6SLyude Paul static int crcc57d_set_src(struct nv50_head *head, int or, enum nv50_crc_source_type source,
14*57cbdbe6SLyude Paul struct nv50_crc_notifier_ctx *ctx)
15*57cbdbe6SLyude Paul {
16*57cbdbe6SLyude Paul struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
17*57cbdbe6SLyude Paul const int i = head->base.index;
18*57cbdbe6SLyude Paul u32 crc_args = NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, CORE) |
19*57cbdbe6SLyude Paul NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, EXPECT_BUFFER_COLLAPSE, FALSE) |
20*57cbdbe6SLyude Paul NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, SECONDARY_CRC, NONE) |
21*57cbdbe6SLyude Paul NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE);
22*57cbdbe6SLyude Paul int ret;
23*57cbdbe6SLyude Paul
24*57cbdbe6SLyude Paul switch (source) {
25*57cbdbe6SLyude Paul case NV50_CRC_SOURCE_TYPE_SOR:
26*57cbdbe6SLyude Paul crc_args |= NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SOR(or));
27*57cbdbe6SLyude Paul break;
28*57cbdbe6SLyude Paul case NV50_CRC_SOURCE_TYPE_SF:
29*57cbdbe6SLyude Paul crc_args |= NVDEF(NVC57D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SF);
30*57cbdbe6SLyude Paul break;
31*57cbdbe6SLyude Paul default:
32*57cbdbe6SLyude Paul break;
33*57cbdbe6SLyude Paul }
34*57cbdbe6SLyude Paul
35*57cbdbe6SLyude Paul ret = PUSH_WAIT(push, 4);
36*57cbdbe6SLyude Paul if (ret)
37*57cbdbe6SLyude Paul return ret;
38*57cbdbe6SLyude Paul
39*57cbdbe6SLyude Paul if (source) {
40*57cbdbe6SLyude Paul PUSH_MTHD(push, NVC57D, HEAD_SET_CONTEXT_DMA_CRC(i), ctx->ntfy.handle);
41*57cbdbe6SLyude Paul PUSH_MTHD(push, NVC57D, HEAD_SET_CRC_CONTROL(i), crc_args);
42*57cbdbe6SLyude Paul } else {
43*57cbdbe6SLyude Paul PUSH_MTHD(push, NVC57D, HEAD_SET_CRC_CONTROL(i), 0);
44*57cbdbe6SLyude Paul PUSH_MTHD(push, NVC57D, HEAD_SET_CONTEXT_DMA_CRC(i), 0);
45*57cbdbe6SLyude Paul }
46*57cbdbe6SLyude Paul
47*57cbdbe6SLyude Paul return 0;
48*57cbdbe6SLyude Paul }
49*57cbdbe6SLyude Paul
50*57cbdbe6SLyude Paul const struct nv50_crc_func crcc57d = {
51*57cbdbe6SLyude Paul .set_src = crcc57d_set_src,
52*57cbdbe6SLyude Paul .set_ctx = crcc37d_set_ctx,
53*57cbdbe6SLyude Paul .get_entry = crcc37d_get_entry,
54*57cbdbe6SLyude Paul .ctx_finished = crcc37d_ctx_finished,
55*57cbdbe6SLyude Paul .flip_threshold = CRCC37D_FLIP_THRESHOLD,
56*57cbdbe6SLyude Paul .num_entries = CRCC37D_MAX_ENTRIES,
57*57cbdbe6SLyude Paul .notifier_len = sizeof(struct crcc37d_notifier),
58*57cbdbe6SLyude Paul };
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