xref: /openbmc/linux/drivers/gpu/drm/msm/msm_iommu.c (revision 52da6d513183cf543df6efc95bf504aee0da70d6)
1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2871d812aSRob Clark /*
3871d812aSRob Clark  * Copyright (C) 2013 Red Hat
4871d812aSRob Clark  * Author: Rob Clark <robdclark@gmail.com>
5871d812aSRob Clark  */
6871d812aSRob Clark 
7871d812aSRob Clark #include "msm_drv.h"
8871d812aSRob Clark #include "msm_mmu.h"
9871d812aSRob Clark 
10871d812aSRob Clark struct msm_iommu {
11871d812aSRob Clark 	struct msm_mmu base;
12871d812aSRob Clark 	struct iommu_domain *domain;
13871d812aSRob Clark };
14871d812aSRob Clark #define to_msm_iommu(x) container_of(x, struct msm_iommu, base)
15871d812aSRob Clark 
167f8036b7SRob Clark static int msm_fault_handler(struct iommu_domain *domain, struct device *dev,
17871d812aSRob Clark 		unsigned long iova, int flags, void *arg)
18871d812aSRob Clark {
197f8036b7SRob Clark 	struct msm_iommu *iommu = arg;
207f8036b7SRob Clark 	if (iommu->base.handler)
217f8036b7SRob Clark 		return iommu->base.handler(iommu->base.arg, iova, flags);
22bdad5c53SJordan Crouse 	pr_warn_ratelimited("*** fault: iova=%16lx, flags=%d\n", iova, flags);
236814dbf9SRob Clark 	return 0;
24871d812aSRob Clark }
25871d812aSRob Clark 
2653bf7f7aSDrew Davenport static void msm_iommu_detach(struct msm_mmu *mmu)
2787e956e9SStephane Viau {
2887e956e9SStephane Viau 	struct msm_iommu *iommu = to_msm_iommu(mmu);
29cc692726SRob Clark 
30944fc36cSRob Clark 	iommu_detach_device(iommu->domain, mmu->dev);
3187e956e9SStephane Viau }
3287e956e9SStephane Viau 
3378babc16SRob Clark static int msm_iommu_map(struct msm_mmu *mmu, uint64_t iova,
34871d812aSRob Clark 		struct sg_table *sgt, unsigned len, int prot)
35871d812aSRob Clark {
36871d812aSRob Clark 	struct msm_iommu *iommu = to_msm_iommu(mmu);
37f9000049SRob Clark 	size_t ret;
38871d812aSRob Clark 
39f9000049SRob Clark 	ret = iommu_map_sg(iommu->domain, iova, sgt->sgl, sgt->nents, prot);
40098336deSWen Yang 	WARN_ON(!ret);
41871d812aSRob Clark 
42f9000049SRob Clark 	return (ret == len) ? 0 : -EINVAL;
43871d812aSRob Clark }
44871d812aSRob Clark 
4570dc51b4SJordan Crouse static int msm_iommu_unmap(struct msm_mmu *mmu, uint64_t iova, unsigned len)
46871d812aSRob Clark {
47871d812aSRob Clark 	struct msm_iommu *iommu = to_msm_iommu(mmu);
48871d812aSRob Clark 
49f9000049SRob Clark 	iommu_unmap(iommu->domain, iova, len);
50871d812aSRob Clark 
51871d812aSRob Clark 	return 0;
52871d812aSRob Clark }
53871d812aSRob Clark 
54871d812aSRob Clark static void msm_iommu_destroy(struct msm_mmu *mmu)
55871d812aSRob Clark {
56871d812aSRob Clark 	struct msm_iommu *iommu = to_msm_iommu(mmu);
57871d812aSRob Clark 	iommu_domain_free(iommu->domain);
58871d812aSRob Clark 	kfree(iommu);
59871d812aSRob Clark }
60871d812aSRob Clark 
61871d812aSRob Clark static const struct msm_mmu_funcs funcs = {
6287e956e9SStephane Viau 		.detach = msm_iommu_detach,
63871d812aSRob Clark 		.map = msm_iommu_map,
64871d812aSRob Clark 		.unmap = msm_iommu_unmap,
65871d812aSRob Clark 		.destroy = msm_iommu_destroy,
66871d812aSRob Clark };
67871d812aSRob Clark 
68944fc36cSRob Clark struct msm_mmu *msm_iommu_new(struct device *dev, struct iommu_domain *domain)
69871d812aSRob Clark {
70871d812aSRob Clark 	struct msm_iommu *iommu;
71*52da6d51SJordan Crouse 	int ret;
72871d812aSRob Clark 
73871d812aSRob Clark 	iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
74871d812aSRob Clark 	if (!iommu)
75871d812aSRob Clark 		return ERR_PTR(-ENOMEM);
76871d812aSRob Clark 
77871d812aSRob Clark 	iommu->domain = domain;
78871d812aSRob Clark 	msm_mmu_init(&iommu->base, dev, &funcs);
797f8036b7SRob Clark 	iommu_set_fault_handler(domain, msm_fault_handler, iommu);
80871d812aSRob Clark 
81*52da6d51SJordan Crouse 	ret = iommu_attach_device(iommu->domain, dev);
82*52da6d51SJordan Crouse 	if (ret) {
83*52da6d51SJordan Crouse 		kfree(iommu);
84*52da6d51SJordan Crouse 		return ERR_PTR(ret);
85*52da6d51SJordan Crouse 	}
86*52da6d51SJordan Crouse 
87871d812aSRob Clark 	return &iommu->base;
88871d812aSRob Clark }
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