1*d934a712SRob Clark /* SPDX-License-Identifier: GPL-2.0 */ 2*d934a712SRob Clark #if !defined(_MSM_GPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) 3*d934a712SRob Clark #define _MSM_GPU_TRACE_H_ 4*d934a712SRob Clark 5*d934a712SRob Clark #include <linux/tracepoint.h> 6*d934a712SRob Clark 7*d934a712SRob Clark #undef TRACE_SYSTEM 8*d934a712SRob Clark #define TRACE_SYSTEM drm_msm_atomic 9*d934a712SRob Clark #define TRACE_INCLUDE_FILE msm_atomic_trace 10*d934a712SRob Clark 11*d934a712SRob Clark TRACE_EVENT(msm_atomic_commit_tail_start, 12*d934a712SRob Clark TP_PROTO(bool async, unsigned crtc_mask), 13*d934a712SRob Clark TP_ARGS(async, crtc_mask), 14*d934a712SRob Clark TP_STRUCT__entry( 15*d934a712SRob Clark __field(bool, async) 16*d934a712SRob Clark __field(u32, crtc_mask) 17*d934a712SRob Clark ), 18*d934a712SRob Clark TP_fast_assign( 19*d934a712SRob Clark __entry->async = async; 20*d934a712SRob Clark __entry->crtc_mask = crtc_mask; 21*d934a712SRob Clark ), 22*d934a712SRob Clark TP_printk("async=%d crtc_mask=%x", 23*d934a712SRob Clark __entry->async, __entry->crtc_mask) 24*d934a712SRob Clark ); 25*d934a712SRob Clark 26*d934a712SRob Clark TRACE_EVENT(msm_atomic_commit_tail_finish, 27*d934a712SRob Clark TP_PROTO(bool async, unsigned crtc_mask), 28*d934a712SRob Clark TP_ARGS(async, crtc_mask), 29*d934a712SRob Clark TP_STRUCT__entry( 30*d934a712SRob Clark __field(bool, async) 31*d934a712SRob Clark __field(u32, crtc_mask) 32*d934a712SRob Clark ), 33*d934a712SRob Clark TP_fast_assign( 34*d934a712SRob Clark __entry->async = async; 35*d934a712SRob Clark __entry->crtc_mask = crtc_mask; 36*d934a712SRob Clark ), 37*d934a712SRob Clark TP_printk("async=%d crtc_mask=%x", 38*d934a712SRob Clark __entry->async, __entry->crtc_mask) 39*d934a712SRob Clark ); 40*d934a712SRob Clark 41*d934a712SRob Clark TRACE_EVENT(msm_atomic_async_commit_start, 42*d934a712SRob Clark TP_PROTO(unsigned crtc_mask), 43*d934a712SRob Clark TP_ARGS(crtc_mask), 44*d934a712SRob Clark TP_STRUCT__entry( 45*d934a712SRob Clark __field(u32, crtc_mask) 46*d934a712SRob Clark ), 47*d934a712SRob Clark TP_fast_assign( 48*d934a712SRob Clark __entry->crtc_mask = crtc_mask; 49*d934a712SRob Clark ), 50*d934a712SRob Clark TP_printk("crtc_mask=%x", 51*d934a712SRob Clark __entry->crtc_mask) 52*d934a712SRob Clark ); 53*d934a712SRob Clark 54*d934a712SRob Clark TRACE_EVENT(msm_atomic_async_commit_finish, 55*d934a712SRob Clark TP_PROTO(unsigned crtc_mask), 56*d934a712SRob Clark TP_ARGS(crtc_mask), 57*d934a712SRob Clark TP_STRUCT__entry( 58*d934a712SRob Clark __field(u32, crtc_mask) 59*d934a712SRob Clark ), 60*d934a712SRob Clark TP_fast_assign( 61*d934a712SRob Clark __entry->crtc_mask = crtc_mask; 62*d934a712SRob Clark ), 63*d934a712SRob Clark TP_printk("crtc_mask=%x", 64*d934a712SRob Clark __entry->crtc_mask) 65*d934a712SRob Clark ); 66*d934a712SRob Clark 67*d934a712SRob Clark TRACE_EVENT(msm_atomic_wait_flush_start, 68*d934a712SRob Clark TP_PROTO(unsigned crtc_mask), 69*d934a712SRob Clark TP_ARGS(crtc_mask), 70*d934a712SRob Clark TP_STRUCT__entry( 71*d934a712SRob Clark __field(u32, crtc_mask) 72*d934a712SRob Clark ), 73*d934a712SRob Clark TP_fast_assign( 74*d934a712SRob Clark __entry->crtc_mask = crtc_mask; 75*d934a712SRob Clark ), 76*d934a712SRob Clark TP_printk("crtc_mask=%x", 77*d934a712SRob Clark __entry->crtc_mask) 78*d934a712SRob Clark ); 79*d934a712SRob Clark 80*d934a712SRob Clark TRACE_EVENT(msm_atomic_wait_flush_finish, 81*d934a712SRob Clark TP_PROTO(unsigned crtc_mask), 82*d934a712SRob Clark TP_ARGS(crtc_mask), 83*d934a712SRob Clark TP_STRUCT__entry( 84*d934a712SRob Clark __field(u32, crtc_mask) 85*d934a712SRob Clark ), 86*d934a712SRob Clark TP_fast_assign( 87*d934a712SRob Clark __entry->crtc_mask = crtc_mask; 88*d934a712SRob Clark ), 89*d934a712SRob Clark TP_printk("crtc_mask=%x", 90*d934a712SRob Clark __entry->crtc_mask) 91*d934a712SRob Clark ); 92*d934a712SRob Clark 93*d934a712SRob Clark TRACE_EVENT(msm_atomic_flush_commit, 94*d934a712SRob Clark TP_PROTO(unsigned crtc_mask), 95*d934a712SRob Clark TP_ARGS(crtc_mask), 96*d934a712SRob Clark TP_STRUCT__entry( 97*d934a712SRob Clark __field(u32, crtc_mask) 98*d934a712SRob Clark ), 99*d934a712SRob Clark TP_fast_assign( 100*d934a712SRob Clark __entry->crtc_mask = crtc_mask; 101*d934a712SRob Clark ), 102*d934a712SRob Clark TP_printk("crtc_mask=%x", 103*d934a712SRob Clark __entry->crtc_mask) 104*d934a712SRob Clark ); 105*d934a712SRob Clark 106*d934a712SRob Clark #endif 107*d934a712SRob Clark 108*d934a712SRob Clark #undef TRACE_INCLUDE_PATH 109*d934a712SRob Clark #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/msm 110*d934a712SRob Clark #include <trace/define_trace.h> 111