xref: /openbmc/linux/drivers/gpu/drm/msm/msm_atomic.c (revision f86afecf0defbc8d046bc7a7c5fc19a8c9ba1364)
1cf3a7e4cSRob Clark /*
2cf3a7e4cSRob Clark  * Copyright (C) 2014 Red Hat
3cf3a7e4cSRob Clark  * Author: Rob Clark <robdclark@gmail.com>
4cf3a7e4cSRob Clark  *
5cf3a7e4cSRob Clark  * This program is free software; you can redistribute it and/or modify it
6cf3a7e4cSRob Clark  * under the terms of the GNU General Public License version 2 as published by
7cf3a7e4cSRob Clark  * the Free Software Foundation.
8cf3a7e4cSRob Clark  *
9cf3a7e4cSRob Clark  * This program is distributed in the hope that it will be useful, but WITHOUT
10cf3a7e4cSRob Clark  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11cf3a7e4cSRob Clark  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12cf3a7e4cSRob Clark  * more details.
13cf3a7e4cSRob Clark  *
14cf3a7e4cSRob Clark  * You should have received a copy of the GNU General Public License along with
15cf3a7e4cSRob Clark  * this program.  If not, see <http://www.gnu.org/licenses/>.
16cf3a7e4cSRob Clark  */
17cf3a7e4cSRob Clark 
18cf3a7e4cSRob Clark #include "msm_drv.h"
19cf3a7e4cSRob Clark #include "msm_kms.h"
20cf3a7e4cSRob Clark #include "msm_gem.h"
21cf3a7e4cSRob Clark 
22cf3a7e4cSRob Clark struct msm_commit {
23cf3a7e4cSRob Clark 	struct drm_atomic_state *state;
24cf3a7e4cSRob Clark 	uint32_t fence;
25cf3a7e4cSRob Clark 	struct msm_fence_cb fence_cb;
26*f86afecfSRob Clark 	uint32_t crtc_mask;
27cf3a7e4cSRob Clark };
28cf3a7e4cSRob Clark 
29cf3a7e4cSRob Clark static void fence_cb(struct msm_fence_cb *cb);
30cf3a7e4cSRob Clark 
31*f86afecfSRob Clark /* block until specified crtcs are no longer pending update, and
32*f86afecfSRob Clark  * atomically mark them as pending update
33*f86afecfSRob Clark  */
34*f86afecfSRob Clark static int start_atomic(struct msm_drm_private *priv, uint32_t crtc_mask)
35*f86afecfSRob Clark {
36*f86afecfSRob Clark 	int ret;
37*f86afecfSRob Clark 
38*f86afecfSRob Clark 	spin_lock(&priv->pending_crtcs_event.lock);
39*f86afecfSRob Clark 	ret = wait_event_interruptible_locked(priv->pending_crtcs_event,
40*f86afecfSRob Clark 			!(priv->pending_crtcs & crtc_mask));
41*f86afecfSRob Clark 	if (ret == 0) {
42*f86afecfSRob Clark 		DBG("start: %08x", crtc_mask);
43*f86afecfSRob Clark 		priv->pending_crtcs |= crtc_mask;
44*f86afecfSRob Clark 	}
45*f86afecfSRob Clark 	spin_unlock(&priv->pending_crtcs_event.lock);
46*f86afecfSRob Clark 
47*f86afecfSRob Clark 	return ret;
48*f86afecfSRob Clark }
49*f86afecfSRob Clark 
50*f86afecfSRob Clark /* clear specified crtcs (no longer pending update)
51*f86afecfSRob Clark  */
52*f86afecfSRob Clark static void end_atomic(struct msm_drm_private *priv, uint32_t crtc_mask)
53*f86afecfSRob Clark {
54*f86afecfSRob Clark 	spin_lock(&priv->pending_crtcs_event.lock);
55*f86afecfSRob Clark 	DBG("end: %08x", crtc_mask);
56*f86afecfSRob Clark 	priv->pending_crtcs &= ~crtc_mask;
57*f86afecfSRob Clark 	wake_up_all_locked(&priv->pending_crtcs_event);
58*f86afecfSRob Clark 	spin_unlock(&priv->pending_crtcs_event.lock);
59*f86afecfSRob Clark }
60*f86afecfSRob Clark 
61cf3a7e4cSRob Clark static struct msm_commit *new_commit(struct drm_atomic_state *state)
62cf3a7e4cSRob Clark {
63cf3a7e4cSRob Clark 	struct msm_commit *c = kzalloc(sizeof(*c), GFP_KERNEL);
64cf3a7e4cSRob Clark 
65cf3a7e4cSRob Clark 	if (!c)
66cf3a7e4cSRob Clark 		return NULL;
67cf3a7e4cSRob Clark 
68cf3a7e4cSRob Clark 	c->state = state;
69cf3a7e4cSRob Clark 	/* TODO we might need a way to indicate to run the cb on a
70cf3a7e4cSRob Clark 	 * different wq so wait_for_vblanks() doesn't block retiring
71cf3a7e4cSRob Clark 	 * bo's..
72cf3a7e4cSRob Clark 	 */
73cf3a7e4cSRob Clark 	INIT_FENCE_CB(&c->fence_cb, fence_cb);
74cf3a7e4cSRob Clark 
75cf3a7e4cSRob Clark 	return c;
76cf3a7e4cSRob Clark }
77cf3a7e4cSRob Clark 
78cf3a7e4cSRob Clark /* The (potentially) asynchronous part of the commit.  At this point
79cf3a7e4cSRob Clark  * nothing can fail short of armageddon.
80cf3a7e4cSRob Clark  */
81cf3a7e4cSRob Clark static void complete_commit(struct msm_commit *c)
82cf3a7e4cSRob Clark {
83cf3a7e4cSRob Clark 	struct drm_atomic_state *state = c->state;
84cf3a7e4cSRob Clark 	struct drm_device *dev = state->dev;
85cf3a7e4cSRob Clark 
86cf3a7e4cSRob Clark 	drm_atomic_helper_commit_pre_planes(dev, state);
87cf3a7e4cSRob Clark 
88cf3a7e4cSRob Clark 	drm_atomic_helper_commit_planes(dev, state);
89cf3a7e4cSRob Clark 
90cf3a7e4cSRob Clark 	drm_atomic_helper_commit_post_planes(dev, state);
91cf3a7e4cSRob Clark 
92*f86afecfSRob Clark 	/* NOTE: _wait_for_vblanks() only waits for vblank on
93*f86afecfSRob Clark 	 * enabled CRTCs.  So we end up faulting when disabling
94*f86afecfSRob Clark 	 * due to (potentially) unref'ing the outgoing fb's
95*f86afecfSRob Clark 	 * before the vblank when the disable has latched.
96*f86afecfSRob Clark 	 *
97*f86afecfSRob Clark 	 * But if it did wait on disabled (or newly disabled)
98*f86afecfSRob Clark 	 * CRTCs, that would be racy (ie. we could have missed
99*f86afecfSRob Clark 	 * the irq.  We need some way to poll for pipe shut
100*f86afecfSRob Clark 	 * down.  Or just live with occasionally hitting the
101*f86afecfSRob Clark 	 * timeout in the CRTC disable path (which really should
102*f86afecfSRob Clark 	 * not be critical path)
103*f86afecfSRob Clark 	 */
104*f86afecfSRob Clark 
105cf3a7e4cSRob Clark 	drm_atomic_helper_wait_for_vblanks(dev, state);
106cf3a7e4cSRob Clark 
107cf3a7e4cSRob Clark 	drm_atomic_helper_cleanup_planes(dev, state);
108cf3a7e4cSRob Clark 
109cf3a7e4cSRob Clark 	drm_atomic_state_free(state);
110cf3a7e4cSRob Clark 
111*f86afecfSRob Clark 	end_atomic(dev->dev_private, c->crtc_mask);
112*f86afecfSRob Clark 
113cf3a7e4cSRob Clark 	kfree(c);
114cf3a7e4cSRob Clark }
115cf3a7e4cSRob Clark 
116cf3a7e4cSRob Clark static void fence_cb(struct msm_fence_cb *cb)
117cf3a7e4cSRob Clark {
118cf3a7e4cSRob Clark 	struct msm_commit *c =
119cf3a7e4cSRob Clark 			container_of(cb, struct msm_commit, fence_cb);
120cf3a7e4cSRob Clark 	complete_commit(c);
121cf3a7e4cSRob Clark }
122cf3a7e4cSRob Clark 
123cf3a7e4cSRob Clark static void add_fb(struct msm_commit *c, struct drm_framebuffer *fb)
124cf3a7e4cSRob Clark {
125cf3a7e4cSRob Clark 	struct drm_gem_object *obj = msm_framebuffer_bo(fb, 0);
126cf3a7e4cSRob Clark 	c->fence = max(c->fence, msm_gem_fence(to_msm_bo(obj), MSM_PREP_READ));
127cf3a7e4cSRob Clark }
128cf3a7e4cSRob Clark 
129cf3a7e4cSRob Clark 
130cf3a7e4cSRob Clark /**
131cf3a7e4cSRob Clark  * drm_atomic_helper_commit - commit validated state object
132cf3a7e4cSRob Clark  * @dev: DRM device
133cf3a7e4cSRob Clark  * @state: the driver state object
134cf3a7e4cSRob Clark  * @async: asynchronous commit
135cf3a7e4cSRob Clark  *
136cf3a7e4cSRob Clark  * This function commits a with drm_atomic_helper_check() pre-validated state
137cf3a7e4cSRob Clark  * object. This can still fail when e.g. the framebuffer reservation fails. For
138cf3a7e4cSRob Clark  * now this doesn't implement asynchronous commits.
139cf3a7e4cSRob Clark  *
140cf3a7e4cSRob Clark  * RETURNS
141cf3a7e4cSRob Clark  * Zero for success or -errno.
142cf3a7e4cSRob Clark  */
143cf3a7e4cSRob Clark int msm_atomic_commit(struct drm_device *dev,
144cf3a7e4cSRob Clark 		struct drm_atomic_state *state, bool async)
145cf3a7e4cSRob Clark {
146cf3a7e4cSRob Clark 	int nplanes = dev->mode_config.num_total_plane;
147*f86afecfSRob Clark 	int ncrtcs = dev->mode_config.num_crtc;
148*f86afecfSRob Clark 	struct msm_commit *c;
149cf3a7e4cSRob Clark 	int i, ret;
150cf3a7e4cSRob Clark 
151cf3a7e4cSRob Clark 	ret = drm_atomic_helper_prepare_planes(dev, state);
152cf3a7e4cSRob Clark 	if (ret)
153cf3a7e4cSRob Clark 		return ret;
154cf3a7e4cSRob Clark 
155cf3a7e4cSRob Clark 	c = new_commit(state);
156*f86afecfSRob Clark 	if (!c)
157*f86afecfSRob Clark 		return -ENOMEM;
158*f86afecfSRob Clark 
159*f86afecfSRob Clark 	/*
160*f86afecfSRob Clark 	 * Figure out what crtcs we have:
161*f86afecfSRob Clark 	 */
162*f86afecfSRob Clark 	for (i = 0; i < ncrtcs; i++) {
163*f86afecfSRob Clark 		struct drm_crtc *crtc = state->crtcs[i];
164*f86afecfSRob Clark 		if (!crtc)
165*f86afecfSRob Clark 			continue;
166*f86afecfSRob Clark 		c->crtc_mask |= (1 << drm_crtc_index(crtc));
167*f86afecfSRob Clark 	}
168cf3a7e4cSRob Clark 
169cf3a7e4cSRob Clark 	/*
170cf3a7e4cSRob Clark 	 * Figure out what fence to wait for:
171cf3a7e4cSRob Clark 	 */
172cf3a7e4cSRob Clark 	for (i = 0; i < nplanes; i++) {
173cf3a7e4cSRob Clark 		struct drm_plane *plane = state->planes[i];
174cf3a7e4cSRob Clark 		struct drm_plane_state *new_state = state->plane_states[i];
175cf3a7e4cSRob Clark 
176cf3a7e4cSRob Clark 		if (!plane)
177cf3a7e4cSRob Clark 			continue;
178cf3a7e4cSRob Clark 
1793e2f29e4SRob Clark 		if ((plane->state->fb != new_state->fb) && new_state->fb)
180cf3a7e4cSRob Clark 			add_fb(c, new_state->fb);
181cf3a7e4cSRob Clark 	}
182cf3a7e4cSRob Clark 
183cf3a7e4cSRob Clark 	/*
184*f86afecfSRob Clark 	 * Wait for pending updates on any of the same crtc's and then
185*f86afecfSRob Clark 	 * mark our set of crtc's as busy:
186*f86afecfSRob Clark 	 */
187*f86afecfSRob Clark 	ret = start_atomic(dev->dev_private, c->crtc_mask);
188*f86afecfSRob Clark 	if (ret)
189*f86afecfSRob Clark 		return ret;
190*f86afecfSRob Clark 
191*f86afecfSRob Clark 	/*
192cf3a7e4cSRob Clark 	 * This is the point of no return - everything below never fails except
193cf3a7e4cSRob Clark 	 * when the hw goes bonghits. Which means we can commit the new state on
194cf3a7e4cSRob Clark 	 * the software side now.
195cf3a7e4cSRob Clark 	 */
196cf3a7e4cSRob Clark 
197cf3a7e4cSRob Clark 	drm_atomic_helper_swap_state(dev, state);
198cf3a7e4cSRob Clark 
199cf3a7e4cSRob Clark 	/*
200cf3a7e4cSRob Clark 	 * Everything below can be run asynchronously without the need to grab
201cf3a7e4cSRob Clark 	 * any modeset locks at all under one conditions: It must be guaranteed
202cf3a7e4cSRob Clark 	 * that the asynchronous work has either been cancelled (if the driver
203cf3a7e4cSRob Clark 	 * supports it, which at least requires that the framebuffers get
204cf3a7e4cSRob Clark 	 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
205cf3a7e4cSRob Clark 	 * before the new state gets committed on the software side with
206cf3a7e4cSRob Clark 	 * drm_atomic_helper_swap_state().
207cf3a7e4cSRob Clark 	 *
208cf3a7e4cSRob Clark 	 * This scheme allows new atomic state updates to be prepared and
209cf3a7e4cSRob Clark 	 * checked in parallel to the asynchronous completion of the previous
210cf3a7e4cSRob Clark 	 * update. Which is important since compositors need to figure out the
211cf3a7e4cSRob Clark 	 * composition of the next frame right after having submitted the
212cf3a7e4cSRob Clark 	 * current layout.
213cf3a7e4cSRob Clark 	 */
214cf3a7e4cSRob Clark 
215cf3a7e4cSRob Clark 	if (async) {
216cf3a7e4cSRob Clark 		msm_queue_fence_cb(dev, &c->fence_cb, c->fence);
217cf3a7e4cSRob Clark 		return 0;
218cf3a7e4cSRob Clark 	}
219cf3a7e4cSRob Clark 
220cf3a7e4cSRob Clark 	ret = msm_wait_fence_interruptable(dev, c->fence, NULL);
221cf3a7e4cSRob Clark 	if (ret) {
222cf3a7e4cSRob Clark 		WARN_ON(ret);  // TODO unswap state back?  or??
223cf3a7e4cSRob Clark 		kfree(c);
224cf3a7e4cSRob Clark 		return ret;
225cf3a7e4cSRob Clark 	}
226cf3a7e4cSRob Clark 
227cf3a7e4cSRob Clark 	complete_commit(c);
228cf3a7e4cSRob Clark 
229cf3a7e4cSRob Clark 	return 0;
230cf3a7e4cSRob Clark }
231