xref: /openbmc/linux/drivers/gpu/drm/msm/msm_atomic.c (revision 43906812eaab06423f56af5cca9a9fcdbb4ac454)
1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2cf3a7e4cSRob Clark /*
3cf3a7e4cSRob Clark  * Copyright (C) 2014 Red Hat
4cf3a7e4cSRob Clark  * Author: Rob Clark <robdclark@gmail.com>
5cf3a7e4cSRob Clark  */
6cf3a7e4cSRob Clark 
772fdb40cSDaniel Vetter #include <drm/drm_atomic_uapi.h>
8e78ad765SDaniel Vetter #include <drm/drm_gem_framebuffer_helper.h>
9feea39a8SSam Ravnborg #include <drm/drm_vblank.h>
1072fdb40cSDaniel Vetter 
11d934a712SRob Clark #include "msm_atomic_trace.h"
12cf3a7e4cSRob Clark #include "msm_drv.h"
13db8f4d5dSSean Paul #include "msm_gem.h"
14cf3a7e4cSRob Clark #include "msm_kms.h"
15cf3a7e4cSRob Clark 
16db8f4d5dSSean Paul int msm_atomic_prepare_fb(struct drm_plane *plane,
17db8f4d5dSSean Paul 			  struct drm_plane_state *new_state)
18db8f4d5dSSean Paul {
19db8f4d5dSSean Paul 	struct msm_drm_private *priv = plane->dev->dev_private;
20db8f4d5dSSean Paul 	struct msm_kms *kms = priv->kms;
21db8f4d5dSSean Paul 
22db8f4d5dSSean Paul 	if (!new_state->fb)
23db8f4d5dSSean Paul 		return 0;
24db8f4d5dSSean Paul 
25e78ad765SDaniel Vetter 	drm_gem_fb_prepare_fb(plane, new_state);
26db8f4d5dSSean Paul 
27db8f4d5dSSean Paul 	return msm_framebuffer_prepare(new_state->fb, kms->aspace);
28db8f4d5dSSean Paul }
29db8f4d5dSSean Paul 
30*43906812SRob Clark /*
31*43906812SRob Clark  * Helpers to control vblanks while we flush.. basically just to ensure
32*43906812SRob Clark  * that vblank accounting is switched on, so we get valid seqn/timestamp
33*43906812SRob Clark  * on pageflip events (if requested)
34*43906812SRob Clark  */
35*43906812SRob Clark 
36*43906812SRob Clark static void vblank_get(struct msm_kms *kms, unsigned crtc_mask)
37*43906812SRob Clark {
38*43906812SRob Clark 	struct drm_crtc *crtc;
39*43906812SRob Clark 
40*43906812SRob Clark 	for_each_crtc_mask(kms->dev, crtc, crtc_mask) {
41*43906812SRob Clark 		if (!crtc->state->active)
42*43906812SRob Clark 			continue;
43*43906812SRob Clark 		drm_crtc_vblank_get(crtc);
44*43906812SRob Clark 	}
45*43906812SRob Clark }
46*43906812SRob Clark 
47*43906812SRob Clark static void vblank_put(struct msm_kms *kms, unsigned crtc_mask)
48*43906812SRob Clark {
49*43906812SRob Clark 	struct drm_crtc *crtc;
50*43906812SRob Clark 
51*43906812SRob Clark 	for_each_crtc_mask(kms->dev, crtc, crtc_mask) {
52*43906812SRob Clark 		if (!crtc->state->active)
53*43906812SRob Clark 			continue;
54*43906812SRob Clark 		drm_crtc_vblank_put(crtc);
55*43906812SRob Clark 	}
56*43906812SRob Clark }
57*43906812SRob Clark 
582d99ced7SRob Clark static void msm_atomic_async_commit(struct msm_kms *kms, int crtc_idx)
592d99ced7SRob Clark {
602d99ced7SRob Clark 	unsigned crtc_mask = BIT(crtc_idx);
612d99ced7SRob Clark 
62d934a712SRob Clark 	trace_msm_atomic_async_commit_start(crtc_mask);
63d934a712SRob Clark 
642d99ced7SRob Clark 	mutex_lock(&kms->commit_lock);
652d99ced7SRob Clark 
662d99ced7SRob Clark 	if (!(kms->pending_crtc_mask & crtc_mask)) {
672d99ced7SRob Clark 		mutex_unlock(&kms->commit_lock);
68d934a712SRob Clark 		goto out;
692d99ced7SRob Clark 	}
702d99ced7SRob Clark 
712d99ced7SRob Clark 	kms->pending_crtc_mask &= ~crtc_mask;
722d99ced7SRob Clark 
732d99ced7SRob Clark 	kms->funcs->enable_commit(kms);
742d99ced7SRob Clark 
75*43906812SRob Clark 	vblank_get(kms, crtc_mask);
76*43906812SRob Clark 
772d99ced7SRob Clark 	/*
782d99ced7SRob Clark 	 * Flush hardware updates:
792d99ced7SRob Clark 	 */
80d934a712SRob Clark 	trace_msm_atomic_flush_commit(crtc_mask);
812d99ced7SRob Clark 	kms->funcs->flush_commit(kms, crtc_mask);
822d99ced7SRob Clark 	mutex_unlock(&kms->commit_lock);
832d99ced7SRob Clark 
842d99ced7SRob Clark 	/*
852d99ced7SRob Clark 	 * Wait for flush to complete:
862d99ced7SRob Clark 	 */
87d934a712SRob Clark 	trace_msm_atomic_wait_flush_start(crtc_mask);
882d99ced7SRob Clark 	kms->funcs->wait_flush(kms, crtc_mask);
89d934a712SRob Clark 	trace_msm_atomic_wait_flush_finish(crtc_mask);
902d99ced7SRob Clark 
91*43906812SRob Clark 	vblank_put(kms, crtc_mask);
92*43906812SRob Clark 
932d99ced7SRob Clark 	mutex_lock(&kms->commit_lock);
942d99ced7SRob Clark 	kms->funcs->complete_commit(kms, crtc_mask);
952d99ced7SRob Clark 	mutex_unlock(&kms->commit_lock);
962d99ced7SRob Clark 	kms->funcs->disable_commit(kms);
97d934a712SRob Clark 
98d934a712SRob Clark out:
99d934a712SRob Clark 	trace_msm_atomic_async_commit_finish(crtc_mask);
1002d99ced7SRob Clark }
1012d99ced7SRob Clark 
1022d99ced7SRob Clark static enum hrtimer_restart msm_atomic_pending_timer(struct hrtimer *t)
1032d99ced7SRob Clark {
1042d99ced7SRob Clark 	struct msm_pending_timer *timer = container_of(t,
1052d99ced7SRob Clark 			struct msm_pending_timer, timer);
1062d99ced7SRob Clark 	struct msm_drm_private *priv = timer->kms->dev->dev_private;
1072d99ced7SRob Clark 
1082d99ced7SRob Clark 	queue_work(priv->wq, &timer->work);
1092d99ced7SRob Clark 
1102d99ced7SRob Clark 	return HRTIMER_NORESTART;
1112d99ced7SRob Clark }
1122d99ced7SRob Clark 
1132d99ced7SRob Clark static void msm_atomic_pending_work(struct work_struct *work)
1142d99ced7SRob Clark {
1152d99ced7SRob Clark 	struct msm_pending_timer *timer = container_of(work,
1162d99ced7SRob Clark 			struct msm_pending_timer, work);
1172d99ced7SRob Clark 
1182d99ced7SRob Clark 	msm_atomic_async_commit(timer->kms, timer->crtc_idx);
1192d99ced7SRob Clark }
1202d99ced7SRob Clark 
1212d99ced7SRob Clark void msm_atomic_init_pending_timer(struct msm_pending_timer *timer,
1222d99ced7SRob Clark 		struct msm_kms *kms, int crtc_idx)
1232d99ced7SRob Clark {
1242d99ced7SRob Clark 	timer->kms = kms;
1252d99ced7SRob Clark 	timer->crtc_idx = crtc_idx;
1262d99ced7SRob Clark 	hrtimer_init(&timer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
1272d99ced7SRob Clark 	timer->timer.function = msm_atomic_pending_timer;
1282d99ced7SRob Clark 	INIT_WORK(&timer->work, msm_atomic_pending_work);
1292d99ced7SRob Clark }
1302d99ced7SRob Clark 
1312d99ced7SRob Clark static bool can_do_async(struct drm_atomic_state *state,
1322d99ced7SRob Clark 		struct drm_crtc **async_crtc)
1332d99ced7SRob Clark {
1342d99ced7SRob Clark 	struct drm_connector_state *connector_state;
1352d99ced7SRob Clark 	struct drm_connector *connector;
1362d99ced7SRob Clark 	struct drm_crtc_state *crtc_state;
1372d99ced7SRob Clark 	struct drm_crtc *crtc;
1382d99ced7SRob Clark 	int i, num_crtcs = 0;
1392d99ced7SRob Clark 
1402d99ced7SRob Clark 	if (!(state->legacy_cursor_update || state->async_update))
1412d99ced7SRob Clark 		return false;
1422d99ced7SRob Clark 
1432d99ced7SRob Clark 	/* any connector change, means slow path: */
1442d99ced7SRob Clark 	for_each_new_connector_in_state(state, connector, connector_state, i)
1452d99ced7SRob Clark 		return false;
1462d99ced7SRob Clark 
1472d99ced7SRob Clark 	for_each_new_crtc_in_state(state, crtc, crtc_state, i) {
1482d99ced7SRob Clark 		if (drm_atomic_crtc_needs_modeset(crtc_state))
1492d99ced7SRob Clark 			return false;
1502d99ced7SRob Clark 		if (++num_crtcs > 1)
1512d99ced7SRob Clark 			return false;
1522d99ced7SRob Clark 		*async_crtc = crtc;
1532d99ced7SRob Clark 	}
1542d99ced7SRob Clark 
1552d99ced7SRob Clark 	return true;
1562d99ced7SRob Clark }
1572d99ced7SRob Clark 
158d4d2c604SRob Clark /* Get bitmask of crtcs that will need to be flushed.  The bitmask
159d4d2c604SRob Clark  * can be used with for_each_crtc_mask() iterator, to iterate
160d4d2c604SRob Clark  * effected crtcs without needing to preserve the atomic state.
161d4d2c604SRob Clark  */
162d4d2c604SRob Clark static unsigned get_crtc_mask(struct drm_atomic_state *state)
163d4d2c604SRob Clark {
164d4d2c604SRob Clark 	struct drm_crtc_state *crtc_state;
165d4d2c604SRob Clark 	struct drm_crtc *crtc;
166d4d2c604SRob Clark 	unsigned i, mask = 0;
167d4d2c604SRob Clark 
168d4d2c604SRob Clark 	for_each_new_crtc_in_state(state, crtc, crtc_state, i)
169d4d2c604SRob Clark 		mask |= drm_crtc_mask(crtc);
170d4d2c604SRob Clark 
171d4d2c604SRob Clark 	return mask;
172d4d2c604SRob Clark }
173d4d2c604SRob Clark 
174d14659f5SSean Paul void msm_atomic_commit_tail(struct drm_atomic_state *state)
175cf3a7e4cSRob Clark {
176cf3a7e4cSRob Clark 	struct drm_device *dev = state->dev;
1770b776d45SRob Clark 	struct msm_drm_private *priv = dev->dev_private;
1780b776d45SRob Clark 	struct msm_kms *kms = priv->kms;
1792d99ced7SRob Clark 	struct drm_crtc *async_crtc = NULL;
180d4d2c604SRob Clark 	unsigned crtc_mask = get_crtc_mask(state);
1812d99ced7SRob Clark 	bool async = kms->funcs->vsync_time &&
1822d99ced7SRob Clark 			can_do_async(state, &async_crtc);
1830b776d45SRob Clark 
184d934a712SRob Clark 	trace_msm_atomic_commit_tail_start(async, crtc_mask);
185d934a712SRob Clark 
186e35a29d5SRob Clark 	kms->funcs->enable_commit(kms);
1872d99ced7SRob Clark 
1882d99ced7SRob Clark 	/*
1892d99ced7SRob Clark 	 * Ensure any previous (potentially async) commit has
1902d99ced7SRob Clark 	 * completed:
1912d99ced7SRob Clark 	 */
192d934a712SRob Clark 	trace_msm_atomic_wait_flush_start(crtc_mask);
1932d99ced7SRob Clark 	kms->funcs->wait_flush(kms, crtc_mask);
194d934a712SRob Clark 	trace_msm_atomic_wait_flush_finish(crtc_mask);
1952d99ced7SRob Clark 
1962d99ced7SRob Clark 	mutex_lock(&kms->commit_lock);
1972d99ced7SRob Clark 
1982d99ced7SRob Clark 	/*
1992d99ced7SRob Clark 	 * Now that there is no in-progress flush, prepare the
2002d99ced7SRob Clark 	 * current update:
2012d99ced7SRob Clark 	 */
2020b776d45SRob Clark 	kms->funcs->prepare_commit(kms, state);
203cf3a7e4cSRob Clark 
2049f6b6564SRob Clark 	/*
2059f6b6564SRob Clark 	 * Push atomic updates down to hardware:
2069f6b6564SRob Clark 	 */
2071af434a9SDaniel Vetter 	drm_atomic_helper_commit_modeset_disables(dev, state);
2082b58e98dSLiu Ying 	drm_atomic_helper_commit_planes(dev, state, 0);
2091af434a9SDaniel Vetter 	drm_atomic_helper_commit_modeset_enables(dev, state);
210cf3a7e4cSRob Clark 
2112d99ced7SRob Clark 	if (async) {
2122d99ced7SRob Clark 		struct msm_pending_timer *timer =
2132d99ced7SRob Clark 			&kms->pending_timers[drm_crtc_index(async_crtc)];
2142d99ced7SRob Clark 
2152d99ced7SRob Clark 		/* async updates are limited to single-crtc updates: */
2162d99ced7SRob Clark 		WARN_ON(crtc_mask != drm_crtc_mask(async_crtc));
2172d99ced7SRob Clark 
2182d99ced7SRob Clark 		/*
2192d99ced7SRob Clark 		 * Start timer if we don't already have an update pending
2202d99ced7SRob Clark 		 * on this crtc:
2212d99ced7SRob Clark 		 */
2222d99ced7SRob Clark 		if (!(kms->pending_crtc_mask & crtc_mask)) {
2232d99ced7SRob Clark 			ktime_t vsync_time, wakeup_time;
2242d99ced7SRob Clark 
2252d99ced7SRob Clark 			kms->pending_crtc_mask |= crtc_mask;
2262d99ced7SRob Clark 
2272d99ced7SRob Clark 			vsync_time = kms->funcs->vsync_time(kms, async_crtc);
2282d99ced7SRob Clark 			wakeup_time = ktime_sub(vsync_time, ms_to_ktime(1));
2292d99ced7SRob Clark 
2302d99ced7SRob Clark 			hrtimer_start(&timer->timer, wakeup_time,
2312d99ced7SRob Clark 					HRTIMER_MODE_ABS);
2322d99ced7SRob Clark 		}
2332d99ced7SRob Clark 
2342d99ced7SRob Clark 		kms->funcs->disable_commit(kms);
2352d99ced7SRob Clark 		mutex_unlock(&kms->commit_lock);
2362d99ced7SRob Clark 
2372d99ced7SRob Clark 		/*
2382d99ced7SRob Clark 		 * At this point, from drm core's perspective, we
2392d99ced7SRob Clark 		 * are done with the atomic update, so we can just
2402d99ced7SRob Clark 		 * go ahead and signal that it is done:
2412d99ced7SRob Clark 		 */
2422d99ced7SRob Clark 		drm_atomic_helper_commit_hw_done(state);
2432d99ced7SRob Clark 		drm_atomic_helper_cleanup_planes(dev, state);
2442d99ced7SRob Clark 
245d934a712SRob Clark 		trace_msm_atomic_commit_tail_finish(async, crtc_mask);
246d934a712SRob Clark 
2472d99ced7SRob Clark 		return;
2482d99ced7SRob Clark 	}
2492d99ced7SRob Clark 
2502d99ced7SRob Clark 	/*
2512d99ced7SRob Clark 	 * If there is any async flush pending on updated crtcs, fold
2522d99ced7SRob Clark 	 * them into the current flush.
2532d99ced7SRob Clark 	 */
2542d99ced7SRob Clark 	kms->pending_crtc_mask &= ~crtc_mask;
2552d99ced7SRob Clark 
256*43906812SRob Clark 	vblank_get(kms, crtc_mask);
257*43906812SRob Clark 
2589f6b6564SRob Clark 	/*
2599f6b6564SRob Clark 	 * Flush hardware updates:
2609f6b6564SRob Clark 	 */
261d934a712SRob Clark 	trace_msm_atomic_flush_commit(crtc_mask);
2629f6b6564SRob Clark 	kms->funcs->flush_commit(kms, crtc_mask);
2632d99ced7SRob Clark 	mutex_unlock(&kms->commit_lock);
2642b7ac1a8SJeykumar Sankaran 
2652d99ced7SRob Clark 	/*
2662d99ced7SRob Clark 	 * Wait for flush to complete:
2672d99ced7SRob Clark 	 */
268d934a712SRob Clark 	trace_msm_atomic_wait_flush_start(crtc_mask);
269d4d2c604SRob Clark 	kms->funcs->wait_flush(kms, crtc_mask);
270d934a712SRob Clark 	trace_msm_atomic_wait_flush_finish(crtc_mask);
2712d99ced7SRob Clark 
272*43906812SRob Clark 	vblank_put(kms, crtc_mask);
273*43906812SRob Clark 
2742d99ced7SRob Clark 	mutex_lock(&kms->commit_lock);
27580b4b4a7SRob Clark 	kms->funcs->complete_commit(kms, crtc_mask);
2762d99ced7SRob Clark 	mutex_unlock(&kms->commit_lock);
277e35a29d5SRob Clark 	kms->funcs->disable_commit(kms);
27870db18dcSSean Paul 
27970db18dcSSean Paul 	drm_atomic_helper_commit_hw_done(state);
28070db18dcSSean Paul 	drm_atomic_helper_cleanup_planes(dev, state);
281d934a712SRob Clark 
282d934a712SRob Clark 	trace_msm_atomic_commit_tail_finish(async, crtc_mask);
283347b90b4SSean Paul }
284